Files
microcontrollers/Microcontrollers/Eindopdracht/Debug/Eindopdracht.lss
2021-03-31 13:10:25 +02:00

1707 lines
58 KiB
Plaintext

Eindopdracht.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .data 00000016 00800100 00000ade 00000b72 2**0
CONTENTS, ALLOC, LOAD, DATA
1 .text 00000ade 00000000 00000000 00000094 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .bss 0000000c 00800116 00800116 00000b88 2**0
ALLOC
3 .comment 0000005c 00000000 00000000 00000b88 2**0
CONTENTS, READONLY
4 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000be4 2**2
CONTENTS, READONLY
5 .debug_aranges 00000148 00000000 00000000 00000c20 2**0
CONTENTS, READONLY, DEBUGGING
6 .debug_info 000014e2 00000000 00000000 00000d68 2**0
CONTENTS, READONLY, DEBUGGING
7 .debug_abbrev 00000d38 00000000 00000000 0000224a 2**0
CONTENTS, READONLY, DEBUGGING
8 .debug_line 00000aaa 00000000 00000000 00002f82 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_frame 00000318 00000000 00000000 00003a2c 2**2
CONTENTS, READONLY, DEBUGGING
10 .debug_str 00000754 00000000 00000000 00003d44 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_loc 0000068c 00000000 00000000 00004498 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_ranges 00000108 00000000 00000000 00004b24 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end>
2: 00 00 nop
4: 49 c1 rjmp .+658 ; 0x298 <__vector_1>
6: 00 00 nop
8: 5e c0 rjmp .+188 ; 0xc6 <__bad_interrupt>
a: 00 00 nop
c: 5c c0 rjmp .+184 ; 0xc6 <__bad_interrupt>
e: 00 00 nop
10: 5a c0 rjmp .+180 ; 0xc6 <__bad_interrupt>
12: 00 00 nop
14: 58 c0 rjmp .+176 ; 0xc6 <__bad_interrupt>
16: 00 00 nop
18: 56 c0 rjmp .+172 ; 0xc6 <__bad_interrupt>
1a: 00 00 nop
1c: 54 c0 rjmp .+168 ; 0xc6 <__bad_interrupt>
1e: 00 00 nop
20: 52 c0 rjmp .+164 ; 0xc6 <__bad_interrupt>
22: 00 00 nop
24: 92 c1 rjmp .+804 ; 0x34a <__vector_9>
26: 00 00 nop
28: 4e c0 rjmp .+156 ; 0xc6 <__bad_interrupt>
2a: 00 00 nop
2c: 4c c0 rjmp .+152 ; 0xc6 <__bad_interrupt>
2e: 00 00 nop
30: 4a c0 rjmp .+148 ; 0xc6 <__bad_interrupt>
32: 00 00 nop
34: 48 c0 rjmp .+144 ; 0xc6 <__bad_interrupt>
36: 00 00 nop
38: 46 c0 rjmp .+140 ; 0xc6 <__bad_interrupt>
3a: 00 00 nop
3c: 44 c0 rjmp .+136 ; 0xc6 <__bad_interrupt>
3e: 00 00 nop
40: 42 c0 rjmp .+132 ; 0xc6 <__bad_interrupt>
42: 00 00 nop
44: 40 c0 rjmp .+128 ; 0xc6 <__bad_interrupt>
46: 00 00 nop
48: 3e c0 rjmp .+124 ; 0xc6 <__bad_interrupt>
4a: 00 00 nop
4c: 3c c0 rjmp .+120 ; 0xc6 <__bad_interrupt>
4e: 00 00 nop
50: 3a c0 rjmp .+116 ; 0xc6 <__bad_interrupt>
52: 00 00 nop
54: 38 c0 rjmp .+112 ; 0xc6 <__bad_interrupt>
56: 00 00 nop
58: 36 c0 rjmp .+108 ; 0xc6 <__bad_interrupt>
5a: 00 00 nop
5c: 34 c0 rjmp .+104 ; 0xc6 <__bad_interrupt>
5e: 00 00 nop
60: 32 c0 rjmp .+100 ; 0xc6 <__bad_interrupt>
62: 00 00 nop
64: 30 c0 rjmp .+96 ; 0xc6 <__bad_interrupt>
66: 00 00 nop
68: 2e c0 rjmp .+92 ; 0xc6 <__bad_interrupt>
6a: 00 00 nop
6c: 2c c0 rjmp .+88 ; 0xc6 <__bad_interrupt>
6e: 00 00 nop
70: 2a c0 rjmp .+84 ; 0xc6 <__bad_interrupt>
72: 00 00 nop
74: 28 c0 rjmp .+80 ; 0xc6 <__bad_interrupt>
76: 00 00 nop
78: 26 c0 rjmp .+76 ; 0xc6 <__bad_interrupt>
7a: 00 00 nop
7c: 24 c0 rjmp .+72 ; 0xc6 <__bad_interrupt>
7e: 00 00 nop
80: 22 c0 rjmp .+68 ; 0xc6 <__bad_interrupt>
82: 00 00 nop
84: 20 c0 rjmp .+64 ; 0xc6 <__bad_interrupt>
86: 00 00 nop
88: 1e c0 rjmp .+60 ; 0xc6 <__bad_interrupt>
...
0000008c <__ctors_end>:
8c: 11 24 eor r1, r1
8e: 1f be out 0x3f, r1 ; 63
90: cf ef ldi r28, 0xFF ; 255
92: d0 e1 ldi r29, 0x10 ; 16
94: de bf out 0x3e, r29 ; 62
96: cd bf out 0x3d, r28 ; 61
00000098 <__do_copy_data>:
98: 11 e0 ldi r17, 0x01 ; 1
9a: a0 e0 ldi r26, 0x00 ; 0
9c: b1 e0 ldi r27, 0x01 ; 1
9e: ee ed ldi r30, 0xDE ; 222
a0: fa e0 ldi r31, 0x0A ; 10
a2: 00 e0 ldi r16, 0x00 ; 0
a4: 0b bf out 0x3b, r16 ; 59
a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14>
a8: 07 90 elpm r0, Z+
aa: 0d 92 st X+, r0
ac: a6 31 cpi r26, 0x16 ; 22
ae: b1 07 cpc r27, r17
b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10>
000000b2 <__do_clear_bss>:
b2: 21 e0 ldi r18, 0x01 ; 1
b4: a6 e1 ldi r26, 0x16 ; 22
b6: b1 e0 ldi r27, 0x01 ; 1
b8: 01 c0 rjmp .+2 ; 0xbc <.do_clear_bss_start>
000000ba <.do_clear_bss_loop>:
ba: 1d 92 st X+, r1
000000bc <.do_clear_bss_start>:
bc: a2 32 cpi r26, 0x22 ; 34
be: b2 07 cpc r27, r18
c0: e1 f7 brne .-8 ; 0xba <.do_clear_bss_loop>
c2: 11 d1 rcall .+546 ; 0x2e6 <main>
c4: 0a c5 rjmp .+2580 ; 0xada <_exit>
000000c6 <__bad_interrupt>:
c6: 9c cf rjmp .-200 ; 0x0 <__vectors>
000000c8 <sbi_porta>:
}
}
void lcd_move_right(void){
lcd_write_command(0x1E);
c8: 9b b3 in r25, 0x1b ; 27
ca: 21 e0 ldi r18, 0x01 ; 1
cc: 30 e0 ldi r19, 0x00 ; 0
ce: 02 c0 rjmp .+4 ; 0xd4 <sbi_porta+0xc>
d0: 22 0f add r18, r18
d2: 33 1f adc r19, r19
d4: 8a 95 dec r24
d6: e2 f7 brpl .-8 ; 0xd0 <sbi_porta+0x8>
d8: 29 2b or r18, r25
da: 2b bb out 0x1b, r18 ; 27
dc: 08 95 ret
000000de <cbi_porta>:
de: 9b b3 in r25, 0x1b ; 27
e0: 21 e0 ldi r18, 0x01 ; 1
e2: 30 e0 ldi r19, 0x00 ; 0
e4: 02 c0 rjmp .+4 ; 0xea <cbi_porta+0xc>
e6: 22 0f add r18, r18
e8: 33 1f adc r19, r19
ea: 8a 95 dec r24
ec: e2 f7 brpl .-8 ; 0xe6 <cbi_porta+0x8>
ee: 20 95 com r18
f0: 29 23 and r18, r25
f2: 2b bb out 0x1b, r18 ; 27
f4: 08 95 ret
000000f6 <lcd_strobe_lcd_e>:
f6: 86 e0 ldi r24, 0x06 ; 6
f8: 90 e0 ldi r25, 0x00 ; 0
fa: e6 df rcall .-52 ; 0xc8 <sbi_porta>
fc: 83 ec ldi r24, 0xC3 ; 195
fe: 99 e0 ldi r25, 0x09 ; 9
100: 01 97 sbiw r24, 0x01 ; 1
102: f1 f7 brne .-4 ; 0x100 <lcd_strobe_lcd_e+0xa>
104: 00 c0 rjmp .+0 ; 0x106 <lcd_strobe_lcd_e+0x10>
106: 00 00 nop
108: 86 e0 ldi r24, 0x06 ; 6
10a: 90 e0 ldi r25, 0x00 ; 0
10c: e8 df rcall .-48 ; 0xde <cbi_porta>
10e: 87 e8 ldi r24, 0x87 ; 135
110: 93 e1 ldi r25, 0x13 ; 19
112: 01 97 sbiw r24, 0x01 ; 1
114: f1 f7 brne .-4 ; 0x112 <lcd_strobe_lcd_e+0x1c>
116: 00 c0 rjmp .+0 ; 0x118 <lcd_strobe_lcd_e+0x22>
118: 00 00 nop
11a: 08 95 ret
0000011c <lcd_write_character>:
11c: cf 93 push r28
11e: c8 2f mov r28, r24
120: 85 bb out 0x15, r24 ; 21
122: 84 e0 ldi r24, 0x04 ; 4
124: 90 e0 ldi r25, 0x00 ; 0
126: d0 df rcall .-96 ; 0xc8 <sbi_porta>
128: e6 df rcall .-52 ; 0xf6 <lcd_strobe_lcd_e>
12a: c2 95 swap r28
12c: c0 7f andi r28, 0xF0 ; 240
12e: c5 bb out 0x15, r28 ; 21
130: 84 e0 ldi r24, 0x04 ; 4
132: 90 e0 ldi r25, 0x00 ; 0
134: c9 df rcall .-110 ; 0xc8 <sbi_porta>
136: df df rcall .-66 ; 0xf6 <lcd_strobe_lcd_e>
138: cf 91 pop r28
13a: 08 95 ret
0000013c <lcd_write_command>:
13c: cf 93 push r28
13e: c8 2f mov r28, r24
140: 85 bb out 0x15, r24 ; 21
142: 84 e0 ldi r24, 0x04 ; 4
144: 90 e0 ldi r25, 0x00 ; 0
146: cb df rcall .-106 ; 0xde <cbi_porta>
148: d6 df rcall .-84 ; 0xf6 <lcd_strobe_lcd_e>
14a: c2 95 swap r28
14c: c0 7f andi r28, 0xF0 ; 240
14e: c5 bb out 0x15, r28 ; 21
150: 84 e0 ldi r24, 0x04 ; 4
152: 90 e0 ldi r25, 0x00 ; 0
154: c4 df rcall .-120 ; 0xde <cbi_porta>
156: cf df rcall .-98 ; 0xf6 <lcd_strobe_lcd_e>
158: cf 91 pop r28
15a: 08 95 ret
0000015c <lcd_clear>:
15c: 81 e0 ldi r24, 0x01 ; 1
15e: ee df rcall .-36 ; 0x13c <lcd_write_command>
160: 87 e8 ldi r24, 0x87 ; 135
162: 93 e1 ldi r25, 0x13 ; 19
164: 01 97 sbiw r24, 0x01 ; 1
166: f1 f7 brne .-4 ; 0x164 <lcd_clear+0x8>
168: 00 c0 rjmp .+0 ; 0x16a <lcd_clear+0xe>
16a: 00 00 nop
16c: 80 e8 ldi r24, 0x80 ; 128
16e: e6 cf rjmp .-52 ; 0x13c <lcd_write_command>
170: 08 95 ret
00000172 <init_4bits_mode>:
172: cf 93 push r28
174: 8f ef ldi r24, 0xFF ; 255
176: 84 bb out 0x14, r24 ; 20
178: 85 bb out 0x15, r24 ; 21
17a: 8a bb out 0x1a, r24 ; 26
17c: 15 ba out 0x15, r1 ; 21
17e: 1b ba out 0x1b, r1 ; 27
180: c0 e2 ldi r28, 0x20 ; 32
182: c5 bb out 0x15, r28 ; 21
184: b8 df rcall .-144 ; 0xf6 <lcd_strobe_lcd_e>
186: c5 bb out 0x15, r28 ; 21
188: b6 df rcall .-148 ; 0xf6 <lcd_strobe_lcd_e>
18a: 80 e8 ldi r24, 0x80 ; 128
18c: 85 bb out 0x15, r24 ; 21
18e: b3 df rcall .-154 ; 0xf6 <lcd_strobe_lcd_e>
190: 15 ba out 0x15, r1 ; 21
192: b1 df rcall .-158 ; 0xf6 <lcd_strobe_lcd_e>
194: 80 ef ldi r24, 0xF0 ; 240
196: 85 bb out 0x15, r24 ; 21
198: ae df rcall .-164 ; 0xf6 <lcd_strobe_lcd_e>
19a: 15 ba out 0x15, r1 ; 21
19c: ac df rcall .-168 ; 0xf6 <lcd_strobe_lcd_e>
19e: 80 e6 ldi r24, 0x60 ; 96
1a0: 85 bb out 0x15, r24 ; 21
1a2: a9 df rcall .-174 ; 0xf6 <lcd_strobe_lcd_e>
1a4: 82 e0 ldi r24, 0x02 ; 2
1a6: ca df rcall .-108 ; 0x13c <lcd_write_command>
1a8: a6 df rcall .-180 ; 0xf6 <lcd_strobe_lcd_e>
1aa: cf 91 pop r28
1ac: 08 95 ret
000001ae <lcd_write_string>:
1ae: cf 93 push r28
1b0: df 93 push r29
1b2: ec 01 movw r28, r24
1b4: 02 c0 rjmp .+4 ; 0x1ba <lcd_write_string+0xc>
1b6: b2 df rcall .-156 ; 0x11c <lcd_write_character>
1b8: 21 96 adiw r28, 0x01 ; 1
1ba: 88 81 ld r24, Y
1bc: 81 11 cpse r24, r1
1be: fb cf rjmp .-10 ; 0x1b6 <lcd_write_string+0x8>
1c0: df 91 pop r29
1c2: cf 91 pop r28
1c4: 08 95 ret
000001c6 <lcd_write_int>:
}
void lcd_write_int(int number)
{
1c6: af 92 push r10
1c8: bf 92 push r11
1ca: cf 92 push r12
1cc: df 92 push r13
1ce: ef 92 push r14
1d0: ff 92 push r15
1d2: 0f 93 push r16
1d4: 1f 93 push r17
1d6: cf 93 push r28
1d8: df 93 push r29
1da: cd b7 in r28, 0x3d ; 61
1dc: de b7 in r29, 0x3e ; 62
1de: d8 2e mov r13, r24
1e0: c9 2e mov r12, r25
int length = snprintf(NULL, 0, "%d", number);
char str[length + 1];
snprintf(str, length + 1, "%d", number);
lcd_write_string(str);
}
1e2: ad b6 in r10, 0x3d ; 61
1e4: be b6 in r11, 0x3e ; 62
lcd_write_command(0x1E);
}
void lcd_write_int(int number)
{
int length = snprintf(NULL, 0, "%d", number);
1e6: 9f 93 push r25
1e8: 8f 93 push r24
1ea: 0f 2e mov r0, r31
1ec: f2 e1 ldi r31, 0x12 ; 18
1ee: ef 2e mov r14, r31
1f0: f1 e0 ldi r31, 0x01 ; 1
1f2: ff 2e mov r15, r31
1f4: f0 2d mov r31, r0
1f6: ff 92 push r15
1f8: ef 92 push r14
1fa: 1f 92 push r1
1fc: 1f 92 push r1
1fe: 1f 92 push r1
200: 1f 92 push r1
202: 82 d1 rcall .+772 ; 0x508 <snprintf>
char str[length + 1];
204: 01 96 adiw r24, 0x01 ; 1
206: 2d b7 in r18, 0x3d ; 61
208: 3e b7 in r19, 0x3e ; 62
20a: 28 5f subi r18, 0xF8 ; 248
20c: 3f 4f sbci r19, 0xFF ; 255
20e: 0f b6 in r0, 0x3f ; 63
210: f8 94 cli
212: 3e bf out 0x3e, r19 ; 62
214: 0f be out 0x3f, r0 ; 63
216: 2d bf out 0x3d, r18 ; 61
218: 28 1b sub r18, r24
21a: 39 0b sbc r19, r25
21c: 0f b6 in r0, 0x3f ; 63
21e: f8 94 cli
220: 3e bf out 0x3e, r19 ; 62
222: 0f be out 0x3f, r0 ; 63
224: 2d bf out 0x3d, r18 ; 61
226: 0d b7 in r16, 0x3d ; 61
228: 1e b7 in r17, 0x3e ; 62
22a: 0f 5f subi r16, 0xFF ; 255
22c: 1f 4f sbci r17, 0xFF ; 255
snprintf(str, length + 1, "%d", number);
22e: cf 92 push r12
230: df 92 push r13
232: ff 92 push r15
234: ef 92 push r14
236: 9f 93 push r25
238: 8f 93 push r24
23a: 1f 93 push r17
23c: 0f 93 push r16
23e: 64 d1 rcall .+712 ; 0x508 <snprintf>
lcd_write_string(str);
240: 80 2f mov r24, r16
242: 91 2f mov r25, r17
244: b4 df rcall .-152 ; 0x1ae <lcd_write_string>
}
246: 8d b7 in r24, 0x3d ; 61
248: 9e b7 in r25, 0x3e ; 62
24a: 08 96 adiw r24, 0x08 ; 8
24c: 0f b6 in r0, 0x3f ; 63
24e: f8 94 cli
250: 9e bf out 0x3e, r25 ; 62
252: 0f be out 0x3f, r0 ; 63
254: 8d bf out 0x3d, r24 ; 61
256: 0f b6 in r0, 0x3f ; 63
258: f8 94 cli
25a: be be out 0x3e, r11 ; 62
25c: 0f be out 0x3f, r0 ; 63
25e: ad be out 0x3d, r10 ; 61
260: df 91 pop r29
262: cf 91 pop r28
264: 1f 91 pop r17
266: 0f 91 pop r16
268: ff 90 pop r15
26a: ef 90 pop r14
26c: df 90 pop r13
26e: cf 90 pop r12
270: bf 90 pop r11
272: af 90 pop r10
274: 08 95 ret
00000276 <ultrasoon_value_set_event>:
static void snap_event_trigger(uint8_t rotation){
ultrasonic_send_pulse();
}
static void ultrasoon_value_set_event(uint16_t value){
if(initialising){
276: 20 91 00 01 lds r18, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__>
27a: 22 23 and r18, r18
27c: 51 f0 breq .+20 ; 0x292 <ultrasoon_value_set_event+0x1c>
if(value > 0 && value < 20){
27e: 01 97 sbiw r24, 0x01 ; 1
280: 43 97 sbiw r24, 0x13 ; 19
282: 38 f4 brcc .+14 ; 0x292 <ultrasoon_value_set_event+0x1c>
stepper_rotate_stop();
284: d1 d0 rcall .+418 ; 0x428 <stepper_rotate_stop>
initialising = false;
286: 10 92 00 01 sts 0x0100, r1 ; 0x800100 <__DATA_REGION_ORIGIN__>
stepper_rotate_angle(512, CounterClockWise);
28a: 61 e0 ldi r22, 0x01 ; 1
28c: 80 e0 ldi r24, 0x00 ; 0
28e: 92 e0 ldi r25, 0x02 ; 2
290: be c0 rjmp .+380 ; 0x40e <stepper_rotate_angle>
292: 08 95 ret
00000294 <snap_event_trigger>:
{
ultrasonic_handle_interrupt();
}
static void snap_event_trigger(uint8_t rotation){
ultrasonic_send_pulse();
294: 04 c1 rjmp .+520 ; 0x49e <ultrasonic_send_pulse>
296: 08 95 ret
00000298 <__vector_1>:
#include "stepper_driver.h"
bool initialising = true;
ISR(INT0_vect)
{
298: 1f 92 push r1
29a: 0f 92 push r0
29c: 0f b6 in r0, 0x3f ; 63
29e: 0f 92 push r0
2a0: 11 24 eor r1, r1
2a2: 0b b6 in r0, 0x3b ; 59
2a4: 0f 92 push r0
2a6: 2f 93 push r18
2a8: 3f 93 push r19
2aa: 4f 93 push r20
2ac: 5f 93 push r21
2ae: 6f 93 push r22
2b0: 7f 93 push r23
2b2: 8f 93 push r24
2b4: 9f 93 push r25
2b6: af 93 push r26
2b8: bf 93 push r27
2ba: ef 93 push r30
2bc: ff 93 push r31
ultrasonic_handle_interrupt();
2be: fc d0 rcall .+504 ; 0x4b8 <ultrasonic_handle_interrupt>
}
2c0: ff 91 pop r31
2c2: ef 91 pop r30
2c4: bf 91 pop r27
2c6: af 91 pop r26
2c8: 9f 91 pop r25
2ca: 8f 91 pop r24
2cc: 7f 91 pop r23
2ce: 6f 91 pop r22
2d0: 5f 91 pop r21
2d2: 4f 91 pop r20
2d4: 3f 91 pop r19
2d6: 2f 91 pop r18
2d8: 0f 90 pop r0
2da: 0b be out 0x3b, r0 ; 59
2dc: 0f 90 pop r0
2de: 0f be out 0x3f, r0 ; 63
2e0: 0f 90 pop r0
2e2: 1f 90 pop r1
2e4: 18 95 reti
000002e6 <main>:
}
int main(void)
{
/* Replace with your application code */
ultrasonic_init();
2e6: cc d0 rcall .+408 ; 0x480 <ultrasonic_init>
init_4bits_mode();
2e8: 44 df rcall .-376 ; 0x172 <init_4bits_mode>
init_stepper_driver();
2ea: a0 d0 rcall .+320 ; 0x42c <init_stepper_driver>
set_snap_event(&snap_event_trigger);
2ec: 8a e4 ldi r24, 0x4A ; 74
2ee: 91 e0 ldi r25, 0x01 ; 1
2f0: 27 d0 rcall .+78 ; 0x340 <set_snap_event>
set_value_trigger_event(&ultrasoon_value_set_event);
2f2: 8b e3 ldi r24, 0x3B ; 59
2f4: 91 e0 ldi r25, 0x01 ; 1
2f6: fe d0 rcall .+508 ; 0x4f4 <set_value_trigger_event>
2f8: 87 ea ldi r24, 0xA7 ; 167
#else
//round up by default
__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
#endif
__builtin_avr_delay_cycles(__ticks_dc);
2fa: 91 e6 ldi r25, 0x61 ; 97
2fc: 01 97 sbiw r24, 0x01 ; 1
2fe: f1 f7 brne .-4 ; 0x2fc <main+0x16>
300: 00 c0 rjmp .+0 ; 0x302 <main+0x1c>
302: 00 00 nop
_delay_ms(10);
lcd_clear();
304: 2b df rcall .-426 ; 0x15c <lcd_clear>
stepper_rotate_angle(600, ClockWise);
306: 60 e0 ldi r22, 0x00 ; 0
308: 88 e5 ldi r24, 0x58 ; 88
30a: 92 e0 ldi r25, 0x02 ; 2
while (1)
{
// TODO change to use the stepper motor
//ultrasonic_send_pulse();
lcd_clear();
30c: 80 d0 rcall .+256 ; 0x40e <stepper_rotate_angle>
30e: 26 df rcall .-436 ; 0x15c <lcd_clear>
lcd_write_int(ultrasonic_get_timer_dist());
310: f6 d0 rcall .+492 ; 0x4fe <ultrasonic_get_timer_dist>
312: 59 df rcall .-334 ; 0x1c6 <lcd_write_int>
314: 84 e6 ldi r24, 0x64 ; 100
316: 90 e0 ldi r25, 0x00 ; 0
wait_ms(100);
318: a4 d0 rcall .+328 ; 0x462 <wait_ms>
31a: f9 cf rjmp .-14 ; 0x30e <main+0x28>
0000031c <set_stepper_state>:
void stepper_rotate_full_rotation_CW();
void stepper_rotate_full_rotation_CCW();
void set_stepper_state(uint8_t count){
if(rotation == ClockWise){
31c: 90 91 1d 01 lds r25, 0x011D ; 0x80011d <rotation>
320: 91 11 cpse r25, r1
322: 07 c0 rjmp .+14 ; 0x332 <set_stepper_state+0x16>
PORTE = CW[count];
324: e8 2f mov r30, r24
326: f0 e0 ldi r31, 0x00 ; 0
328: ef 5f subi r30, 0xFF ; 255
32a: fe 4f sbci r31, 0xFE ; 254
32c: 80 81 ld r24, Z
32e: 83 b9 out 0x03, r24 ; 3
330: 08 95 ret
} else {
PORTE = CCW[count];
332: e8 2f mov r30, r24
334: f0 e0 ldi r31, 0x00 ; 0
336: e7 5f subi r30, 0xF7 ; 247
338: fe 4f sbci r31, 0xFE ; 254
33a: 80 81 ld r24, Z
33c: 83 b9 out 0x03, r24 ; 3
33e: 08 95 ret
00000340 <set_snap_event>:
}
void (*snap_event)(uint8_t);
void set_snap_event(void (*snap_event_p)(uint8_t)){
snap_event = snap_event_p;
340: 90 93 1f 01 sts 0x011F, r25 ; 0x80011f <snap_event+0x1>
344: 80 93 1e 01 sts 0x011E, r24 ; 0x80011e <snap_event>
348: 08 95 ret
0000034a <__vector_9>:
}
uint16_t steps_each_turn = 0;
uint16_t steps_to_do = 0;
uint8_t stepper_state = 0;
ISR( TIMER2_COMP_vect ){
34a: 1f 92 push r1
34c: 0f 92 push r0
34e: 0f b6 in r0, 0x3f ; 63
350: 0f 92 push r0
352: 11 24 eor r1, r1
354: 0b b6 in r0, 0x3b ; 59
356: 0f 92 push r0
358: 2f 93 push r18
35a: 3f 93 push r19
35c: 4f 93 push r20
35e: 5f 93 push r21
360: 6f 93 push r22
362: 7f 93 push r23
364: 8f 93 push r24
366: 9f 93 push r25
368: af 93 push r26
36a: bf 93 push r27
36c: ef 93 push r30
36e: ff 93 push r31
TCNT2 = 0;
370: 14 bc out 0x24, r1 ; 36
set_stepper_state(stepper_state);
372: 80 91 16 01 lds r24, 0x0116 ; 0x800116 <__data_end>
376: d2 df rcall .-92 ; 0x31c <set_stepper_state>
if(stepper_state < 7){
378: 80 91 16 01 lds r24, 0x0116 ; 0x800116 <__data_end>
37c: 87 30 cpi r24, 0x07 ; 7
37e: 20 f4 brcc .+8 ; 0x388 <__vector_9+0x3e>
stepper_state++;
380: 8f 5f subi r24, 0xFF ; 255
382: 80 93 16 01 sts 0x0116, r24 ; 0x800116 <__data_end>
386: 30 c0 rjmp .+96 ; 0x3e8 <__vector_9+0x9e>
} else {
//OCR2 = ADCH;
stepper_state = 0;
388: 10 92 16 01 sts 0x0116, r1 ; 0x800116 <__data_end>
if(steps_to_do == 0){
38c: 80 91 17 01 lds r24, 0x0117 ; 0x800117 <steps_to_do>
390: 90 91 18 01 lds r25, 0x0118 ; 0x800118 <steps_to_do+0x1>
394: 00 97 sbiw r24, 0x00 ; 0
396: 99 f4 brne .+38 ; 0x3be <__vector_9+0x74>
if(rotation == ClockWise){
398: 80 91 1d 01 lds r24, 0x011D ; 0x80011d <rotation>
39c: 81 11 cpse r24, r1
39e: 04 c0 rjmp .+8 ; 0x3a8 <__vector_9+0x5e>
rotation = CounterClockWise;
3a0: 81 e0 ldi r24, 0x01 ; 1
3a2: 80 93 1d 01 sts 0x011D, r24 ; 0x80011d <rotation>
3a6: 02 c0 rjmp .+4 ; 0x3ac <__vector_9+0x62>
} else {
rotation = ClockWise;
3a8: 10 92 1d 01 sts 0x011D, r1 ; 0x80011d <rotation>
}
steps_to_do = steps_each_turn;
3ac: 80 91 19 01 lds r24, 0x0119 ; 0x800119 <steps_each_turn>
3b0: 90 91 1a 01 lds r25, 0x011A ; 0x80011a <steps_each_turn+0x1>
3b4: 90 93 18 01 sts 0x0118, r25 ; 0x800118 <steps_to_do+0x1>
3b8: 80 93 17 01 sts 0x0117, r24 ; 0x800117 <steps_to_do>
3bc: 15 c0 rjmp .+42 ; 0x3e8 <__vector_9+0x9e>
} else {
if(steps_to_do % 32 == 0){
3be: 9c 01 movw r18, r24
3c0: 2f 71 andi r18, 0x1F ; 31
3c2: 33 27 eor r19, r19
3c4: 23 2b or r18, r19
3c6: 39 f4 brne .+14 ; 0x3d6 <__vector_9+0x8c>
if(snap_event != NULL)
3c8: e0 91 1e 01 lds r30, 0x011E ; 0x80011e <snap_event>
3cc: f0 91 1f 01 lds r31, 0x011F ; 0x80011f <snap_event+0x1>
3d0: 30 97 sbiw r30, 0x00 ; 0
3d2: 09 f0 breq .+2 ; 0x3d6 <__vector_9+0x8c>
snap_event(steps_to_do);
3d4: 09 95 icall
}
steps_to_do--;
3d6: 80 91 17 01 lds r24, 0x0117 ; 0x800117 <steps_to_do>
3da: 90 91 18 01 lds r25, 0x0118 ; 0x800118 <steps_to_do+0x1>
3de: 01 97 sbiw r24, 0x01 ; 1
3e0: 90 93 18 01 sts 0x0118, r25 ; 0x800118 <steps_to_do+0x1>
3e4: 80 93 17 01 sts 0x0117, r24 ; 0x800117 <steps_to_do>
}
}
}
3e8: ff 91 pop r31
3ea: ef 91 pop r30
3ec: bf 91 pop r27
3ee: af 91 pop r26
3f0: 9f 91 pop r25
3f2: 8f 91 pop r24
3f4: 7f 91 pop r23
3f6: 6f 91 pop r22
3f8: 5f 91 pop r21
3fa: 4f 91 pop r20
3fc: 3f 91 pop r19
3fe: 2f 91 pop r18
400: 0f 90 pop r0
402: 0b be out 0x3b, r0 ; 59
404: 0f 90 pop r0
406: 0f be out 0x3f, r0 ; 63
408: 0f 90 pop r0
40a: 1f 90 pop r1
40c: 18 95 reti
0000040e <stepper_rotate_angle>:
void stepper_rotate_angle(uint16_t steps, enum rotation_wise rot){
steps_to_do = steps;
40e: 90 93 18 01 sts 0x0118, r25 ; 0x800118 <steps_to_do+0x1>
412: 80 93 17 01 sts 0x0117, r24 ; 0x800117 <steps_to_do>
steps_each_turn = steps;
416: 90 93 1a 01 sts 0x011A, r25 ; 0x80011a <steps_each_turn+0x1>
41a: 80 93 19 01 sts 0x0119, r24 ; 0x800119 <steps_each_turn>
rotation = rot;
41e: 60 93 1d 01 sts 0x011D, r22 ; 0x80011d <rotation>
TCCR2 = 0b00001100;
422: 8c e0 ldi r24, 0x0C ; 12
424: 85 bd out 0x25, r24 ; 37
426: 08 95 ret
00000428 <stepper_rotate_stop>:
}
void stepper_rotate_stop(){
TCCR2 = 0b00000000;
428: 15 bc out 0x25, r1 ; 37
42a: 08 95 ret
0000042c <init_stepper_driver>:
}
void init_stepper_driver(){
DDRE = 0xff;
42c: 8f ef ldi r24, 0xFF ; 255
42e: 82 b9 out 0x02, r24 ; 2
DDRG = 0xff;
430: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064>
PORTG = 0x01;
434: 81 e0 ldi r24, 0x01 ; 1
436: 80 93 65 00 sts 0x0065, r24 ; 0x800065 <__TEXT_REGION_LENGTH__+0x7e0065>
PORTE = 0x00;
43a: 13 b8 out 0x03, r1 ; 3
OCR2 = 150;
43c: 86 e9 ldi r24, 0x96 ; 150
43e: 83 bd out 0x23, r24 ; 35
TIMSK = BIT(7);
440: 80 e8 ldi r24, 0x80 ; 128
442: 87 bf out 0x37, r24 ; 55
sei();
444: 78 94 sei
446: 08 95 ret
00000448 <wait_us>:
void (*value_set_event)(uint16_t);
void wait_us(unsigned int us)
{
for(int i = 0; i < us; i++)
448: 20 e0 ldi r18, 0x00 ; 0
44a: 30 e0 ldi r19, 0x00 ; 0
44c: 06 c0 rjmp .+12 ; 0x45a <wait_us+0x12>
#else
//round up by default
__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
#endif
__builtin_avr_delay_cycles(__ticks_dc);
44e: 43 e0 ldi r20, 0x03 ; 3
450: 4a 95 dec r20
452: f1 f7 brne .-4 ; 0x450 <wait_us+0x8>
454: 00 00 nop
456: 2f 5f subi r18, 0xFF ; 255
458: 3f 4f sbci r19, 0xFF ; 255
45a: 28 17 cp r18, r24
45c: 39 07 cpc r19, r25
45e: b8 f3 brcs .-18 ; 0x44e <wait_us+0x6>
{
_delay_us(1);
}
}
460: 08 95 ret
00000462 <wait_ms>:
void wait_ms(unsigned int ms)
{
for(int i = 0; i < ms; i++)
462: 20 e0 ldi r18, 0x00 ; 0
464: 30 e0 ldi r19, 0x00 ; 0
466: 08 c0 rjmp .+16 ; 0x478 <wait_ms+0x16>
#else
//round up by default
__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
#endif
__builtin_avr_delay_cycles(__ticks_dc);
468: e3 ec ldi r30, 0xC3 ; 195
46a: f9 e0 ldi r31, 0x09 ; 9
46c: 31 97 sbiw r30, 0x01 ; 1
46e: f1 f7 brne .-4 ; 0x46c <wait_ms+0xa>
470: 00 c0 rjmp .+0 ; 0x472 <wait_ms+0x10>
472: 00 00 nop
474: 2f 5f subi r18, 0xFF ; 255
476: 3f 4f sbci r19, 0xFF ; 255
478: 28 17 cp r18, r24
47a: 39 07 cpc r19, r25
47c: a8 f3 brcs .-22 ; 0x468 <wait_ms+0x6>
{
_delay_ms(1);
}
}
47e: 08 95 ret
00000480 <ultrasonic_init>:
void ultrasonic_init()
{
DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug
480: 8f ef ldi r24, 0xFF ; 255
482: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064>
DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt
486: 11 ba out 0x11, r1 ; 17
EICRA = 0x03; // interrupt PORTD on pin 0, rising edge
488: 83 e0 ldi r24, 0x03 ; 3
48a: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a>
EIMSK |= 0x01; // enable interrupt on pin 0 (INT0)
48e: 89 b7 in r24, 0x39 ; 57
490: 81 60 ori r24, 0x01 ; 1
492: 89 bf out 0x39, r24 ; 57
TCCR1A = 0b00000000; // initialize timer1, prescaler=256
494: 1f bc out 0x2f, r1 ; 47
TCCR1B = 0b00001100; // CTC compare A, RUN
496: 8c e0 ldi r24, 0x0C ; 12
498: 8e bd out 0x2e, r24 ; 46
sei(); // turn on interrupt system
49a: 78 94 sei
49c: 08 95 ret
0000049e <ultrasonic_send_pulse>:
}
void ultrasonic_send_pulse()
{
49e: cf 93 push r28
4a0: df 93 push r29
PORTG = 0x00; // 10 us low pulse
4a2: c5 e6 ldi r28, 0x65 ; 101
4a4: d0 e0 ldi r29, 0x00 ; 0
4a6: 18 82 st Y, r1
wait_us(10);
4a8: 8a e0 ldi r24, 0x0A ; 10
4aa: 90 e0 ldi r25, 0x00 ; 0
4ac: cd df rcall .-102 ; 0x448 <wait_us>
PORTG = 0x01;
4ae: 81 e0 ldi r24, 0x01 ; 1
4b0: 88 83 st Y, r24
}
4b2: df 91 pop r29
4b4: cf 91 pop r28
4b6: 08 95 ret
000004b8 <ultrasonic_handle_interrupt>:
void ultrasonic_handle_interrupt()
{
// if the interrupt was generated on a rising edge (start sending echo)
if (int_stat == INTERRUPT_RISING)
4b8: 80 91 11 01 lds r24, 0x0111 ; 0x800111 <int_stat>
4bc: 81 30 cpi r24, 0x01 ; 1
4be: 41 f4 brne .+16 ; 0x4d0 <ultrasonic_handle_interrupt+0x18>
{
// set interrupt pin 0 on PORTD to falling edge
EICRA = 0x02;
4c0: 82 e0 ldi r24, 0x02 ; 2
4c2: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a>
// reset the time in timer1
TCNT1 = 0x00;
4c6: 1d bc out 0x2d, r1 ; 45
4c8: 1c bc out 0x2c, r1 ; 44
// set interrupt status
int_stat = INTERRUPT_FALLING;
4ca: 10 92 11 01 sts 0x0111, r1 ; 0x800111 <int_stat>
4ce: 08 95 ret
} else
// else if it was generated on a falling edge (end sending echo)
{
// set interrupt pin 0 on PORTD to rising edge
EICRA = 0x03;
4d0: 83 e0 ldi r24, 0x03 ; 3
4d2: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a>
// read timer1 into time_dist
timer_dist = TCNT1;
4d6: 8c b5 in r24, 0x2c ; 44
4d8: 9d b5 in r25, 0x2d ; 45
4da: 90 93 1c 01 sts 0x011C, r25 ; 0x80011c <timer_dist+0x1>
4de: 80 93 1b 01 sts 0x011B, r24 ; 0x80011b <timer_dist>
//EVENT
value_set_event(timer_dist);
4e2: e0 91 20 01 lds r30, 0x0120 ; 0x800120 <value_set_event>
4e6: f0 91 21 01 lds r31, 0x0121 ; 0x800121 <value_set_event+0x1>
4ea: 09 95 icall
// set interrupt status
int_stat = INTERRUPT_RISING;
4ec: 81 e0 ldi r24, 0x01 ; 1
4ee: 80 93 11 01 sts 0x0111, r24 ; 0x800111 <int_stat>
4f2: 08 95 ret
000004f4 <set_value_trigger_event>:
}
}
void set_value_trigger_event(void (*value_set_event_p)(uint16_t)){
// event that is triggered when a value is set.
value_set_event = value_set_event_p;
4f4: 90 93 21 01 sts 0x0121, r25 ; 0x800121 <value_set_event+0x1>
4f8: 80 93 20 01 sts 0x0120, r24 ; 0x800120 <value_set_event>
4fc: 08 95 ret
000004fe <ultrasonic_get_timer_dist>:
}
uint16_t ultrasonic_get_timer_dist()
{
return timer_dist;
}
4fe: 80 91 1b 01 lds r24, 0x011B ; 0x80011b <timer_dist>
502: 90 91 1c 01 lds r25, 0x011C ; 0x80011c <timer_dist+0x1>
506: 08 95 ret
00000508 <snprintf>:
508: 0f 93 push r16
50a: 1f 93 push r17
50c: cf 93 push r28
50e: df 93 push r29
510: cd b7 in r28, 0x3d ; 61
512: de b7 in r29, 0x3e ; 62
514: 2e 97 sbiw r28, 0x0e ; 14
516: 0f b6 in r0, 0x3f ; 63
518: f8 94 cli
51a: de bf out 0x3e, r29 ; 62
51c: 0f be out 0x3f, r0 ; 63
51e: cd bf out 0x3d, r28 ; 61
520: 0d 89 ldd r16, Y+21 ; 0x15
522: 1e 89 ldd r17, Y+22 ; 0x16
524: 8f 89 ldd r24, Y+23 ; 0x17
526: 98 8d ldd r25, Y+24 ; 0x18
528: 26 e0 ldi r18, 0x06 ; 6
52a: 2c 83 std Y+4, r18 ; 0x04
52c: 1a 83 std Y+2, r17 ; 0x02
52e: 09 83 std Y+1, r16 ; 0x01
530: 97 ff sbrs r25, 7
532: 02 c0 rjmp .+4 ; 0x538 <snprintf+0x30>
534: 80 e0 ldi r24, 0x00 ; 0
536: 90 e8 ldi r25, 0x80 ; 128
538: 01 97 sbiw r24, 0x01 ; 1
53a: 9e 83 std Y+6, r25 ; 0x06
53c: 8d 83 std Y+5, r24 ; 0x05
53e: ae 01 movw r20, r28
540: 45 5e subi r20, 0xE5 ; 229
542: 5f 4f sbci r21, 0xFF ; 255
544: 69 8d ldd r22, Y+25 ; 0x19
546: 7a 8d ldd r23, Y+26 ; 0x1a
548: ce 01 movw r24, r28
54a: 01 96 adiw r24, 0x01 ; 1
54c: 19 d0 rcall .+50 ; 0x580 <vfprintf>
54e: 4d 81 ldd r20, Y+5 ; 0x05
550: 5e 81 ldd r21, Y+6 ; 0x06
552: 57 fd sbrc r21, 7
554: 0a c0 rjmp .+20 ; 0x56a <snprintf+0x62>
556: 2f 81 ldd r18, Y+7 ; 0x07
558: 38 85 ldd r19, Y+8 ; 0x08
55a: 42 17 cp r20, r18
55c: 53 07 cpc r21, r19
55e: 0c f4 brge .+2 ; 0x562 <snprintf+0x5a>
560: 9a 01 movw r18, r20
562: f8 01 movw r30, r16
564: e2 0f add r30, r18
566: f3 1f adc r31, r19
568: 10 82 st Z, r1
56a: 2e 96 adiw r28, 0x0e ; 14
56c: 0f b6 in r0, 0x3f ; 63
56e: f8 94 cli
570: de bf out 0x3e, r29 ; 62
572: 0f be out 0x3f, r0 ; 63
574: cd bf out 0x3d, r28 ; 61
576: df 91 pop r29
578: cf 91 pop r28
57a: 1f 91 pop r17
57c: 0f 91 pop r16
57e: 08 95 ret
00000580 <vfprintf>:
580: 2f 92 push r2
582: 3f 92 push r3
584: 4f 92 push r4
586: 5f 92 push r5
588: 6f 92 push r6
58a: 7f 92 push r7
58c: 8f 92 push r8
58e: 9f 92 push r9
590: af 92 push r10
592: bf 92 push r11
594: cf 92 push r12
596: df 92 push r13
598: ef 92 push r14
59a: ff 92 push r15
59c: 0f 93 push r16
59e: 1f 93 push r17
5a0: cf 93 push r28
5a2: df 93 push r29
5a4: cd b7 in r28, 0x3d ; 61
5a6: de b7 in r29, 0x3e ; 62
5a8: 2b 97 sbiw r28, 0x0b ; 11
5aa: 0f b6 in r0, 0x3f ; 63
5ac: f8 94 cli
5ae: de bf out 0x3e, r29 ; 62
5b0: 0f be out 0x3f, r0 ; 63
5b2: cd bf out 0x3d, r28 ; 61
5b4: 6c 01 movw r12, r24
5b6: 7b 01 movw r14, r22
5b8: 8a 01 movw r16, r20
5ba: fc 01 movw r30, r24
5bc: 17 82 std Z+7, r1 ; 0x07
5be: 16 82 std Z+6, r1 ; 0x06
5c0: 83 81 ldd r24, Z+3 ; 0x03
5c2: 81 ff sbrs r24, 1
5c4: bf c1 rjmp .+894 ; 0x944 <vfprintf+0x3c4>
5c6: ce 01 movw r24, r28
5c8: 01 96 adiw r24, 0x01 ; 1
5ca: 3c 01 movw r6, r24
5cc: f6 01 movw r30, r12
5ce: 93 81 ldd r25, Z+3 ; 0x03
5d0: f7 01 movw r30, r14
5d2: 93 fd sbrc r25, 3
5d4: 85 91 lpm r24, Z+
5d6: 93 ff sbrs r25, 3
5d8: 81 91 ld r24, Z+
5da: 7f 01 movw r14, r30
5dc: 88 23 and r24, r24
5de: 09 f4 brne .+2 ; 0x5e2 <vfprintf+0x62>
5e0: ad c1 rjmp .+858 ; 0x93c <vfprintf+0x3bc>
5e2: 85 32 cpi r24, 0x25 ; 37
5e4: 39 f4 brne .+14 ; 0x5f4 <vfprintf+0x74>
5e6: 93 fd sbrc r25, 3
5e8: 85 91 lpm r24, Z+
5ea: 93 ff sbrs r25, 3
5ec: 81 91 ld r24, Z+
5ee: 7f 01 movw r14, r30
5f0: 85 32 cpi r24, 0x25 ; 37
5f2: 21 f4 brne .+8 ; 0x5fc <vfprintf+0x7c>
5f4: b6 01 movw r22, r12
5f6: 90 e0 ldi r25, 0x00 ; 0
5f8: d6 d1 rcall .+940 ; 0x9a6 <fputc>
5fa: e8 cf rjmp .-48 ; 0x5cc <vfprintf+0x4c>
5fc: 91 2c mov r9, r1
5fe: 21 2c mov r2, r1
600: 31 2c mov r3, r1
602: ff e1 ldi r31, 0x1F ; 31
604: f3 15 cp r31, r3
606: d8 f0 brcs .+54 ; 0x63e <vfprintf+0xbe>
608: 8b 32 cpi r24, 0x2B ; 43
60a: 79 f0 breq .+30 ; 0x62a <vfprintf+0xaa>
60c: 38 f4 brcc .+14 ; 0x61c <vfprintf+0x9c>
60e: 80 32 cpi r24, 0x20 ; 32
610: 79 f0 breq .+30 ; 0x630 <vfprintf+0xb0>
612: 83 32 cpi r24, 0x23 ; 35
614: a1 f4 brne .+40 ; 0x63e <vfprintf+0xbe>
616: 23 2d mov r18, r3
618: 20 61 ori r18, 0x10 ; 16
61a: 1d c0 rjmp .+58 ; 0x656 <vfprintf+0xd6>
61c: 8d 32 cpi r24, 0x2D ; 45
61e: 61 f0 breq .+24 ; 0x638 <vfprintf+0xb8>
620: 80 33 cpi r24, 0x30 ; 48
622: 69 f4 brne .+26 ; 0x63e <vfprintf+0xbe>
624: 23 2d mov r18, r3
626: 21 60 ori r18, 0x01 ; 1
628: 16 c0 rjmp .+44 ; 0x656 <vfprintf+0xd6>
62a: 83 2d mov r24, r3
62c: 82 60 ori r24, 0x02 ; 2
62e: 38 2e mov r3, r24
630: e3 2d mov r30, r3
632: e4 60 ori r30, 0x04 ; 4
634: 3e 2e mov r3, r30
636: 2a c0 rjmp .+84 ; 0x68c <vfprintf+0x10c>
638: f3 2d mov r31, r3
63a: f8 60 ori r31, 0x08 ; 8
63c: 1d c0 rjmp .+58 ; 0x678 <vfprintf+0xf8>
63e: 37 fc sbrc r3, 7
640: 2d c0 rjmp .+90 ; 0x69c <vfprintf+0x11c>
642: 20 ed ldi r18, 0xD0 ; 208
644: 28 0f add r18, r24
646: 2a 30 cpi r18, 0x0A ; 10
648: 40 f0 brcs .+16 ; 0x65a <vfprintf+0xda>
64a: 8e 32 cpi r24, 0x2E ; 46
64c: b9 f4 brne .+46 ; 0x67c <vfprintf+0xfc>
64e: 36 fc sbrc r3, 6
650: 75 c1 rjmp .+746 ; 0x93c <vfprintf+0x3bc>
652: 23 2d mov r18, r3
654: 20 64 ori r18, 0x40 ; 64
656: 32 2e mov r3, r18
658: 19 c0 rjmp .+50 ; 0x68c <vfprintf+0x10c>
65a: 36 fe sbrs r3, 6
65c: 06 c0 rjmp .+12 ; 0x66a <vfprintf+0xea>
65e: 8a e0 ldi r24, 0x0A ; 10
660: 98 9e mul r9, r24
662: 20 0d add r18, r0
664: 11 24 eor r1, r1
666: 92 2e mov r9, r18
668: 11 c0 rjmp .+34 ; 0x68c <vfprintf+0x10c>
66a: ea e0 ldi r30, 0x0A ; 10
66c: 2e 9e mul r2, r30
66e: 20 0d add r18, r0
670: 11 24 eor r1, r1
672: 22 2e mov r2, r18
674: f3 2d mov r31, r3
676: f0 62 ori r31, 0x20 ; 32
678: 3f 2e mov r3, r31
67a: 08 c0 rjmp .+16 ; 0x68c <vfprintf+0x10c>
67c: 8c 36 cpi r24, 0x6C ; 108
67e: 21 f4 brne .+8 ; 0x688 <vfprintf+0x108>
680: 83 2d mov r24, r3
682: 80 68 ori r24, 0x80 ; 128
684: 38 2e mov r3, r24
686: 02 c0 rjmp .+4 ; 0x68c <vfprintf+0x10c>
688: 88 36 cpi r24, 0x68 ; 104
68a: 41 f4 brne .+16 ; 0x69c <vfprintf+0x11c>
68c: f7 01 movw r30, r14
68e: 93 fd sbrc r25, 3
690: 85 91 lpm r24, Z+
692: 93 ff sbrs r25, 3
694: 81 91 ld r24, Z+
696: 7f 01 movw r14, r30
698: 81 11 cpse r24, r1
69a: b3 cf rjmp .-154 ; 0x602 <vfprintf+0x82>
69c: 98 2f mov r25, r24
69e: 9f 7d andi r25, 0xDF ; 223
6a0: 95 54 subi r25, 0x45 ; 69
6a2: 93 30 cpi r25, 0x03 ; 3
6a4: 28 f4 brcc .+10 ; 0x6b0 <vfprintf+0x130>
6a6: 0c 5f subi r16, 0xFC ; 252
6a8: 1f 4f sbci r17, 0xFF ; 255
6aa: 9f e3 ldi r25, 0x3F ; 63
6ac: 99 83 std Y+1, r25 ; 0x01
6ae: 0d c0 rjmp .+26 ; 0x6ca <vfprintf+0x14a>
6b0: 83 36 cpi r24, 0x63 ; 99
6b2: 31 f0 breq .+12 ; 0x6c0 <vfprintf+0x140>
6b4: 83 37 cpi r24, 0x73 ; 115
6b6: 71 f0 breq .+28 ; 0x6d4 <vfprintf+0x154>
6b8: 83 35 cpi r24, 0x53 ; 83
6ba: 09 f0 breq .+2 ; 0x6be <vfprintf+0x13e>
6bc: 55 c0 rjmp .+170 ; 0x768 <vfprintf+0x1e8>
6be: 20 c0 rjmp .+64 ; 0x700 <vfprintf+0x180>
6c0: f8 01 movw r30, r16
6c2: 80 81 ld r24, Z
6c4: 89 83 std Y+1, r24 ; 0x01
6c6: 0e 5f subi r16, 0xFE ; 254
6c8: 1f 4f sbci r17, 0xFF ; 255
6ca: 88 24 eor r8, r8
6cc: 83 94 inc r8
6ce: 91 2c mov r9, r1
6d0: 53 01 movw r10, r6
6d2: 12 c0 rjmp .+36 ; 0x6f8 <vfprintf+0x178>
6d4: 28 01 movw r4, r16
6d6: f2 e0 ldi r31, 0x02 ; 2
6d8: 4f 0e add r4, r31
6da: 51 1c adc r5, r1
6dc: f8 01 movw r30, r16
6de: a0 80 ld r10, Z
6e0: b1 80 ldd r11, Z+1 ; 0x01
6e2: 36 fe sbrs r3, 6
6e4: 03 c0 rjmp .+6 ; 0x6ec <vfprintf+0x16c>
6e6: 69 2d mov r22, r9
6e8: 70 e0 ldi r23, 0x00 ; 0
6ea: 02 c0 rjmp .+4 ; 0x6f0 <vfprintf+0x170>
6ec: 6f ef ldi r22, 0xFF ; 255
6ee: 7f ef ldi r23, 0xFF ; 255
6f0: c5 01 movw r24, r10
6f2: 4e d1 rcall .+668 ; 0x990 <strnlen>
6f4: 4c 01 movw r8, r24
6f6: 82 01 movw r16, r4
6f8: f3 2d mov r31, r3
6fa: ff 77 andi r31, 0x7F ; 127
6fc: 3f 2e mov r3, r31
6fe: 15 c0 rjmp .+42 ; 0x72a <vfprintf+0x1aa>
700: 28 01 movw r4, r16
702: 22 e0 ldi r18, 0x02 ; 2
704: 42 0e add r4, r18
706: 51 1c adc r5, r1
708: f8 01 movw r30, r16
70a: a0 80 ld r10, Z
70c: b1 80 ldd r11, Z+1 ; 0x01
70e: 36 fe sbrs r3, 6
710: 03 c0 rjmp .+6 ; 0x718 <vfprintf+0x198>
712: 69 2d mov r22, r9
714: 70 e0 ldi r23, 0x00 ; 0
716: 02 c0 rjmp .+4 ; 0x71c <vfprintf+0x19c>
718: 6f ef ldi r22, 0xFF ; 255
71a: 7f ef ldi r23, 0xFF ; 255
71c: c5 01 movw r24, r10
71e: 2d d1 rcall .+602 ; 0x97a <strnlen_P>
720: 4c 01 movw r8, r24
722: f3 2d mov r31, r3
724: f0 68 ori r31, 0x80 ; 128
726: 3f 2e mov r3, r31
728: 82 01 movw r16, r4
72a: 33 fc sbrc r3, 3
72c: 19 c0 rjmp .+50 ; 0x760 <vfprintf+0x1e0>
72e: 82 2d mov r24, r2
730: 90 e0 ldi r25, 0x00 ; 0
732: 88 16 cp r8, r24
734: 99 06 cpc r9, r25
736: a0 f4 brcc .+40 ; 0x760 <vfprintf+0x1e0>
738: b6 01 movw r22, r12
73a: 80 e2 ldi r24, 0x20 ; 32
73c: 90 e0 ldi r25, 0x00 ; 0
73e: 33 d1 rcall .+614 ; 0x9a6 <fputc>
740: 2a 94 dec r2
742: f5 cf rjmp .-22 ; 0x72e <vfprintf+0x1ae>
744: f5 01 movw r30, r10
746: 37 fc sbrc r3, 7
748: 85 91 lpm r24, Z+
74a: 37 fe sbrs r3, 7
74c: 81 91 ld r24, Z+
74e: 5f 01 movw r10, r30
750: b6 01 movw r22, r12
752: 90 e0 ldi r25, 0x00 ; 0
754: 28 d1 rcall .+592 ; 0x9a6 <fputc>
756: 21 10 cpse r2, r1
758: 2a 94 dec r2
75a: 21 e0 ldi r18, 0x01 ; 1
75c: 82 1a sub r8, r18
75e: 91 08 sbc r9, r1
760: 81 14 cp r8, r1
762: 91 04 cpc r9, r1
764: 79 f7 brne .-34 ; 0x744 <vfprintf+0x1c4>
766: e1 c0 rjmp .+450 ; 0x92a <vfprintf+0x3aa>
768: 84 36 cpi r24, 0x64 ; 100
76a: 11 f0 breq .+4 ; 0x770 <vfprintf+0x1f0>
76c: 89 36 cpi r24, 0x69 ; 105
76e: 39 f5 brne .+78 ; 0x7be <vfprintf+0x23e>
770: f8 01 movw r30, r16
772: 37 fe sbrs r3, 7
774: 07 c0 rjmp .+14 ; 0x784 <vfprintf+0x204>
776: 60 81 ld r22, Z
778: 71 81 ldd r23, Z+1 ; 0x01
77a: 82 81 ldd r24, Z+2 ; 0x02
77c: 93 81 ldd r25, Z+3 ; 0x03
77e: 0c 5f subi r16, 0xFC ; 252
780: 1f 4f sbci r17, 0xFF ; 255
782: 08 c0 rjmp .+16 ; 0x794 <vfprintf+0x214>
784: 60 81 ld r22, Z
786: 71 81 ldd r23, Z+1 ; 0x01
788: 07 2e mov r0, r23
78a: 00 0c add r0, r0
78c: 88 0b sbc r24, r24
78e: 99 0b sbc r25, r25
790: 0e 5f subi r16, 0xFE ; 254
792: 1f 4f sbci r17, 0xFF ; 255
794: f3 2d mov r31, r3
796: ff 76 andi r31, 0x6F ; 111
798: 3f 2e mov r3, r31
79a: 97 ff sbrs r25, 7
79c: 09 c0 rjmp .+18 ; 0x7b0 <vfprintf+0x230>
79e: 90 95 com r25
7a0: 80 95 com r24
7a2: 70 95 com r23
7a4: 61 95 neg r22
7a6: 7f 4f sbci r23, 0xFF ; 255
7a8: 8f 4f sbci r24, 0xFF ; 255
7aa: 9f 4f sbci r25, 0xFF ; 255
7ac: f0 68 ori r31, 0x80 ; 128
7ae: 3f 2e mov r3, r31
7b0: 2a e0 ldi r18, 0x0A ; 10
7b2: 30 e0 ldi r19, 0x00 ; 0
7b4: a3 01 movw r20, r6
7b6: 33 d1 rcall .+614 ; 0xa1e <__ultoa_invert>
7b8: 88 2e mov r8, r24
7ba: 86 18 sub r8, r6
7bc: 44 c0 rjmp .+136 ; 0x846 <vfprintf+0x2c6>
7be: 85 37 cpi r24, 0x75 ; 117
7c0: 31 f4 brne .+12 ; 0x7ce <vfprintf+0x24e>
7c2: 23 2d mov r18, r3
7c4: 2f 7e andi r18, 0xEF ; 239
7c6: b2 2e mov r11, r18
7c8: 2a e0 ldi r18, 0x0A ; 10
7ca: 30 e0 ldi r19, 0x00 ; 0
7cc: 25 c0 rjmp .+74 ; 0x818 <vfprintf+0x298>
7ce: 93 2d mov r25, r3
7d0: 99 7f andi r25, 0xF9 ; 249
7d2: b9 2e mov r11, r25
7d4: 8f 36 cpi r24, 0x6F ; 111
7d6: c1 f0 breq .+48 ; 0x808 <vfprintf+0x288>
7d8: 18 f4 brcc .+6 ; 0x7e0 <vfprintf+0x260>
7da: 88 35 cpi r24, 0x58 ; 88
7dc: 79 f0 breq .+30 ; 0x7fc <vfprintf+0x27c>
7de: ae c0 rjmp .+348 ; 0x93c <vfprintf+0x3bc>
7e0: 80 37 cpi r24, 0x70 ; 112
7e2: 19 f0 breq .+6 ; 0x7ea <vfprintf+0x26a>
7e4: 88 37 cpi r24, 0x78 ; 120
7e6: 21 f0 breq .+8 ; 0x7f0 <vfprintf+0x270>
7e8: a9 c0 rjmp .+338 ; 0x93c <vfprintf+0x3bc>
7ea: e9 2f mov r30, r25
7ec: e0 61 ori r30, 0x10 ; 16
7ee: be 2e mov r11, r30
7f0: b4 fe sbrs r11, 4
7f2: 0d c0 rjmp .+26 ; 0x80e <vfprintf+0x28e>
7f4: fb 2d mov r31, r11
7f6: f4 60 ori r31, 0x04 ; 4
7f8: bf 2e mov r11, r31
7fa: 09 c0 rjmp .+18 ; 0x80e <vfprintf+0x28e>
7fc: 34 fe sbrs r3, 4
7fe: 0a c0 rjmp .+20 ; 0x814 <vfprintf+0x294>
800: 29 2f mov r18, r25
802: 26 60 ori r18, 0x06 ; 6
804: b2 2e mov r11, r18
806: 06 c0 rjmp .+12 ; 0x814 <vfprintf+0x294>
808: 28 e0 ldi r18, 0x08 ; 8
80a: 30 e0 ldi r19, 0x00 ; 0
80c: 05 c0 rjmp .+10 ; 0x818 <vfprintf+0x298>
80e: 20 e1 ldi r18, 0x10 ; 16
810: 30 e0 ldi r19, 0x00 ; 0
812: 02 c0 rjmp .+4 ; 0x818 <vfprintf+0x298>
814: 20 e1 ldi r18, 0x10 ; 16
816: 32 e0 ldi r19, 0x02 ; 2
818: f8 01 movw r30, r16
81a: b7 fe sbrs r11, 7
81c: 07 c0 rjmp .+14 ; 0x82c <vfprintf+0x2ac>
81e: 60 81 ld r22, Z
820: 71 81 ldd r23, Z+1 ; 0x01
822: 82 81 ldd r24, Z+2 ; 0x02
824: 93 81 ldd r25, Z+3 ; 0x03
826: 0c 5f subi r16, 0xFC ; 252
828: 1f 4f sbci r17, 0xFF ; 255
82a: 06 c0 rjmp .+12 ; 0x838 <vfprintf+0x2b8>
82c: 60 81 ld r22, Z
82e: 71 81 ldd r23, Z+1 ; 0x01
830: 80 e0 ldi r24, 0x00 ; 0
832: 90 e0 ldi r25, 0x00 ; 0
834: 0e 5f subi r16, 0xFE ; 254
836: 1f 4f sbci r17, 0xFF ; 255
838: a3 01 movw r20, r6
83a: f1 d0 rcall .+482 ; 0xa1e <__ultoa_invert>
83c: 88 2e mov r8, r24
83e: 86 18 sub r8, r6
840: fb 2d mov r31, r11
842: ff 77 andi r31, 0x7F ; 127
844: 3f 2e mov r3, r31
846: 36 fe sbrs r3, 6
848: 0d c0 rjmp .+26 ; 0x864 <vfprintf+0x2e4>
84a: 23 2d mov r18, r3
84c: 2e 7f andi r18, 0xFE ; 254
84e: a2 2e mov r10, r18
850: 89 14 cp r8, r9
852: 58 f4 brcc .+22 ; 0x86a <vfprintf+0x2ea>
854: 34 fe sbrs r3, 4
856: 0b c0 rjmp .+22 ; 0x86e <vfprintf+0x2ee>
858: 32 fc sbrc r3, 2
85a: 09 c0 rjmp .+18 ; 0x86e <vfprintf+0x2ee>
85c: 83 2d mov r24, r3
85e: 8e 7e andi r24, 0xEE ; 238
860: a8 2e mov r10, r24
862: 05 c0 rjmp .+10 ; 0x86e <vfprintf+0x2ee>
864: b8 2c mov r11, r8
866: a3 2c mov r10, r3
868: 03 c0 rjmp .+6 ; 0x870 <vfprintf+0x2f0>
86a: b8 2c mov r11, r8
86c: 01 c0 rjmp .+2 ; 0x870 <vfprintf+0x2f0>
86e: b9 2c mov r11, r9
870: a4 fe sbrs r10, 4
872: 0f c0 rjmp .+30 ; 0x892 <vfprintf+0x312>
874: fe 01 movw r30, r28
876: e8 0d add r30, r8
878: f1 1d adc r31, r1
87a: 80 81 ld r24, Z
87c: 80 33 cpi r24, 0x30 ; 48
87e: 21 f4 brne .+8 ; 0x888 <vfprintf+0x308>
880: 9a 2d mov r25, r10
882: 99 7e andi r25, 0xE9 ; 233
884: a9 2e mov r10, r25
886: 09 c0 rjmp .+18 ; 0x89a <vfprintf+0x31a>
888: a2 fe sbrs r10, 2
88a: 06 c0 rjmp .+12 ; 0x898 <vfprintf+0x318>
88c: b3 94 inc r11
88e: b3 94 inc r11
890: 04 c0 rjmp .+8 ; 0x89a <vfprintf+0x31a>
892: 8a 2d mov r24, r10
894: 86 78 andi r24, 0x86 ; 134
896: 09 f0 breq .+2 ; 0x89a <vfprintf+0x31a>
898: b3 94 inc r11
89a: a3 fc sbrc r10, 3
89c: 10 c0 rjmp .+32 ; 0x8be <vfprintf+0x33e>
89e: a0 fe sbrs r10, 0
8a0: 06 c0 rjmp .+12 ; 0x8ae <vfprintf+0x32e>
8a2: b2 14 cp r11, r2
8a4: 80 f4 brcc .+32 ; 0x8c6 <vfprintf+0x346>
8a6: 28 0c add r2, r8
8a8: 92 2c mov r9, r2
8aa: 9b 18 sub r9, r11
8ac: 0d c0 rjmp .+26 ; 0x8c8 <vfprintf+0x348>
8ae: b2 14 cp r11, r2
8b0: 58 f4 brcc .+22 ; 0x8c8 <vfprintf+0x348>
8b2: b6 01 movw r22, r12
8b4: 80 e2 ldi r24, 0x20 ; 32
8b6: 90 e0 ldi r25, 0x00 ; 0
8b8: 76 d0 rcall .+236 ; 0x9a6 <fputc>
8ba: b3 94 inc r11
8bc: f8 cf rjmp .-16 ; 0x8ae <vfprintf+0x32e>
8be: b2 14 cp r11, r2
8c0: 18 f4 brcc .+6 ; 0x8c8 <vfprintf+0x348>
8c2: 2b 18 sub r2, r11
8c4: 02 c0 rjmp .+4 ; 0x8ca <vfprintf+0x34a>
8c6: 98 2c mov r9, r8
8c8: 21 2c mov r2, r1
8ca: a4 fe sbrs r10, 4
8cc: 0f c0 rjmp .+30 ; 0x8ec <vfprintf+0x36c>
8ce: b6 01 movw r22, r12
8d0: 80 e3 ldi r24, 0x30 ; 48
8d2: 90 e0 ldi r25, 0x00 ; 0
8d4: 68 d0 rcall .+208 ; 0x9a6 <fputc>
8d6: a2 fe sbrs r10, 2
8d8: 16 c0 rjmp .+44 ; 0x906 <vfprintf+0x386>
8da: a1 fc sbrc r10, 1
8dc: 03 c0 rjmp .+6 ; 0x8e4 <vfprintf+0x364>
8de: 88 e7 ldi r24, 0x78 ; 120
8e0: 90 e0 ldi r25, 0x00 ; 0
8e2: 02 c0 rjmp .+4 ; 0x8e8 <vfprintf+0x368>
8e4: 88 e5 ldi r24, 0x58 ; 88
8e6: 90 e0 ldi r25, 0x00 ; 0
8e8: b6 01 movw r22, r12
8ea: 0c c0 rjmp .+24 ; 0x904 <vfprintf+0x384>
8ec: 8a 2d mov r24, r10
8ee: 86 78 andi r24, 0x86 ; 134
8f0: 51 f0 breq .+20 ; 0x906 <vfprintf+0x386>
8f2: a1 fe sbrs r10, 1
8f4: 02 c0 rjmp .+4 ; 0x8fa <vfprintf+0x37a>
8f6: 8b e2 ldi r24, 0x2B ; 43
8f8: 01 c0 rjmp .+2 ; 0x8fc <vfprintf+0x37c>
8fa: 80 e2 ldi r24, 0x20 ; 32
8fc: a7 fc sbrc r10, 7
8fe: 8d e2 ldi r24, 0x2D ; 45
900: b6 01 movw r22, r12
902: 90 e0 ldi r25, 0x00 ; 0
904: 50 d0 rcall .+160 ; 0x9a6 <fputc>
906: 89 14 cp r8, r9
908: 30 f4 brcc .+12 ; 0x916 <vfprintf+0x396>
90a: b6 01 movw r22, r12
90c: 80 e3 ldi r24, 0x30 ; 48
90e: 90 e0 ldi r25, 0x00 ; 0
910: 4a d0 rcall .+148 ; 0x9a6 <fputc>
912: 9a 94 dec r9
914: f8 cf rjmp .-16 ; 0x906 <vfprintf+0x386>
916: 8a 94 dec r8
918: f3 01 movw r30, r6
91a: e8 0d add r30, r8
91c: f1 1d adc r31, r1
91e: 80 81 ld r24, Z
920: b6 01 movw r22, r12
922: 90 e0 ldi r25, 0x00 ; 0
924: 40 d0 rcall .+128 ; 0x9a6 <fputc>
926: 81 10 cpse r8, r1
928: f6 cf rjmp .-20 ; 0x916 <vfprintf+0x396>
92a: 22 20 and r2, r2
92c: 09 f4 brne .+2 ; 0x930 <vfprintf+0x3b0>
92e: 4e ce rjmp .-868 ; 0x5cc <vfprintf+0x4c>
930: b6 01 movw r22, r12
932: 80 e2 ldi r24, 0x20 ; 32
934: 90 e0 ldi r25, 0x00 ; 0
936: 37 d0 rcall .+110 ; 0x9a6 <fputc>
938: 2a 94 dec r2
93a: f7 cf rjmp .-18 ; 0x92a <vfprintf+0x3aa>
93c: f6 01 movw r30, r12
93e: 86 81 ldd r24, Z+6 ; 0x06
940: 97 81 ldd r25, Z+7 ; 0x07
942: 02 c0 rjmp .+4 ; 0x948 <vfprintf+0x3c8>
944: 8f ef ldi r24, 0xFF ; 255
946: 9f ef ldi r25, 0xFF ; 255
948: 2b 96 adiw r28, 0x0b ; 11
94a: 0f b6 in r0, 0x3f ; 63
94c: f8 94 cli
94e: de bf out 0x3e, r29 ; 62
950: 0f be out 0x3f, r0 ; 63
952: cd bf out 0x3d, r28 ; 61
954: df 91 pop r29
956: cf 91 pop r28
958: 1f 91 pop r17
95a: 0f 91 pop r16
95c: ff 90 pop r15
95e: ef 90 pop r14
960: df 90 pop r13
962: cf 90 pop r12
964: bf 90 pop r11
966: af 90 pop r10
968: 9f 90 pop r9
96a: 8f 90 pop r8
96c: 7f 90 pop r7
96e: 6f 90 pop r6
970: 5f 90 pop r5
972: 4f 90 pop r4
974: 3f 90 pop r3
976: 2f 90 pop r2
978: 08 95 ret
0000097a <strnlen_P>:
97a: fc 01 movw r30, r24
97c: 05 90 lpm r0, Z+
97e: 61 50 subi r22, 0x01 ; 1
980: 70 40 sbci r23, 0x00 ; 0
982: 01 10 cpse r0, r1
984: d8 f7 brcc .-10 ; 0x97c <strnlen_P+0x2>
986: 80 95 com r24
988: 90 95 com r25
98a: 8e 0f add r24, r30
98c: 9f 1f adc r25, r31
98e: 08 95 ret
00000990 <strnlen>:
990: fc 01 movw r30, r24
992: 61 50 subi r22, 0x01 ; 1
994: 70 40 sbci r23, 0x00 ; 0
996: 01 90 ld r0, Z+
998: 01 10 cpse r0, r1
99a: d8 f7 brcc .-10 ; 0x992 <strnlen+0x2>
99c: 80 95 com r24
99e: 90 95 com r25
9a0: 8e 0f add r24, r30
9a2: 9f 1f adc r25, r31
9a4: 08 95 ret
000009a6 <fputc>:
9a6: 0f 93 push r16
9a8: 1f 93 push r17
9aa: cf 93 push r28
9ac: df 93 push r29
9ae: fb 01 movw r30, r22
9b0: 23 81 ldd r18, Z+3 ; 0x03
9b2: 21 fd sbrc r18, 1
9b4: 03 c0 rjmp .+6 ; 0x9bc <fputc+0x16>
9b6: 8f ef ldi r24, 0xFF ; 255
9b8: 9f ef ldi r25, 0xFF ; 255
9ba: 2c c0 rjmp .+88 ; 0xa14 <fputc+0x6e>
9bc: 22 ff sbrs r18, 2
9be: 16 c0 rjmp .+44 ; 0x9ec <fputc+0x46>
9c0: 46 81 ldd r20, Z+6 ; 0x06
9c2: 57 81 ldd r21, Z+7 ; 0x07
9c4: 24 81 ldd r18, Z+4 ; 0x04
9c6: 35 81 ldd r19, Z+5 ; 0x05
9c8: 42 17 cp r20, r18
9ca: 53 07 cpc r21, r19
9cc: 44 f4 brge .+16 ; 0x9de <fputc+0x38>
9ce: a0 81 ld r26, Z
9d0: b1 81 ldd r27, Z+1 ; 0x01
9d2: 9d 01 movw r18, r26
9d4: 2f 5f subi r18, 0xFF ; 255
9d6: 3f 4f sbci r19, 0xFF ; 255
9d8: 31 83 std Z+1, r19 ; 0x01
9da: 20 83 st Z, r18
9dc: 8c 93 st X, r24
9de: 26 81 ldd r18, Z+6 ; 0x06
9e0: 37 81 ldd r19, Z+7 ; 0x07
9e2: 2f 5f subi r18, 0xFF ; 255
9e4: 3f 4f sbci r19, 0xFF ; 255
9e6: 37 83 std Z+7, r19 ; 0x07
9e8: 26 83 std Z+6, r18 ; 0x06
9ea: 14 c0 rjmp .+40 ; 0xa14 <fputc+0x6e>
9ec: 8b 01 movw r16, r22
9ee: ec 01 movw r28, r24
9f0: fb 01 movw r30, r22
9f2: 00 84 ldd r0, Z+8 ; 0x08
9f4: f1 85 ldd r31, Z+9 ; 0x09
9f6: e0 2d mov r30, r0
9f8: 09 95 icall
9fa: 89 2b or r24, r25
9fc: e1 f6 brne .-72 ; 0x9b6 <fputc+0x10>
9fe: d8 01 movw r26, r16
a00: 16 96 adiw r26, 0x06 ; 6
a02: 8d 91 ld r24, X+
a04: 9c 91 ld r25, X
a06: 17 97 sbiw r26, 0x07 ; 7
a08: 01 96 adiw r24, 0x01 ; 1
a0a: 17 96 adiw r26, 0x07 ; 7
a0c: 9c 93 st X, r25
a0e: 8e 93 st -X, r24
a10: 16 97 sbiw r26, 0x06 ; 6
a12: ce 01 movw r24, r28
a14: df 91 pop r29
a16: cf 91 pop r28
a18: 1f 91 pop r17
a1a: 0f 91 pop r16
a1c: 08 95 ret
00000a1e <__ultoa_invert>:
a1e: fa 01 movw r30, r20
a20: aa 27 eor r26, r26
a22: 28 30 cpi r18, 0x08 ; 8
a24: 51 f1 breq .+84 ; 0xa7a <__ultoa_invert+0x5c>
a26: 20 31 cpi r18, 0x10 ; 16
a28: 81 f1 breq .+96 ; 0xa8a <__ultoa_invert+0x6c>
a2a: e8 94 clt
a2c: 6f 93 push r22
a2e: 6e 7f andi r22, 0xFE ; 254
a30: 6e 5f subi r22, 0xFE ; 254
a32: 7f 4f sbci r23, 0xFF ; 255
a34: 8f 4f sbci r24, 0xFF ; 255
a36: 9f 4f sbci r25, 0xFF ; 255
a38: af 4f sbci r26, 0xFF ; 255
a3a: b1 e0 ldi r27, 0x01 ; 1
a3c: 3e d0 rcall .+124 ; 0xaba <__ultoa_invert+0x9c>
a3e: b4 e0 ldi r27, 0x04 ; 4
a40: 3c d0 rcall .+120 ; 0xaba <__ultoa_invert+0x9c>
a42: 67 0f add r22, r23
a44: 78 1f adc r23, r24
a46: 89 1f adc r24, r25
a48: 9a 1f adc r25, r26
a4a: a1 1d adc r26, r1
a4c: 68 0f add r22, r24
a4e: 79 1f adc r23, r25
a50: 8a 1f adc r24, r26
a52: 91 1d adc r25, r1
a54: a1 1d adc r26, r1
a56: 6a 0f add r22, r26
a58: 71 1d adc r23, r1
a5a: 81 1d adc r24, r1
a5c: 91 1d adc r25, r1
a5e: a1 1d adc r26, r1
a60: 20 d0 rcall .+64 ; 0xaa2 <__ultoa_invert+0x84>
a62: 09 f4 brne .+2 ; 0xa66 <__ultoa_invert+0x48>
a64: 68 94 set
a66: 3f 91 pop r19
a68: 2a e0 ldi r18, 0x0A ; 10
a6a: 26 9f mul r18, r22
a6c: 11 24 eor r1, r1
a6e: 30 19 sub r19, r0
a70: 30 5d subi r19, 0xD0 ; 208
a72: 31 93 st Z+, r19
a74: de f6 brtc .-74 ; 0xa2c <__ultoa_invert+0xe>
a76: cf 01 movw r24, r30
a78: 08 95 ret
a7a: 46 2f mov r20, r22
a7c: 47 70 andi r20, 0x07 ; 7
a7e: 40 5d subi r20, 0xD0 ; 208
a80: 41 93 st Z+, r20
a82: b3 e0 ldi r27, 0x03 ; 3
a84: 0f d0 rcall .+30 ; 0xaa4 <__ultoa_invert+0x86>
a86: c9 f7 brne .-14 ; 0xa7a <__ultoa_invert+0x5c>
a88: f6 cf rjmp .-20 ; 0xa76 <__ultoa_invert+0x58>
a8a: 46 2f mov r20, r22
a8c: 4f 70 andi r20, 0x0F ; 15
a8e: 40 5d subi r20, 0xD0 ; 208
a90: 4a 33 cpi r20, 0x3A ; 58
a92: 18 f0 brcs .+6 ; 0xa9a <__ultoa_invert+0x7c>
a94: 49 5d subi r20, 0xD9 ; 217
a96: 31 fd sbrc r19, 1
a98: 40 52 subi r20, 0x20 ; 32
a9a: 41 93 st Z+, r20
a9c: 02 d0 rcall .+4 ; 0xaa2 <__ultoa_invert+0x84>
a9e: a9 f7 brne .-22 ; 0xa8a <__ultoa_invert+0x6c>
aa0: ea cf rjmp .-44 ; 0xa76 <__ultoa_invert+0x58>
aa2: b4 e0 ldi r27, 0x04 ; 4
aa4: a6 95 lsr r26
aa6: 97 95 ror r25
aa8: 87 95 ror r24
aaa: 77 95 ror r23
aac: 67 95 ror r22
aae: ba 95 dec r27
ab0: c9 f7 brne .-14 ; 0xaa4 <__ultoa_invert+0x86>
ab2: 00 97 sbiw r24, 0x00 ; 0
ab4: 61 05 cpc r22, r1
ab6: 71 05 cpc r23, r1
ab8: 08 95 ret
aba: 9b 01 movw r18, r22
abc: ac 01 movw r20, r24
abe: 0a 2e mov r0, r26
ac0: 06 94 lsr r0
ac2: 57 95 ror r21
ac4: 47 95 ror r20
ac6: 37 95 ror r19
ac8: 27 95 ror r18
aca: ba 95 dec r27
acc: c9 f7 brne .-14 ; 0xac0 <__ultoa_invert+0xa2>
ace: 62 0f add r22, r18
ad0: 73 1f adc r23, r19
ad2: 84 1f adc r24, r20
ad4: 95 1f adc r25, r21
ad6: a0 1d adc r26, r0
ad8: 08 95 ret
00000ada <_exit>:
ada: f8 94 cli
00000adc <__stop_program>:
adc: ff cf rjmp .-2 ; 0xadc <__stop_program>