From c8839a017dd34907f6911632f166ba8ac1c75c1e Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Wed, 17 Mar 2021 12:02:02 +0100 Subject: [PATCH 01/11] [ADD] reading echo in oscilloscope --- Microcontrollers/Microcontrollers.atsln | 16 +- .../opdracht 4.b1/opdracht 4.b1.cproj | 20 +- .../ultrasonicSensor/Debug/Makefile | 139 +++++++++++ .../ultrasonicSensor/Debug/makedep.mk | 8 + .../Debug/ultrasonicSensor.eep | 1 + .../Debug/ultrasonicSensor.lss | 231 ++++++++++++++++++ .../Debug/ultrasonicSensor.srec | 20 ++ .../ultrasonicSensor/lcd_control.c | 133 ++++++++++ .../ultrasonicSensor/lcd_control.h | 30 +++ Microcontrollers/ultrasonicSensor/main.c | 54 ++++ .../ultrasonicSensor.componentinfo.xml | 86 +++++++ .../ultrasonicSensor/ultrasonicSensor.cproj | 124 ++++++++++ 12 files changed, 856 insertions(+), 6 deletions(-) create mode 100644 Microcontrollers/ultrasonicSensor/Debug/Makefile create mode 100644 Microcontrollers/ultrasonicSensor/Debug/makedep.mk create mode 100644 Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.eep create mode 100644 Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss create mode 100644 Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec create mode 100644 Microcontrollers/ultrasonicSensor/lcd_control.c create mode 100644 Microcontrollers/ultrasonicSensor/lcd_control.h create mode 100644 Microcontrollers/ultrasonicSensor/main.c create mode 100644 Microcontrollers/ultrasonicSensor/ultrasonicSensor.componentinfo.xml create mode 100644 Microcontrollers/ultrasonicSensor/ultrasonicSensor.cproj diff --git a/Microcontrollers/Microcontrollers.atsln b/Microcontrollers/Microcontrollers.atsln index 54fcc36..c520ce5 100644 --- a/Microcontrollers/Microcontrollers.atsln +++ b/Microcontrollers/Microcontrollers.atsln @@ -29,7 +29,9 @@ Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 2.4", "opdracht 2. EndProject Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 3.3", "opdracht 3.3\opdracht 3.3.cproj", "{985D5C75-F61E-49F1-A532-66A1E6141552}" EndProject -Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 4.1", "opdracht 4.1\opdracht 4.1.cproj", "{2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}" +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 4.b1", "opdracht 4.b1\opdracht 4.b1.cproj", "{314FE495-A311-499D-B63E-4B5E7B7F2054}" +EndProject +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "ultrasonicSensor", "ultrasonicSensor\ultrasonicSensor.cproj", "{26DA64DE-DD48-4718-94B5-81F9EC5D4B33}" EndProject Global GlobalSection(SolutionConfigurationPlatforms) = preSolution @@ -89,10 +91,14 @@ Global {985D5C75-F61E-49F1-A532-66A1E6141552}.Debug|AVR.Build.0 = Debug|AVR {985D5C75-F61E-49F1-A532-66A1E6141552}.Release|AVR.ActiveCfg = Release|AVR {985D5C75-F61E-49F1-A532-66A1E6141552}.Release|AVR.Build.0 = Release|AVR - {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Debug|AVR.ActiveCfg = Debug|AVR - {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Debug|AVR.Build.0 = Debug|AVR - {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Release|AVR.ActiveCfg = Release|AVR - {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Release|AVR.Build.0 = Release|AVR + {314FE495-A311-499D-B63E-4B5E7B7F2054}.Debug|AVR.ActiveCfg = Debug|AVR + {314FE495-A311-499D-B63E-4B5E7B7F2054}.Debug|AVR.Build.0 = Debug|AVR + {314FE495-A311-499D-B63E-4B5E7B7F2054}.Release|AVR.ActiveCfg = Release|AVR + {314FE495-A311-499D-B63E-4B5E7B7F2054}.Release|AVR.Build.0 = Release|AVR + {26DA64DE-DD48-4718-94B5-81F9EC5D4B33}.Debug|AVR.ActiveCfg = Debug|AVR + {26DA64DE-DD48-4718-94B5-81F9EC5D4B33}.Debug|AVR.Build.0 = Debug|AVR + {26DA64DE-DD48-4718-94B5-81F9EC5D4B33}.Release|AVR.ActiveCfg = Release|AVR + {26DA64DE-DD48-4718-94B5-81F9EC5D4B33}.Release|AVR.Build.0 = Release|AVR EndGlobalSection GlobalSection(SolutionProperties) = preSolution HideSolutionNode = FALSE diff --git a/Microcontrollers/opdracht 4.b1/opdracht 4.b1.cproj b/Microcontrollers/opdracht 4.b1/opdracht 4.b1.cproj index ad47ba0..70a3a7b 100644 --- a/Microcontrollers/opdracht 4.b1/opdracht 4.b1.cproj +++ b/Microcontrollers/opdracht 4.b1/opdracht 4.b1.cproj @@ -4,7 +4,7 @@ 2.0 7.0 com.Atmel.AVRGCC8.C - dce6c7e3-ee26-4d79-826b-08594b9ad897 + {314fe495-a311-499d-b63e-4b5e7b7f2054} ATmega128 none Executable @@ -15,6 +15,19 @@ opdracht 4.b1 opdracht 4.b1 opdracht 4.b1 + Native + true + false + true + true + + + true + + 2 + 0 + 0 + @@ -24,5 +37,10 @@ + + + compile + + \ No newline at end of file diff --git a/Microcontrollers/ultrasonicSensor/Debug/Makefile b/Microcontrollers/ultrasonicSensor/Debug/Makefile new file mode 100644 index 0000000..ff7d88c --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/Debug/Makefile @@ -0,0 +1,139 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +SHELL := cmd.exe +RM := rm -rf + +USER_OBJS := + +LIBS := +PROJ := + +O_SRCS := +C_SRCS := +S_SRCS := +S_UPPER_SRCS := +OBJ_SRCS := +ASM_SRCS := +PREPROCESSING_SRCS := +OBJS := +OBJS_AS_ARGS := +C_DEPS := +C_DEPS_AS_ARGS := +EXECUTABLES := +OUTPUT_FILE_PATH := +OUTPUT_FILE_PATH_AS_ARGS := +AVR_APP_PATH :=$$$AVR_APP_PATH$$$ +QUOTE := " +ADDITIONAL_DEPENDENCIES:= +OUTPUT_FILE_DEP:= +LIB_DEP:= +LINKER_SCRIPT_DEP:= + +# Every subdirectory with source files must be described here +SUBDIRS := + + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../lcd_control.c \ +../main.c + + +PREPROCESSING_SRCS += + + +ASM_SRCS += + + +OBJS += \ +lcd_control.o \ +main.o + +OBJS_AS_ARGS += \ +lcd_control.o \ +main.o + +C_DEPS += \ +lcd_control.d \ +main.d + +C_DEPS_AS_ARGS += \ +lcd_control.d \ +main.d + +OUTPUT_FILE_PATH +=ultrasonicSensor.elf + +OUTPUT_FILE_PATH_AS_ARGS +=ultrasonicSensor.elf + +ADDITIONAL_DEPENDENCIES:= + +OUTPUT_FILE_DEP:= ./makedep.mk + +LIB_DEP+= + +LINKER_SCRIPT_DEP+= + + +# AVR32/GNU C Compiler +./lcd_control.o: .././lcd_control.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include" -Og -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -mrelax -g2 -Wall -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +./main.o: .././main.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include" -Og -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -mrelax -g2 -Wall -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + + + + +# AVR32/GNU Preprocessing Assembler + + + +# AVR32/GNU Assembler + + + + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +# Add inputs and outputs from these tool invocations to the build variables + +# All Target +all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES) + +$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP) + @echo Building target: $@ + @echo Invoking: AVR/GNU Linker : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="ultrasonicSensor.map" -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mrelax -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + @echo Finished building target: $@ + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "ultrasonicSensor.elf" "ultrasonicSensor.hex" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "ultrasonicSensor.elf" "ultrasonicSensor.eep" || exit 0 + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "ultrasonicSensor.elf" > "ultrasonicSensor.lss" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "ultrasonicSensor.elf" "ultrasonicSensor.srec" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "ultrasonicSensor.elf" + + + + + + + +# Other Targets +clean: + -$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES) + -$(RM) $(C_DEPS_AS_ARGS) + rm -rf "ultrasonicSensor.elf" "ultrasonicSensor.a" "ultrasonicSensor.hex" "ultrasonicSensor.lss" "ultrasonicSensor.eep" "ultrasonicSensor.map" "ultrasonicSensor.srec" "ultrasonicSensor.usersignatures" + \ No newline at end of file diff --git a/Microcontrollers/ultrasonicSensor/Debug/makedep.mk b/Microcontrollers/ultrasonicSensor/Debug/makedep.mk new file mode 100644 index 0000000..c9e4784 --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/Debug/makedep.mk @@ -0,0 +1,8 @@ +################################################################################ +# Automatically-generated file. Do not edit or delete the file +################################################################################ + +lcd_control.c + +main.c + diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.eep b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.eep new file mode 100644 index 0000000..7c166a1 --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.eep @@ -0,0 +1 @@ +:00000001FF diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss new file mode 100644 index 0000000..bed2744 --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss @@ -0,0 +1,231 @@ + +ultrasonicSensor.elf: file format elf32-avr + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .data 00000000 00800100 00800100 00000166 2**0 + CONTENTS, ALLOC, LOAD, DATA + 1 .text 00000112 00000000 00000000 00000054 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .comment 00000030 00000000 00000000 00000166 2**0 + CONTENTS, READONLY + 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000198 2**2 + CONTENTS, READONLY + 4 .debug_aranges 00000030 00000000 00000000 000001d4 2**0 + CONTENTS, READONLY, DEBUGGING + 5 .debug_info 000009ad 00000000 00000000 00000204 2**0 + CONTENTS, READONLY, DEBUGGING + 6 .debug_abbrev 0000084e 00000000 00000000 00000bb1 2**0 + CONTENTS, READONLY, DEBUGGING + 7 .debug_line 0000030d 00000000 00000000 000013ff 2**0 + CONTENTS, READONLY, DEBUGGING + 8 .debug_frame 00000044 00000000 00000000 0000170c 2**2 + CONTENTS, READONLY, DEBUGGING + 9 .debug_str 0000043a 00000000 00000000 00001750 2**0 + CONTENTS, READONLY, DEBUGGING + 10 .debug_loc 000000d2 00000000 00000000 00001b8a 2**0 + CONTENTS, READONLY, DEBUGGING + 11 .debug_ranges 00000020 00000000 00000000 00001c5c 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +00000000 <__vectors>: + 0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end> + 2: 00 00 nop + 4: 58 c0 rjmp .+176 ; 0xb6 <__bad_interrupt> + 6: 00 00 nop + 8: 56 c0 rjmp .+172 ; 0xb6 <__bad_interrupt> + a: 00 00 nop + c: 54 c0 rjmp .+168 ; 0xb6 <__bad_interrupt> + e: 00 00 nop + 10: 52 c0 rjmp .+164 ; 0xb6 <__bad_interrupt> + 12: 00 00 nop + 14: 50 c0 rjmp .+160 ; 0xb6 <__bad_interrupt> + 16: 00 00 nop + 18: 4e c0 rjmp .+156 ; 0xb6 <__bad_interrupt> + 1a: 00 00 nop + 1c: 4c c0 rjmp .+152 ; 0xb6 <__bad_interrupt> + 1e: 00 00 nop + 20: 4a c0 rjmp .+148 ; 0xb6 <__bad_interrupt> + 22: 00 00 nop + 24: 48 c0 rjmp .+144 ; 0xb6 <__bad_interrupt> + 26: 00 00 nop + 28: 46 c0 rjmp .+140 ; 0xb6 <__bad_interrupt> + 2a: 00 00 nop + 2c: 44 c0 rjmp .+136 ; 0xb6 <__bad_interrupt> + 2e: 00 00 nop + 30: 42 c0 rjmp .+132 ; 0xb6 <__bad_interrupt> + 32: 00 00 nop + 34: 40 c0 rjmp .+128 ; 0xb6 <__bad_interrupt> + 36: 00 00 nop + 38: 3e c0 rjmp .+124 ; 0xb6 <__bad_interrupt> + 3a: 00 00 nop + 3c: 3c c0 rjmp .+120 ; 0xb6 <__bad_interrupt> + 3e: 00 00 nop + 40: 3a c0 rjmp .+116 ; 0xb6 <__bad_interrupt> + 42: 00 00 nop + 44: 38 c0 rjmp .+112 ; 0xb6 <__bad_interrupt> + 46: 00 00 nop + 48: 36 c0 rjmp .+108 ; 0xb6 <__bad_interrupt> + 4a: 00 00 nop + 4c: 34 c0 rjmp .+104 ; 0xb6 <__bad_interrupt> + 4e: 00 00 nop + 50: 32 c0 rjmp .+100 ; 0xb6 <__bad_interrupt> + 52: 00 00 nop + 54: 30 c0 rjmp .+96 ; 0xb6 <__bad_interrupt> + 56: 00 00 nop + 58: 2e c0 rjmp .+92 ; 0xb6 <__bad_interrupt> + 5a: 00 00 nop + 5c: 2c c0 rjmp .+88 ; 0xb6 <__bad_interrupt> + 5e: 00 00 nop + 60: 2a c0 rjmp .+84 ; 0xb6 <__bad_interrupt> + 62: 00 00 nop + 64: 28 c0 rjmp .+80 ; 0xb6 <__bad_interrupt> + 66: 00 00 nop + 68: 26 c0 rjmp .+76 ; 0xb6 <__bad_interrupt> + 6a: 00 00 nop + 6c: 24 c0 rjmp .+72 ; 0xb6 <__bad_interrupt> + 6e: 00 00 nop + 70: 22 c0 rjmp .+68 ; 0xb6 <__bad_interrupt> + 72: 00 00 nop + 74: 20 c0 rjmp .+64 ; 0xb6 <__bad_interrupt> + 76: 00 00 nop + 78: 1e c0 rjmp .+60 ; 0xb6 <__bad_interrupt> + 7a: 00 00 nop + 7c: 1c c0 rjmp .+56 ; 0xb6 <__bad_interrupt> + 7e: 00 00 nop + 80: 1a c0 rjmp .+52 ; 0xb6 <__bad_interrupt> + 82: 00 00 nop + 84: 18 c0 rjmp .+48 ; 0xb6 <__bad_interrupt> + 86: 00 00 nop + 88: 16 c0 rjmp .+44 ; 0xb6 <__bad_interrupt> + ... + +0000008c <__ctors_end>: + 8c: 11 24 eor r1, r1 + 8e: 1f be out 0x3f, r1 ; 63 + 90: cf ef ldi r28, 0xFF ; 255 + 92: d0 e1 ldi r29, 0x10 ; 16 + 94: de bf out 0x3e, r29 ; 62 + 96: cd bf out 0x3d, r28 ; 61 + +00000098 <__do_copy_data>: + 98: 11 e0 ldi r17, 0x01 ; 1 + 9a: a0 e0 ldi r26, 0x00 ; 0 + 9c: b1 e0 ldi r27, 0x01 ; 1 + 9e: e2 e1 ldi r30, 0x12 ; 18 + a0: f1 e0 ldi r31, 0x01 ; 1 + a2: 00 e0 ldi r16, 0x00 ; 0 + a4: 0b bf out 0x3b, r16 ; 59 + a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14> + a8: 07 90 elpm r0, Z+ + aa: 0d 92 st X+, r0 + ac: a0 30 cpi r26, 0x00 ; 0 + ae: b1 07 cpc r27, r17 + b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> + b2: 1e d0 rcall .+60 ; 0xf0
+ b4: 2c c0 rjmp .+88 ; 0x10e <_exit> + +000000b6 <__bad_interrupt>: + b6: a4 cf rjmp .-184 ; 0x0 <__vectors> + +000000b8 : + +#include "lcd_control.h" + +void wait_us(unsigned int us) +{ + for(int i = 0; i < us; i++) + b8: 20 e0 ldi r18, 0x00 ; 0 + ba: 30 e0 ldi r19, 0x00 ; 0 + bc: 06 c0 rjmp .+12 ; 0xca + #else + //round up by default + __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); + #endif + + __builtin_avr_delay_cycles(__ticks_dc); + be: 46 e0 ldi r20, 0x06 ; 6 + c0: 4a 95 dec r20 + c2: f1 f7 brne .-4 ; 0xc0 + c4: 00 c0 rjmp .+0 ; 0xc6 + c6: 2f 5f subi r18, 0xFF ; 255 + c8: 3f 4f sbci r19, 0xFF ; 255 + ca: 28 17 cp r18, r24 + cc: 39 07 cpc r19, r25 + ce: b8 f3 brcs .-18 ; 0xbe + { + _delay_us(1); + } +} + d0: 08 95 ret + +000000d2 : + +void wait_ms(unsigned int ms) +{ + + for(int i = 0; i < ms; i++) + d2: 20 e0 ldi r18, 0x00 ; 0 + d4: 30 e0 ldi r19, 0x00 ; 0 + d6: 08 c0 rjmp .+16 ; 0xe8 + #else + //round up by default + __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); + #endif + + __builtin_avr_delay_cycles(__ticks_dc); + d8: e7 e8 ldi r30, 0x87 ; 135 + da: f3 e1 ldi r31, 0x13 ; 19 + dc: 31 97 sbiw r30, 0x01 ; 1 + de: f1 f7 brne .-4 ; 0xdc + e0: 00 c0 rjmp .+0 ; 0xe2 + e2: 00 00 nop + e4: 2f 5f subi r18, 0xFF ; 255 + e6: 3f 4f sbci r19, 0xFF ; 255 + e8: 28 17 cp r18, r24 + ea: 39 07 cpc r19, r25 + ec: a8 f3 brcs .-22 ; 0xd8 + { + _delay_ms(1); + } +} + ee: 08 95 ret + +000000f0
: + + +int main(void) +{ + DDRG = 0x01; // port g pin 0 on output, 1 on input. 0 is trig, 1 is echo + f0: 81 e0 ldi r24, 0x01 ; 1 + f2: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> + + + /* Replace with your application code */ + while (1) + { + PORTG = 0x00; // 10 us low pulse + f6: c5 e6 ldi r28, 0x65 ; 101 + f8: d0 e0 ldi r29, 0x00 ; 0 + fa: 18 82 st Y, r1 + wait_us(10); + fc: 8a e0 ldi r24, 0x0A ; 10 + fe: 90 e0 ldi r25, 0x00 ; 0 + 100: db df rcall .-74 ; 0xb8 + PORTG = 0x01; + 102: 81 e0 ldi r24, 0x01 ; 1 + 104: 88 83 st Y, r24 + + wait_ms(100); + 106: 84 e6 ldi r24, 0x64 ; 100 + 108: 90 e0 ldi r25, 0x00 ; 0 + 10a: e3 df rcall .-58 ; 0xd2 + 10c: f4 cf rjmp .-24 ; 0xf6 + +0000010e <_exit>: + 10e: f8 94 cli + +00000110 <__stop_program>: + 110: ff cf rjmp .-2 ; 0x110 <__stop_program> diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec new file mode 100644 index 0000000..6a916ec --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec @@ -0,0 +1,20 @@ +S0180000756C747261736F6E696353656E736F722E737265634E +S113000045C0000058C0000056C0000054C00000A5 +S113001052C0000050C000004EC000004CC00000A0 +S11300204AC0000048C0000046C0000044C00000B0 +S113003042C0000040C000003EC000003CC00000C0 +S11300403AC0000038C0000036C0000034C00000D0 +S113005032C0000030C000002EC000002CC00000E0 +S11300602AC0000028C0000026C0000024C00000F0 +S113007022C0000020C000001EC000001CC0000000 +S11300801AC0000018C0000016C0000011241FBED2 +S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E2E1FF +S11300A0F1E000E00BBF02C007900D92A030B10751 +S11300B0D9F71ED02CC0A4CF20E030E006C046E023 +S11300C04A95F1F700C02F5F3F4F28173907B8F35F +S11300D0089520E030E008C0E7E8F3E13197F1F754 +S11300E000C000002F5F3F4F28173907A8F3089579 +S11300F081E080936400C5E6D0E018828AE090E055 +S1130100DBDF81E0888384E690E0E3DFF4CFF894DA +S1050110FFCF1B +S9030000FC diff --git a/Microcontrollers/ultrasonicSensor/lcd_control.c b/Microcontrollers/ultrasonicSensor/lcd_control.c new file mode 100644 index 0000000..17487c7 --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/lcd_control.c @@ -0,0 +1,133 @@ +/* + * lcd_controlc.c + * + * Created: 24-2-2021 11:55:12 + * Author: Sem + */ +#define F_CPU 10e6 +#include +#include +#include +#include +#include +#include "lcd_control.h" + +void _delay_ms(double __ms); + +void lcd_clear() { + lcd_write_command (0x01); //Leeg display + _delay_ms(2); + lcd_write_command (0x80); //Cursor terug naar start +} + +void lcd_strobe_lcd_e(void) { + + sbi_porta(LCD_E); // E high + _delay_ms(1); + cbi_porta(LCD_E); // E low + _delay_ms(1); + +} + +void sbi_portc(int index){ + PORTC |= (1< +#include + +#include "lcd_control.h" + +void wait_us(unsigned int us) +{ + for(int i = 0; i < us; i++) + { + _delay_us(1); + } +} + +void wait_ms(unsigned int ms) +{ + + for(int i = 0; i < ms; i++) + { + _delay_ms(1); + } +} + + +int main(void) +{ + DDRG = 0x01; // port g pin 0 on output, 1 on input. 0 is trig, 1 is echo + + + /* Replace with your application code */ + while (1) + { + PORTG = 0x00; // 10 us low pulse + wait_us(10); + PORTG = 0x01; + + wait_ms(100); + } +} + + + diff --git a/Microcontrollers/ultrasonicSensor/ultrasonicSensor.componentinfo.xml b/Microcontrollers/ultrasonicSensor/ultrasonicSensor.componentinfo.xml new file mode 100644 index 0000000..69d6c7e --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/ultrasonicSensor.componentinfo.xml @@ -0,0 +1,86 @@ + + + + + + + Device + Startup + + + Atmel + 1.6.0 + C:/Program Files (x86)\Atmel\Studio\7.0\Packs + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include\ + + include + C + + + include/ + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include\avr\iom128.h + + header + C + JdJ7J9I/SJh965SEyyyVYw== + + include/avr/iom128.h + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\templates\main.c + template + source + C Exe + zBFq/2TxUzr5xF+6ABRBCw== + + templates/main.c + Main file (.c) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\templates\main.cpp + template + source + C Exe + mkKaE95TOoATsuBGv6jmxg== + + templates/main.cpp + Main file (.cpp) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128 + + libraryPrefix + GCC + + + gcc/dev/atmega128 + + + + + ATmega_DFP + C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATmega_DFP/1.6.364/Atmel.ATmega_DFP.pdsc + 1.6.364 + true + ATmega128 + + + + Resolved + Fixed + true + + + \ No newline at end of file diff --git a/Microcontrollers/ultrasonicSensor/ultrasonicSensor.cproj b/Microcontrollers/ultrasonicSensor/ultrasonicSensor.cproj new file mode 100644 index 0000000..2a8122a --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/ultrasonicSensor.cproj @@ -0,0 +1,124 @@ + + + + 2.0 + 7.0 + com.Atmel.AVRGCC8.C + {26da64de-dd48-4718-94b5-81f9ec5d4b33} + ATmega128 + none + Executable + C + $(MSBuildProjectName) + .elf + $(MSBuildProjectDirectory)\$(Configuration) + ultrasonicSensor + ultrasonicSensor + ultrasonicSensor + Native + true + false + true + true + + + true + + 2 + 0 + 0 + + + + + + -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + True + True + True + True + True + False + True + True + + + NDEBUG + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Optimize for size (-Os) + True + True + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + + + + + + + -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + True + True + True + True + True + False + True + True + + + DEBUG + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Optimize debugging experience (-Og) + True + True + Default (-g2) + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Default (-Wa,-g) + + + + + + compile + + + compile + + + compile + + + + \ No newline at end of file From 2e07ed8d893e8ea815e0fde64ce5ecad6fdc7b0f Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Wed, 17 Mar 2021 12:17:27 +0100 Subject: [PATCH 02/11] [ADD] explanation in comments --- Microcontrollers/ultrasonicSensor/main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/Microcontrollers/ultrasonicSensor/main.c b/Microcontrollers/ultrasonicSensor/main.c index a80197e..98db369 100644 --- a/Microcontrollers/ultrasonicSensor/main.c +++ b/Microcontrollers/ultrasonicSensor/main.c @@ -4,9 +4,16 @@ * Created: 17-3-2021 09:47:12 * Author : Sem - timer aanzetten met tccrn2 + ultrasoon op timer 1 want 16 bits + timer aanzetten met tccrn1 interrupt op falling edge van echo - in interrupt timer op 0 zetten en tccrn2 op 0 + in interrupt timer op 0 zetten en tccrn1 op 0 + interrupt op rising edge in echo, + dan timer aanzetten + en interrupt zetten op falling edge in echo + als falling edge interrupt geeft -> + waarde uit timer uitlezen + en formule gebruiken high level time * velocity (340M/S) / 2 */ #define F_CPU 20e6 From 25da06b589cc434d4d7017ea4f65cd2e314b80e9 Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Thu, 18 Mar 2021 19:21:10 +0100 Subject: [PATCH 03/11] [ADD] interrupt isr --- Microcontrollers/ultrasonicSensor/main.c | 46 +++++++++++++++++++----- 1 file changed, 37 insertions(+), 9 deletions(-) diff --git a/Microcontrollers/ultrasonicSensor/main.c b/Microcontrollers/ultrasonicSensor/main.c index 98db369..9919583 100644 --- a/Microcontrollers/ultrasonicSensor/main.c +++ b/Microcontrollers/ultrasonicSensor/main.c @@ -4,16 +4,16 @@ * Created: 17-3-2021 09:47:12 * Author : Sem - ultrasoon op timer 1 want 16 bits - timer aanzetten met tccrn1 - interrupt op falling edge van echo - in interrupt timer op 0 zetten en tccrn1 op 0 interrupt op rising edge in echo, - dan timer aanzetten + dan timer1 aanzetten -> timer1 want 16 bits en willen nauwkeurig afstand kunnen meten, en afstand kan van 2 cm tot 4 m, dus willen zeker zijn dat het past en interrupt zetten op falling edge in echo als falling edge interrupt geeft -> - waarde uit timer uitlezen + waarde uit timer1 uitlezen en formule gebruiken high level time * velocity (340M/S) / 2 + timer1 uitzetten + interrupt weer op rising edge van echo zetten + + */ #define F_CPU 20e6 @@ -23,6 +23,10 @@ #include "lcd_control.h" +enum interrupt_status {INTERRUPT_FALLING, INTERRUPT_RISING}; + +static enum interrupt_status int_stat = INTERRUPT_RISING; + void wait_us(unsigned int us) { for(int i = 0; i < us; i++) @@ -40,18 +44,42 @@ void wait_ms(unsigned int ms) } } +void ultrasonic_send_pulse() +{ + PORTG = 0x00; // 10 us low pulse + wait_us(10); + PORTG = 0x01; +} + +ISR(INT0_vect) +{ + // set interrupt pin 0 on PORTD to falling edge + if (int_stat == INTERRUPT_RISING) + { + + int_stat = INTERRUPT_FALLING; + } else { + + int_stat = INTERRUPT_RISING; + } + +} + int main(void) { DDRG = 0x01; // port g pin 0 on output, 1 on input. 0 is trig, 1 is echo + EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge + + EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) + + sei(); // turn on interrupt system /* Replace with your application code */ while (1) { - PORTG = 0x00; // 10 us low pulse - wait_us(10); - PORTG = 0x01; + ultrasonic_send_pulse(); wait_ms(100); } From 7a3180019e9bc8d102e274c4286a6b4fd337ed71 Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Thu, 18 Mar 2021 19:32:51 +0100 Subject: [PATCH 04/11] [ADD] interrupt setting enums --- .../Debug/ultrasonicSensor.lss | 180 +++++++++++++----- .../Debug/ultrasonicSensor.srec | 21 +- Microcontrollers/ultrasonicSensor/main.c | 25 ++- 3 files changed, 173 insertions(+), 53 deletions(-) diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss index bed2744..afcd37b 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss @@ -3,29 +3,29 @@ ultrasonicSensor.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 00000000 00800100 00800100 00000166 2**0 + 0 .data 00000002 00800100 0000017c 000001f0 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 00000112 00000000 00000000 00000054 2**1 + 1 .text 0000017c 00000000 00000000 00000074 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .comment 00000030 00000000 00000000 00000166 2**0 + 2 .comment 00000030 00000000 00000000 000001f2 2**0 CONTENTS, READONLY - 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000198 2**2 + 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000224 2**2 CONTENTS, READONLY - 4 .debug_aranges 00000030 00000000 00000000 000001d4 2**0 + 4 .debug_aranges 00000040 00000000 00000000 00000260 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_info 000009ad 00000000 00000000 00000204 2**0 + 5 .debug_info 00000a15 00000000 00000000 000002a0 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_abbrev 0000084e 00000000 00000000 00000bb1 2**0 + 6 .debug_abbrev 000008a7 00000000 00000000 00000cb5 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_line 0000030d 00000000 00000000 000013ff 2**0 + 7 .debug_line 00000384 00000000 00000000 0000155c 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_frame 00000044 00000000 00000000 0000170c 2**2 + 8 .debug_frame 00000080 00000000 00000000 000018e0 2**2 CONTENTS, READONLY, DEBUGGING - 9 .debug_str 0000043a 00000000 00000000 00001750 2**0 + 9 .debug_str 00000498 00000000 00000000 00001960 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_loc 000000d2 00000000 00000000 00001b8a 2**0 + 10 .debug_loc 0000013d 00000000 00000000 00001df8 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_ranges 00000020 00000000 00000000 00001c5c 2**0 + 11 .debug_ranges 00000030 00000000 00000000 00001f35 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -33,7 +33,7 @@ Disassembly of section .text: 00000000 <__vectors>: 0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end> 2: 00 00 nop - 4: 58 c0 rjmp .+176 ; 0xb6 <__bad_interrupt> + 4: 82 c0 rjmp .+260 ; 0x10a <__vector_1> 6: 00 00 nop 8: 56 c0 rjmp .+172 ; 0xb6 <__bad_interrupt> a: 00 00 nop @@ -114,25 +114,25 @@ Disassembly of section .text: 98: 11 e0 ldi r17, 0x01 ; 1 9a: a0 e0 ldi r26, 0x00 ; 0 9c: b1 e0 ldi r27, 0x01 ; 1 - 9e: e2 e1 ldi r30, 0x12 ; 18 + 9e: ec e7 ldi r30, 0x7C ; 124 a0: f1 e0 ldi r31, 0x01 ; 1 a2: 00 e0 ldi r16, 0x00 ; 0 a4: 0b bf out 0x3b, r16 ; 59 a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14> a8: 07 90 elpm r0, Z+ aa: 0d 92 st X+, r0 - ac: a0 30 cpi r26, 0x00 ; 0 + ac: a2 30 cpi r26, 0x02 ; 2 ae: b1 07 cpc r27, r17 b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> - b2: 1e d0 rcall .+60 ; 0xf0
- b4: 2c c0 rjmp .+88 ; 0x10e <_exit> + b2: 47 d0 rcall .+142 ; 0x142
+ b4: 61 c0 rjmp .+194 ; 0x178 <_exit> 000000b6 <__bad_interrupt>: b6: a4 cf rjmp .-184 ; 0x0 <__vectors> 000000b8 : - -#include "lcd_control.h" + +static enum interrupt_status int_stat = INTERRUPT_RISING; void wait_us(unsigned int us) { @@ -193,39 +193,133 @@ void wait_ms(unsigned int ms) } ee: 08 95 ret -000000f0
: +000000f0 : + +void ultrasonic_send_pulse() +{ + f0: cf 93 push r28 + f2: df 93 push r29 + PORTG = 0x00; // 10 us low pulse + f4: c5 e6 ldi r28, 0x65 ; 101 + f6: d0 e0 ldi r29, 0x00 ; 0 + f8: 18 82 st Y, r1 + wait_us(10); + fa: 8a e0 ldi r24, 0x0A ; 10 + fc: 90 e0 ldi r25, 0x00 ; 0 + fe: dc df rcall .-72 ; 0xb8 + PORTG = 0x01; + 100: 81 e0 ldi r24, 0x01 ; 1 + 102: 88 83 st Y, r24 +} + 104: df 91 pop r29 + 106: cf 91 pop r28 + 108: 08 95 ret + +0000010a <__vector_1>: + +ISR(INT0_vect) +{ + 10a: 1f 92 push r1 + 10c: 0f 92 push r0 + 10e: 0f b6 in r0, 0x3f ; 63 + 110: 0f 92 push r0 + 112: 11 24 eor r1, r1 + 114: 8f 93 push r24 + + // if the interrupt was generated on a rising edge (start sending echo) + if (int_stat == INTERRUPT_RISING) + 116: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> + 11a: 81 30 cpi r24, 0x01 ; 1 + 11c: 31 f4 brne .+12 ; 0x12a <__vector_1+0x20> + { + // set interrupt pin 0 on PORTD to falling edge + EICRA = 0x02; + 11e: 82 e0 ldi r24, 0x02 ; 2 + 120: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + + // set interrupt status + int_stat = INTERRUPT_FALLING; + 124: 10 92 00 01 sts 0x0100, r1 ; 0x800100 <__DATA_REGION_ORIGIN__> + 128: 06 c0 rjmp .+12 ; 0x136 <__vector_1+0x2c> + } else + // else if it was generated on a falling edge (end sending echo) + { + // set interrupt pin 0 on PORTD to rising edge + EICRA = 0x03; + 12a: 83 e0 ldi r24, 0x03 ; 3 + 12c: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + + // set interrupt status + int_stat = INTERRUPT_RISING; + 130: 81 e0 ldi r24, 0x01 ; 1 + 132: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> + } + +} + 136: 8f 91 pop r24 + 138: 0f 90 pop r0 + 13a: 0f be out 0x3f, r0 ; 63 + 13c: 0f 90 pop r0 + 13e: 1f 90 pop r1 + 140: 18 95 reti + +00000142
: int main(void) { - DDRG = 0x01; // port g pin 0 on output, 1 on input. 0 is trig, 1 is echo - f0: 81 e0 ldi r24, 0x01 ; 1 - f2: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> + DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug + 142: 8f ef ldi r24, 0xFF ; 255 + 144: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> + DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt + 148: 11 ba out 0x11, r1 ; 17 + DDRA = 0xFF; + 14a: 8a bb out 0x1a, r24 ; 26 + + EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge + 14c: ea e6 ldi r30, 0x6A ; 106 + 14e: f0 e0 ldi r31, 0x00 ; 0 + 150: 80 81 ld r24, Z + 152: 83 60 ori r24, 0x03 ; 3 + 154: 80 83 st Z, r24 + + EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) + 156: 89 b7 in r24, 0x39 ; 57 + 158: 81 60 ori r24, 0x01 ; 1 + 15a: 89 bf out 0x39, r24 ; 57 + + sei(); // turn on interrupt system + 15c: 78 94 sei /* Replace with your application code */ while (1) { - PORTG = 0x00; // 10 us low pulse - f6: c5 e6 ldi r28, 0x65 ; 101 - f8: d0 e0 ldi r29, 0x00 ; 0 - fa: 18 82 st Y, r1 - wait_us(10); - fc: 8a e0 ldi r24, 0x0A ; 10 - fe: 90 e0 ldi r25, 0x00 ; 0 - 100: db df rcall .-74 ; 0xb8 - PORTG = 0x01; - 102: 81 e0 ldi r24, 0x01 ; 1 - 104: 88 83 st Y, r24 + ultrasonic_send_pulse(); + 15e: c8 df rcall .-112 ; 0xf0 + if (int_stat == INTERRUPT_FALLING) + 160: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> + 164: 81 11 cpse r24, r1 + 166: 03 c0 rjmp .+6 ; 0x16e + { + PORTA = 0xFF; + 168: 8f ef ldi r24, 0xFF ; 255 + 16a: 8b bb out 0x1b, r24 ; 27 + 16c: 01 c0 rjmp .+2 ; 0x170 + } else { + PORTA = 0x00; + 16e: 1b ba out 0x1b, r1 ; 27 + } - wait_ms(100); - 106: 84 e6 ldi r24, 0x64 ; 100 - 108: 90 e0 ldi r25, 0x00 ; 0 - 10a: e3 df rcall .-58 ; 0xd2 - 10c: f4 cf rjmp .-24 ; 0xf6 + wait_ms(1000); + 170: 88 ee ldi r24, 0xE8 ; 232 + 172: 93 e0 ldi r25, 0x03 ; 3 + 174: ae df rcall .-164 ; 0xd2 + } + 176: f3 cf rjmp .-26 ; 0x15e -0000010e <_exit>: - 10e: f8 94 cli +00000178 <_exit>: + 178: f8 94 cli -00000110 <__stop_program>: - 110: ff cf rjmp .-2 ; 0x110 <__stop_program> +0000017a <__stop_program>: + 17a: ff cf rjmp .-2 ; 0x17a <__stop_program> diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec index 6a916ec..6f6627c 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec @@ -1,5 +1,5 @@ S0180000756C747261736F6E696353656E736F722E737265634E -S113000045C0000058C0000056C0000054C00000A5 +S113000045C0000082C0000056C0000054C000007B S113001052C0000050C000004EC000004CC00000A0 S11300204AC0000048C0000046C0000044C00000B0 S113003042C0000040C000003EC000003CC00000C0 @@ -8,13 +8,20 @@ S113005032C0000030C000002EC000002CC00000E0 S11300602AC0000028C0000026C0000024C00000F0 S113007022C0000020C000001EC000001CC0000000 S11300801AC0000018C0000016C0000011241FBED2 -S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E2E1FF -S11300A0F1E000E00BBF02C007900D92A030B10751 -S11300B0D9F71ED02CC0A4CF20E030E006C046E023 +S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0ECE7EF +S11300A0F1E000E00BBF02C007900D92A230B1074F +S11300B0D9F747D061C0A4CF20E030E006C046E0C5 S11300C04A95F1F700C02F5F3F4F28173907B8F35F S11300D0089520E030E008C0E7E8F3E13197F1F754 S11300E000C000002F5F3F4F28173907A8F3089579 -S11300F081E080936400C5E6D0E018828AE090E055 -S1130100DBDF81E0888384E690E0E3DFF4CFF894DA -S1050110FFCF1B +S11300F0CF93DF93C5E6D0E018828AE090E0DCDF9E +S113010081E08883DF91CF9108951F920F920FB6FB +S11301100F9211248F9380910001813031F482E099 +S113012080936A001092000106C083E080936A0005 +S113013081E0809300018F910F900FBE0F901F906C +S113014018958FEF8093640011BA8ABBEAE6F0E059 +S113015080818360808389B7816089BF7894C8DF98 +S113016080910001811103C08FEF8BBB01C01BBACA +S10F017088EE93E0AEDFF3CFF894FFCFED +S105017C01007C S9030000FC diff --git a/Microcontrollers/ultrasonicSensor/main.c b/Microcontrollers/ultrasonicSensor/main.c index 9919583..4108632 100644 --- a/Microcontrollers/ultrasonicSensor/main.c +++ b/Microcontrollers/ultrasonicSensor/main.c @@ -20,6 +20,7 @@ #include #include +#include #include "lcd_control.h" @@ -53,13 +54,22 @@ void ultrasonic_send_pulse() ISR(INT0_vect) { - // set interrupt pin 0 on PORTD to falling edge + + // if the interrupt was generated on a rising edge (start sending echo) if (int_stat == INTERRUPT_RISING) { + // set interrupt pin 0 on PORTD to falling edge + EICRA = 0x02; + // set interrupt status int_stat = INTERRUPT_FALLING; - } else { + } else + // else if it was generated on a falling edge (end sending echo) + { + // set interrupt pin 0 on PORTD to rising edge + EICRA = 0x03; + // set interrupt status int_stat = INTERRUPT_RISING; } @@ -68,7 +78,10 @@ ISR(INT0_vect) int main(void) { - DDRG = 0x01; // port g pin 0 on output, 1 on input. 0 is trig, 1 is echo + DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug + DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt + + DDRA = 0xFF; EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge @@ -80,6 +93,12 @@ int main(void) while (1) { ultrasonic_send_pulse(); + if (int_stat == INTERRUPT_FALLING) + { + PORTA = 0xFF; + } else { + PORTA = 0x00; + } wait_ms(100); } From 9f96c762fce330125c661b7f6d336d80a7d523c4 Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Thu, 18 Mar 2021 20:11:44 +0100 Subject: [PATCH 05/11] [ADD] timer, but I don't think it works yet --- .../Debug/ultrasonicSensor.lss | 1394 +++++++++++++++-- .../Debug/ultrasonicSensor.srec | 175 ++- .../ultrasonicSensor/lcd_control.c | 4 +- Microcontrollers/ultrasonicSensor/main.c | 34 +- 4 files changed, 1410 insertions(+), 197 deletions(-) diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss index afcd37b..da8af0d 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss @@ -3,29 +3,31 @@ ultrasonicSensor.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 00000002 00800100 0000017c 000001f0 2**0 + 0 .data 00000004 00800100 0000094a 000009de 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 0000017c 00000000 00000000 00000074 2**1 + 1 .text 0000094a 00000000 00000000 00000094 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .comment 00000030 00000000 00000000 000001f2 2**0 + 2 .bss 00000002 00800104 00800104 000009e2 2**0 + ALLOC + 3 .comment 0000005c 00000000 00000000 000009e2 2**0 CONTENTS, READONLY - 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000224 2**2 + 4 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000a40 2**2 CONTENTS, READONLY - 4 .debug_aranges 00000040 00000000 00000000 00000260 2**0 + 5 .debug_aranges 000000b8 00000000 00000000 00000a7c 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_info 00000a15 00000000 00000000 000002a0 2**0 + 6 .debug_info 00000fd4 00000000 00000000 00000b34 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_abbrev 000008a7 00000000 00000000 00000cb5 2**0 + 7 .debug_abbrev 00000a97 00000000 00000000 00001b08 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_line 00000384 00000000 00000000 0000155c 2**0 + 8 .debug_line 0000071a 00000000 00000000 0000259f 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_frame 00000080 00000000 00000000 000018e0 2**2 + 9 .debug_frame 000001b4 00000000 00000000 00002cbc 2**2 CONTENTS, READONLY, DEBUGGING - 9 .debug_str 00000498 00000000 00000000 00001960 2**0 + 10 .debug_str 0000059a 00000000 00000000 00002e70 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_loc 0000013d 00000000 00000000 00001df8 2**0 + 11 .debug_loc 0000047c 00000000 00000000 0000340a 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_ranges 00000030 00000000 00000000 00001f35 2**0 + 12 .debug_ranges 00000098 00000000 00000000 00003886 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -33,73 +35,73 @@ Disassembly of section .text: 00000000 <__vectors>: 0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end> 2: 00 00 nop - 4: 82 c0 rjmp .+260 ; 0x10a <__vector_1> + 4: 62 c1 rjmp .+708 ; 0x2ca <__vector_1> 6: 00 00 nop - 8: 56 c0 rjmp .+172 ; 0xb6 <__bad_interrupt> + 8: 5e c0 rjmp .+188 ; 0xc6 <__bad_interrupt> a: 00 00 nop - c: 54 c0 rjmp .+168 ; 0xb6 <__bad_interrupt> + c: 5c c0 rjmp .+184 ; 0xc6 <__bad_interrupt> e: 00 00 nop - 10: 52 c0 rjmp .+164 ; 0xb6 <__bad_interrupt> + 10: 5a c0 rjmp .+180 ; 0xc6 <__bad_interrupt> 12: 00 00 nop - 14: 50 c0 rjmp .+160 ; 0xb6 <__bad_interrupt> + 14: 58 c0 rjmp .+176 ; 0xc6 <__bad_interrupt> 16: 00 00 nop - 18: 4e c0 rjmp .+156 ; 0xb6 <__bad_interrupt> + 18: 56 c0 rjmp .+172 ; 0xc6 <__bad_interrupt> 1a: 00 00 nop - 1c: 4c c0 rjmp .+152 ; 0xb6 <__bad_interrupt> + 1c: 54 c0 rjmp .+168 ; 0xc6 <__bad_interrupt> 1e: 00 00 nop - 20: 4a c0 rjmp .+148 ; 0xb6 <__bad_interrupt> + 20: 52 c0 rjmp .+164 ; 0xc6 <__bad_interrupt> 22: 00 00 nop - 24: 48 c0 rjmp .+144 ; 0xb6 <__bad_interrupt> + 24: 50 c0 rjmp .+160 ; 0xc6 <__bad_interrupt> 26: 00 00 nop - 28: 46 c0 rjmp .+140 ; 0xb6 <__bad_interrupt> + 28: 4e c0 rjmp .+156 ; 0xc6 <__bad_interrupt> 2a: 00 00 nop - 2c: 44 c0 rjmp .+136 ; 0xb6 <__bad_interrupt> + 2c: 4c c0 rjmp .+152 ; 0xc6 <__bad_interrupt> 2e: 00 00 nop - 30: 42 c0 rjmp .+132 ; 0xb6 <__bad_interrupt> + 30: 4a c0 rjmp .+148 ; 0xc6 <__bad_interrupt> 32: 00 00 nop - 34: 40 c0 rjmp .+128 ; 0xb6 <__bad_interrupt> + 34: 48 c0 rjmp .+144 ; 0xc6 <__bad_interrupt> 36: 00 00 nop - 38: 3e c0 rjmp .+124 ; 0xb6 <__bad_interrupt> + 38: 46 c0 rjmp .+140 ; 0xc6 <__bad_interrupt> 3a: 00 00 nop - 3c: 3c c0 rjmp .+120 ; 0xb6 <__bad_interrupt> + 3c: 44 c0 rjmp .+136 ; 0xc6 <__bad_interrupt> 3e: 00 00 nop - 40: 3a c0 rjmp .+116 ; 0xb6 <__bad_interrupt> + 40: 42 c0 rjmp .+132 ; 0xc6 <__bad_interrupt> 42: 00 00 nop - 44: 38 c0 rjmp .+112 ; 0xb6 <__bad_interrupt> + 44: 40 c0 rjmp .+128 ; 0xc6 <__bad_interrupt> 46: 00 00 nop - 48: 36 c0 rjmp .+108 ; 0xb6 <__bad_interrupt> + 48: 3e c0 rjmp .+124 ; 0xc6 <__bad_interrupt> 4a: 00 00 nop - 4c: 34 c0 rjmp .+104 ; 0xb6 <__bad_interrupt> + 4c: 3c c0 rjmp .+120 ; 0xc6 <__bad_interrupt> 4e: 00 00 nop - 50: 32 c0 rjmp .+100 ; 0xb6 <__bad_interrupt> + 50: 3a c0 rjmp .+116 ; 0xc6 <__bad_interrupt> 52: 00 00 nop - 54: 30 c0 rjmp .+96 ; 0xb6 <__bad_interrupt> + 54: 38 c0 rjmp .+112 ; 0xc6 <__bad_interrupt> 56: 00 00 nop - 58: 2e c0 rjmp .+92 ; 0xb6 <__bad_interrupt> + 58: 36 c0 rjmp .+108 ; 0xc6 <__bad_interrupt> 5a: 00 00 nop - 5c: 2c c0 rjmp .+88 ; 0xb6 <__bad_interrupt> + 5c: 34 c0 rjmp .+104 ; 0xc6 <__bad_interrupt> 5e: 00 00 nop - 60: 2a c0 rjmp .+84 ; 0xb6 <__bad_interrupt> + 60: 32 c0 rjmp .+100 ; 0xc6 <__bad_interrupt> 62: 00 00 nop - 64: 28 c0 rjmp .+80 ; 0xb6 <__bad_interrupt> + 64: 30 c0 rjmp .+96 ; 0xc6 <__bad_interrupt> 66: 00 00 nop - 68: 26 c0 rjmp .+76 ; 0xb6 <__bad_interrupt> + 68: 2e c0 rjmp .+92 ; 0xc6 <__bad_interrupt> 6a: 00 00 nop - 6c: 24 c0 rjmp .+72 ; 0xb6 <__bad_interrupt> + 6c: 2c c0 rjmp .+88 ; 0xc6 <__bad_interrupt> 6e: 00 00 nop - 70: 22 c0 rjmp .+68 ; 0xb6 <__bad_interrupt> + 70: 2a c0 rjmp .+84 ; 0xc6 <__bad_interrupt> 72: 00 00 nop - 74: 20 c0 rjmp .+64 ; 0xb6 <__bad_interrupt> + 74: 28 c0 rjmp .+80 ; 0xc6 <__bad_interrupt> 76: 00 00 nop - 78: 1e c0 rjmp .+60 ; 0xb6 <__bad_interrupt> + 78: 26 c0 rjmp .+76 ; 0xc6 <__bad_interrupt> 7a: 00 00 nop - 7c: 1c c0 rjmp .+56 ; 0xb6 <__bad_interrupt> + 7c: 24 c0 rjmp .+72 ; 0xc6 <__bad_interrupt> 7e: 00 00 nop - 80: 1a c0 rjmp .+52 ; 0xb6 <__bad_interrupt> + 80: 22 c0 rjmp .+68 ; 0xc6 <__bad_interrupt> 82: 00 00 nop - 84: 18 c0 rjmp .+48 ; 0xb6 <__bad_interrupt> + 84: 20 c0 rjmp .+64 ; 0xc6 <__bad_interrupt> 86: 00 00 nop - 88: 16 c0 rjmp .+44 ; 0xb6 <__bad_interrupt> + 88: 1e c0 rjmp .+60 ; 0xc6 <__bad_interrupt> ... 0000008c <__ctors_end>: @@ -114,212 +116,1282 @@ Disassembly of section .text: 98: 11 e0 ldi r17, 0x01 ; 1 9a: a0 e0 ldi r26, 0x00 ; 0 9c: b1 e0 ldi r27, 0x01 ; 1 - 9e: ec e7 ldi r30, 0x7C ; 124 - a0: f1 e0 ldi r31, 0x01 ; 1 + 9e: ea e4 ldi r30, 0x4A ; 74 + a0: f9 e0 ldi r31, 0x09 ; 9 a2: 00 e0 ldi r16, 0x00 ; 0 a4: 0b bf out 0x3b, r16 ; 59 a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14> a8: 07 90 elpm r0, Z+ aa: 0d 92 st X+, r0 - ac: a2 30 cpi r26, 0x02 ; 2 + ac: a4 30 cpi r26, 0x04 ; 4 ae: b1 07 cpc r27, r17 b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> - b2: 47 d0 rcall .+142 ; 0x142
- b4: 61 c0 rjmp .+194 ; 0x178 <_exit> -000000b6 <__bad_interrupt>: - b6: a4 cf rjmp .-184 ; 0x0 <__vectors> +000000b2 <__do_clear_bss>: + b2: 21 e0 ldi r18, 0x01 ; 1 + b4: a4 e0 ldi r26, 0x04 ; 4 + b6: b1 e0 ldi r27, 0x01 ; 1 + b8: 01 c0 rjmp .+2 ; 0xbc <.do_clear_bss_start> -000000b8 : +000000ba <.do_clear_bss_loop>: + ba: 1d 92 st X+, r1 + +000000bc <.do_clear_bss_start>: + bc: a6 30 cpi r26, 0x06 ; 6 + be: b2 07 cpc r27, r18 + c0: e1 f7 brne .-8 ; 0xba <.do_clear_bss_loop> + c2: 29 d1 rcall .+594 ; 0x316
+ c4: 40 c4 rjmp .+2176 ; 0x946 <_exit> + +000000c6 <__bad_interrupt>: + c6: 9c cf rjmp .-200 ; 0x0 <__vectors> + +000000c8 : + } +} + +void lcd_move_right(void){ -static enum interrupt_status int_stat = INTERRUPT_RISING; + lcd_write_command(0x1E); + c8: 9b b3 in r25, 0x1b ; 27 + ca: 21 e0 ldi r18, 0x01 ; 1 + cc: 30 e0 ldi r19, 0x00 ; 0 + ce: 02 c0 rjmp .+4 ; 0xd4 + d0: 22 0f add r18, r18 + d2: 33 1f adc r19, r19 + d4: 8a 95 dec r24 + d6: e2 f7 brpl .-8 ; 0xd0 + d8: 29 2b or r18, r25 + da: 2b bb out 0x1b, r18 ; 27 + dc: 08 95 ret + +000000de : + de: 9b b3 in r25, 0x1b ; 27 + e0: 21 e0 ldi r18, 0x01 ; 1 + e2: 30 e0 ldi r19, 0x00 ; 0 + e4: 02 c0 rjmp .+4 ; 0xea + e6: 22 0f add r18, r18 + e8: 33 1f adc r19, r19 + ea: 8a 95 dec r24 + ec: e2 f7 brpl .-8 ; 0xe6 + ee: 20 95 com r18 + f0: 29 23 and r18, r25 + f2: 2b bb out 0x1b, r18 ; 27 + f4: 08 95 ret + +000000f6 : + f6: 86 e0 ldi r24, 0x06 ; 6 + f8: 90 e0 ldi r25, 0x00 ; 0 + fa: e6 df rcall .-52 ; 0xc8 + fc: 83 ec ldi r24, 0xC3 ; 195 + fe: 99 e0 ldi r25, 0x09 ; 9 + 100: 01 97 sbiw r24, 0x01 ; 1 + 102: f1 f7 brne .-4 ; 0x100 + 104: 00 c0 rjmp .+0 ; 0x106 + 106: 00 00 nop + 108: 86 e0 ldi r24, 0x06 ; 6 + 10a: 90 e0 ldi r25, 0x00 ; 0 + 10c: e8 df rcall .-48 ; 0xde + 10e: 83 ec ldi r24, 0xC3 ; 195 + 110: 99 e0 ldi r25, 0x09 ; 9 + 112: 01 97 sbiw r24, 0x01 ; 1 + 114: f1 f7 brne .-4 ; 0x112 + 116: 00 c0 rjmp .+0 ; 0x118 + 118: 00 00 nop + 11a: 08 95 ret + +0000011c : + 11c: cf 93 push r28 + 11e: c8 2f mov r28, r24 + 120: 85 bb out 0x15, r24 ; 21 + 122: 84 e0 ldi r24, 0x04 ; 4 + 124: 90 e0 ldi r25, 0x00 ; 0 + 126: d0 df rcall .-96 ; 0xc8 + 128: e6 df rcall .-52 ; 0xf6 + 12a: c2 95 swap r28 + 12c: c0 7f andi r28, 0xF0 ; 240 + 12e: c5 bb out 0x15, r28 ; 21 + 130: 84 e0 ldi r24, 0x04 ; 4 + 132: 90 e0 ldi r25, 0x00 ; 0 + 134: c9 df rcall .-110 ; 0xc8 + 136: df df rcall .-66 ; 0xf6 + 138: cf 91 pop r28 + 13a: 08 95 ret + +0000013c : + 13c: cf 93 push r28 + 13e: c8 2f mov r28, r24 + 140: 85 bb out 0x15, r24 ; 21 + 142: 84 e0 ldi r24, 0x04 ; 4 + 144: 90 e0 ldi r25, 0x00 ; 0 + 146: cb df rcall .-106 ; 0xde + 148: d6 df rcall .-84 ; 0xf6 + 14a: c2 95 swap r28 + 14c: c0 7f andi r28, 0xF0 ; 240 + 14e: c5 bb out 0x15, r28 ; 21 + 150: 84 e0 ldi r24, 0x04 ; 4 + 152: 90 e0 ldi r25, 0x00 ; 0 + 154: c4 df rcall .-120 ; 0xde + 156: cf df rcall .-98 ; 0xf6 + 158: cf 91 pop r28 + 15a: 08 95 ret + +0000015c : + 15c: 81 e0 ldi r24, 0x01 ; 1 + 15e: ee df rcall .-36 ; 0x13c + 160: 87 e8 ldi r24, 0x87 ; 135 + 162: 93 e1 ldi r25, 0x13 ; 19 + 164: 01 97 sbiw r24, 0x01 ; 1 + 166: f1 f7 brne .-4 ; 0x164 + 168: 00 c0 rjmp .+0 ; 0x16a + 16a: 00 00 nop + 16c: 80 e8 ldi r24, 0x80 ; 128 + 16e: e6 cf rjmp .-52 ; 0x13c + 170: 08 95 ret + +00000172 : + 172: cf 93 push r28 + 174: 8f ef ldi r24, 0xFF ; 255 + 176: 84 bb out 0x14, r24 ; 20 + 178: 85 bb out 0x15, r24 ; 21 + 17a: 81 bb out 0x11, r24 ; 17 + 17c: 8a bb out 0x1a, r24 ; 26 + 17e: 15 ba out 0x15, r1 ; 21 + 180: 1b ba out 0x1b, r1 ; 27 + 182: c0 e2 ldi r28, 0x20 ; 32 + 184: c5 bb out 0x15, r28 ; 21 + 186: b7 df rcall .-146 ; 0xf6 + 188: c5 bb out 0x15, r28 ; 21 + 18a: b5 df rcall .-150 ; 0xf6 + 18c: 80 e8 ldi r24, 0x80 ; 128 + 18e: 85 bb out 0x15, r24 ; 21 + 190: b2 df rcall .-156 ; 0xf6 + 192: 15 ba out 0x15, r1 ; 21 + 194: b0 df rcall .-160 ; 0xf6 + 196: 80 ef ldi r24, 0xF0 ; 240 + 198: 85 bb out 0x15, r24 ; 21 + 19a: ad df rcall .-166 ; 0xf6 + 19c: 15 ba out 0x15, r1 ; 21 + 19e: ab df rcall .-170 ; 0xf6 + 1a0: 80 e6 ldi r24, 0x60 ; 96 + 1a2: 85 bb out 0x15, r24 ; 21 + 1a4: a8 df rcall .-176 ; 0xf6 + 1a6: 82 e0 ldi r24, 0x02 ; 2 + 1a8: c9 df rcall .-110 ; 0x13c + 1aa: a5 df rcall .-182 ; 0xf6 + 1ac: cf 91 pop r28 + 1ae: 08 95 ret + +000001b0 : + 1b0: cf 93 push r28 + 1b2: df 93 push r29 + 1b4: ec 01 movw r28, r24 + 1b6: 02 c0 rjmp .+4 ; 0x1bc + 1b8: b1 df rcall .-158 ; 0x11c + 1ba: 21 96 adiw r28, 0x01 ; 1 + 1bc: 88 81 ld r24, Y + 1be: 81 11 cpse r24, r1 + 1c0: fb cf rjmp .-10 ; 0x1b8 + 1c2: df 91 pop r29 + 1c4: cf 91 pop r28 + 1c6: 08 95 ret + +000001c8 : +} + +void lcd_write_int(int number) +{ + 1c8: af 92 push r10 + 1ca: bf 92 push r11 + 1cc: cf 92 push r12 + 1ce: df 92 push r13 + 1d0: ef 92 push r14 + 1d2: ff 92 push r15 + 1d4: 0f 93 push r16 + 1d6: 1f 93 push r17 + 1d8: cf 93 push r28 + 1da: df 93 push r29 + 1dc: cd b7 in r28, 0x3d ; 61 + 1de: de b7 in r29, 0x3e ; 62 + 1e0: d8 2e mov r13, r24 + 1e2: c9 2e mov r12, r25 + int length = snprintf(NULL, 0, "%d", number); + char str[length + 1]; + snprintf(str, length + 1, "%d", number); + lcd_write_string(str); +} + 1e4: ad b6 in r10, 0x3d ; 61 + 1e6: be b6 in r11, 0x3e ; 62 + lcd_write_command(0x1E); +} + +void lcd_write_int(int number) +{ + int length = snprintf(NULL, 0, "%d", number); + 1e8: 9f 93 push r25 + 1ea: 8f 93 push r24 + 1ec: 0f 2e mov r0, r31 + 1ee: f1 e0 ldi r31, 0x01 ; 1 + 1f0: ef 2e mov r14, r31 + 1f2: f1 e0 ldi r31, 0x01 ; 1 + 1f4: ff 2e mov r15, r31 + 1f6: f0 2d mov r31, r0 + 1f8: ff 92 push r15 + 1fa: ef 92 push r14 + 1fc: 1f 92 push r1 + 1fe: 1f 92 push r1 + 200: 1f 92 push r1 + 202: 1f 92 push r1 + 204: b7 d0 rcall .+366 ; 0x374 + char str[length + 1]; + 206: 01 96 adiw r24, 0x01 ; 1 + 208: 2d b7 in r18, 0x3d ; 61 + 20a: 3e b7 in r19, 0x3e ; 62 + 20c: 28 5f subi r18, 0xF8 ; 248 + 20e: 3f 4f sbci r19, 0xFF ; 255 + 210: 0f b6 in r0, 0x3f ; 63 + 212: f8 94 cli + 214: 3e bf out 0x3e, r19 ; 62 + 216: 0f be out 0x3f, r0 ; 63 + 218: 2d bf out 0x3d, r18 ; 61 + 21a: 28 1b sub r18, r24 + 21c: 39 0b sbc r19, r25 + 21e: 0f b6 in r0, 0x3f ; 63 + 220: f8 94 cli + 222: 3e bf out 0x3e, r19 ; 62 + 224: 0f be out 0x3f, r0 ; 63 + 226: 2d bf out 0x3d, r18 ; 61 + 228: 0d b7 in r16, 0x3d ; 61 + 22a: 1e b7 in r17, 0x3e ; 62 + 22c: 0f 5f subi r16, 0xFF ; 255 + 22e: 1f 4f sbci r17, 0xFF ; 255 + snprintf(str, length + 1, "%d", number); + 230: cf 92 push r12 + 232: df 92 push r13 + 234: ff 92 push r15 + 236: ef 92 push r14 + 238: 9f 93 push r25 + 23a: 8f 93 push r24 + 23c: 1f 93 push r17 + 23e: 0f 93 push r16 + 240: 99 d0 rcall .+306 ; 0x374 + lcd_write_string(str); + 242: 80 2f mov r24, r16 + 244: 91 2f mov r25, r17 + 246: b4 df rcall .-152 ; 0x1b0 +} + 248: 8d b7 in r24, 0x3d ; 61 + 24a: 9e b7 in r25, 0x3e ; 62 + 24c: 08 96 adiw r24, 0x08 ; 8 + 24e: 0f b6 in r0, 0x3f ; 63 + 250: f8 94 cli + 252: 9e bf out 0x3e, r25 ; 62 + 254: 0f be out 0x3f, r0 ; 63 + 256: 8d bf out 0x3d, r24 ; 61 + 258: 0f b6 in r0, 0x3f ; 63 + 25a: f8 94 cli + 25c: be be out 0x3e, r11 ; 62 + 25e: 0f be out 0x3f, r0 ; 63 + 260: ad be out 0x3d, r10 ; 61 + 262: df 91 pop r29 + 264: cf 91 pop r28 + 266: 1f 91 pop r17 + 268: 0f 91 pop r16 + 26a: ff 90 pop r15 + 26c: ef 90 pop r14 + 26e: df 90 pop r13 + 270: cf 90 pop r12 + 272: bf 90 pop r11 + 274: af 90 pop r10 + 276: 08 95 ret + +00000278 : + +uint16_t timer_dist = 0; // time measured by timer; void wait_us(unsigned int us) { for(int i = 0; i < us; i++) - b8: 20 e0 ldi r18, 0x00 ; 0 - ba: 30 e0 ldi r19, 0x00 ; 0 - bc: 06 c0 rjmp .+12 ; 0xca + 278: 20 e0 ldi r18, 0x00 ; 0 + 27a: 30 e0 ldi r19, 0x00 ; 0 + 27c: 06 c0 rjmp .+12 ; 0x28a #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); - be: 46 e0 ldi r20, 0x06 ; 6 - c0: 4a 95 dec r20 - c2: f1 f7 brne .-4 ; 0xc0 - c4: 00 c0 rjmp .+0 ; 0xc6 - c6: 2f 5f subi r18, 0xFF ; 255 - c8: 3f 4f sbci r19, 0xFF ; 255 - ca: 28 17 cp r18, r24 - cc: 39 07 cpc r19, r25 - ce: b8 f3 brcs .-18 ; 0xbe + 27e: 46 e0 ldi r20, 0x06 ; 6 + 280: 4a 95 dec r20 + 282: f1 f7 brne .-4 ; 0x280 + 284: 00 c0 rjmp .+0 ; 0x286 + 286: 2f 5f subi r18, 0xFF ; 255 + 288: 3f 4f sbci r19, 0xFF ; 255 + 28a: 28 17 cp r18, r24 + 28c: 39 07 cpc r19, r25 + 28e: b8 f3 brcs .-18 ; 0x27e { _delay_us(1); } } - d0: 08 95 ret + 290: 08 95 ret -000000d2 : +00000292 : void wait_ms(unsigned int ms) { for(int i = 0; i < ms; i++) - d2: 20 e0 ldi r18, 0x00 ; 0 - d4: 30 e0 ldi r19, 0x00 ; 0 - d6: 08 c0 rjmp .+16 ; 0xe8 + 292: 20 e0 ldi r18, 0x00 ; 0 + 294: 30 e0 ldi r19, 0x00 ; 0 + 296: 08 c0 rjmp .+16 ; 0x2a8 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); - d8: e7 e8 ldi r30, 0x87 ; 135 - da: f3 e1 ldi r31, 0x13 ; 19 - dc: 31 97 sbiw r30, 0x01 ; 1 - de: f1 f7 brne .-4 ; 0xdc - e0: 00 c0 rjmp .+0 ; 0xe2 - e2: 00 00 nop - e4: 2f 5f subi r18, 0xFF ; 255 - e6: 3f 4f sbci r19, 0xFF ; 255 - e8: 28 17 cp r18, r24 - ea: 39 07 cpc r19, r25 - ec: a8 f3 brcs .-22 ; 0xd8 + 298: e7 e8 ldi r30, 0x87 ; 135 + 29a: f3 e1 ldi r31, 0x13 ; 19 + 29c: 31 97 sbiw r30, 0x01 ; 1 + 29e: f1 f7 brne .-4 ; 0x29c + 2a0: 00 c0 rjmp .+0 ; 0x2a2 + 2a2: 00 00 nop + 2a4: 2f 5f subi r18, 0xFF ; 255 + 2a6: 3f 4f sbci r19, 0xFF ; 255 + 2a8: 28 17 cp r18, r24 + 2aa: 39 07 cpc r19, r25 + 2ac: a8 f3 brcs .-22 ; 0x298 { _delay_ms(1); } } - ee: 08 95 ret + 2ae: 08 95 ret -000000f0 : +000002b0 : void ultrasonic_send_pulse() { - f0: cf 93 push r28 - f2: df 93 push r29 + 2b0: cf 93 push r28 + 2b2: df 93 push r29 PORTG = 0x00; // 10 us low pulse - f4: c5 e6 ldi r28, 0x65 ; 101 - f6: d0 e0 ldi r29, 0x00 ; 0 - f8: 18 82 st Y, r1 + 2b4: c5 e6 ldi r28, 0x65 ; 101 + 2b6: d0 e0 ldi r29, 0x00 ; 0 + 2b8: 18 82 st Y, r1 wait_us(10); - fa: 8a e0 ldi r24, 0x0A ; 10 - fc: 90 e0 ldi r25, 0x00 ; 0 - fe: dc df rcall .-72 ; 0xb8 + 2ba: 8a e0 ldi r24, 0x0A ; 10 + 2bc: 90 e0 ldi r25, 0x00 ; 0 + 2be: dc df rcall .-72 ; 0x278 PORTG = 0x01; - 100: 81 e0 ldi r24, 0x01 ; 1 - 102: 88 83 st Y, r24 + 2c0: 81 e0 ldi r24, 0x01 ; 1 + 2c2: 88 83 st Y, r24 } - 104: df 91 pop r29 - 106: cf 91 pop r28 - 108: 08 95 ret + 2c4: df 91 pop r29 + 2c6: cf 91 pop r28 + 2c8: 08 95 ret -0000010a <__vector_1>: +000002ca <__vector_1>: ISR(INT0_vect) { - 10a: 1f 92 push r1 - 10c: 0f 92 push r0 - 10e: 0f b6 in r0, 0x3f ; 63 - 110: 0f 92 push r0 - 112: 11 24 eor r1, r1 - 114: 8f 93 push r24 + 2ca: 1f 92 push r1 + 2cc: 0f 92 push r0 + 2ce: 0f b6 in r0, 0x3f ; 63 + 2d0: 0f 92 push r0 + 2d2: 11 24 eor r1, r1 + 2d4: 8f 93 push r24 + 2d6: 9f 93 push r25 // if the interrupt was generated on a rising edge (start sending echo) if (int_stat == INTERRUPT_RISING) - 116: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> - 11a: 81 30 cpi r24, 0x01 ; 1 - 11c: 31 f4 brne .+12 ; 0x12a <__vector_1+0x20> + 2d8: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> + 2dc: 81 30 cpi r24, 0x01 ; 1 + 2de: 41 f4 brne .+16 ; 0x2f0 <__vector_1+0x26> { // set interrupt pin 0 on PORTD to falling edge EICRA = 0x02; - 11e: 82 e0 ldi r24, 0x02 ; 2 - 120: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + 2e0: 82 e0 ldi r24, 0x02 ; 2 + 2e2: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + + // reset the time in timer1 + TCNT1 = 0x00; + 2e6: 1d bc out 0x2d, r1 ; 45 + 2e8: 1c bc out 0x2c, r1 ; 44 // set interrupt status int_stat = INTERRUPT_FALLING; - 124: 10 92 00 01 sts 0x0100, r1 ; 0x800100 <__DATA_REGION_ORIGIN__> - 128: 06 c0 rjmp .+12 ; 0x136 <__vector_1+0x2c> + 2ea: 10 92 00 01 sts 0x0100, r1 ; 0x800100 <__DATA_REGION_ORIGIN__> + 2ee: 0c c0 rjmp .+24 ; 0x308 <__vector_1+0x3e> } else // else if it was generated on a falling edge (end sending echo) { // set interrupt pin 0 on PORTD to rising edge EICRA = 0x03; - 12a: 83 e0 ldi r24, 0x03 ; 3 - 12c: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + 2f0: 83 e0 ldi r24, 0x03 ; 3 + 2f2: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + + // read timer1 into time_dist + timer_dist = TCNT1; + 2f6: 8c b5 in r24, 0x2c ; 44 + 2f8: 9d b5 in r25, 0x2d ; 45 + 2fa: 90 93 05 01 sts 0x0105, r25 ; 0x800105 <__data_end+0x1> + 2fe: 80 93 04 01 sts 0x0104, r24 ; 0x800104 <__data_end> // set interrupt status int_stat = INTERRUPT_RISING; - 130: 81 e0 ldi r24, 0x01 ; 1 - 132: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> + 302: 81 e0 ldi r24, 0x01 ; 1 + 304: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> } } - 136: 8f 91 pop r24 - 138: 0f 90 pop r0 - 13a: 0f be out 0x3f, r0 ; 63 - 13c: 0f 90 pop r0 - 13e: 1f 90 pop r1 - 140: 18 95 reti + 308: 9f 91 pop r25 + 30a: 8f 91 pop r24 + 30c: 0f 90 pop r0 + 30e: 0f be out 0x3f, r0 ; 63 + 310: 0f 90 pop r0 + 312: 1f 90 pop r1 + 314: 18 95 reti -00000142
: +00000316
: int main(void) { DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug - 142: 8f ef ldi r24, 0xFF ; 255 - 144: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> + 316: 8f ef ldi r24, 0xFF ; 255 + 318: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt - 148: 11 ba out 0x11, r1 ; 17 - - DDRA = 0xFF; - 14a: 8a bb out 0x1a, r24 ; 26 + 31c: 11 ba out 0x11, r1 ; 17 EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge - 14c: ea e6 ldi r30, 0x6A ; 106 - 14e: f0 e0 ldi r31, 0x00 ; 0 - 150: 80 81 ld r24, Z - 152: 83 60 ori r24, 0x03 ; 3 - 154: 80 83 st Z, r24 + 31e: ea e6 ldi r30, 0x6A ; 106 + 320: f0 e0 ldi r31, 0x00 ; 0 + 322: 80 81 ld r24, Z + 324: 83 60 ori r24, 0x03 ; 3 + 326: 80 83 st Z, r24 EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) - 156: 89 b7 in r24, 0x39 ; 57 - 158: 81 60 ori r24, 0x01 ; 1 - 15a: 89 bf out 0x39, r24 ; 57 + 328: 89 b7 in r24, 0x39 ; 57 + 32a: 81 60 ori r24, 0x01 ; 1 + 32c: 89 bf out 0x39, r24 ; 57 + + TCCR1A = 0b00000000; // initialize timer1, prescaler=256 + 32e: 1f bc out 0x2f, r1 ; 47 + TCCR1B = 0b00001100; // CTC compare A, RUN + 330: 8c e0 ldi r24, 0x0C ; 12 + 332: 8e bd out 0x2e, r24 ; 46 + sei(); // turn on interrupt system - 15c: 78 94 sei + 334: 78 94 sei + init_4bits_mode(); + 336: 1d df rcall .-454 ; 0x172 + 338: 8f e4 ldi r24, 0x4F ; 79 + 33a: 93 ec ldi r25, 0xC3 ; 195 + 33c: 01 97 sbiw r24, 0x01 ; 1 + 33e: f1 f7 brne .-4 ; 0x33c + 340: 00 c0 rjmp .+0 ; 0x342 + + _delay_ms(10); + + lcd_clear(); + 342: 00 00 nop + + /* Replace with your application code */ while (1) { ultrasonic_send_pulse(); - 15e: c8 df rcall .-112 ; 0xf0 - if (int_stat == INTERRUPT_FALLING) - 160: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> - 164: 81 11 cpse r24, r1 - 166: 03 c0 rjmp .+6 ; 0x16e - { - PORTA = 0xFF; - 168: 8f ef ldi r24, 0xFF ; 255 - 16a: 8b bb out 0x1b, r24 ; 27 - 16c: 01 c0 rjmp .+2 ; 0x170 - } else { - PORTA = 0x00; - 16e: 1b ba out 0x1b, r1 ; 27 - } + 344: 0b df rcall .-490 ; 0x15c + 346: b4 df rcall .-152 ; 0x2b0 + + int distance = timer_dist * 340 / 2; + 348: 20 91 04 01 lds r18, 0x0104 ; 0x800104 <__data_end> + 34c: 30 91 05 01 lds r19, 0x0105 ; 0x800105 <__data_end+0x1> + 350: 84 e5 ldi r24, 0x54 ; 84 + 352: 91 e0 ldi r25, 0x01 ; 1 + 354: 28 9f mul r18, r24 + 356: e0 01 movw r28, r0 + 358: 29 9f mul r18, r25 + 35a: d0 0d add r29, r0 + 35c: 38 9f mul r19, r24 + 35e: d0 0d add r29, r0 + 360: 11 24 eor r1, r1 + 362: d6 95 lsr r29 + lcd_clear(); + 364: c7 95 ror r28 + 366: fa de rcall .-524 ; 0x15c + lcd_write_int(distance); + 368: ce 01 movw r24, r28 + 36a: 2e df rcall .-420 ; 0x1c8 + wait_ms(1000); - 170: 88 ee ldi r24, 0xE8 ; 232 - 172: 93 e0 ldi r25, 0x03 ; 3 - 174: ae df rcall .-164 ; 0xd2 - } - 176: f3 cf rjmp .-26 ; 0x15e + 36c: 88 ee ldi r24, 0xE8 ; 232 + 36e: 93 e0 ldi r25, 0x03 ; 3 + 370: 90 df rcall .-224 ; 0x292 + 372: e9 cf rjmp .-46 ; 0x346 -00000178 <_exit>: - 178: f8 94 cli +00000374 : + 374: 0f 93 push r16 + 376: 1f 93 push r17 + 378: cf 93 push r28 + 37a: df 93 push r29 + 37c: cd b7 in r28, 0x3d ; 61 + 37e: de b7 in r29, 0x3e ; 62 + 380: 2e 97 sbiw r28, 0x0e ; 14 + 382: 0f b6 in r0, 0x3f ; 63 + 384: f8 94 cli + 386: de bf out 0x3e, r29 ; 62 + 388: 0f be out 0x3f, r0 ; 63 + 38a: cd bf out 0x3d, r28 ; 61 + 38c: 0d 89 ldd r16, Y+21 ; 0x15 + 38e: 1e 89 ldd r17, Y+22 ; 0x16 + 390: 8f 89 ldd r24, Y+23 ; 0x17 + 392: 98 8d ldd r25, Y+24 ; 0x18 + 394: 26 e0 ldi r18, 0x06 ; 6 + 396: 2c 83 std Y+4, r18 ; 0x04 + 398: 1a 83 std Y+2, r17 ; 0x02 + 39a: 09 83 std Y+1, r16 ; 0x01 + 39c: 97 ff sbrs r25, 7 + 39e: 02 c0 rjmp .+4 ; 0x3a4 + 3a0: 80 e0 ldi r24, 0x00 ; 0 + 3a2: 90 e8 ldi r25, 0x80 ; 128 + 3a4: 01 97 sbiw r24, 0x01 ; 1 + 3a6: 9e 83 std Y+6, r25 ; 0x06 + 3a8: 8d 83 std Y+5, r24 ; 0x05 + 3aa: ae 01 movw r20, r28 + 3ac: 45 5e subi r20, 0xE5 ; 229 + 3ae: 5f 4f sbci r21, 0xFF ; 255 + 3b0: 69 8d ldd r22, Y+25 ; 0x19 + 3b2: 7a 8d ldd r23, Y+26 ; 0x1a + 3b4: ce 01 movw r24, r28 + 3b6: 01 96 adiw r24, 0x01 ; 1 + 3b8: 19 d0 rcall .+50 ; 0x3ec + 3ba: 4d 81 ldd r20, Y+5 ; 0x05 + 3bc: 5e 81 ldd r21, Y+6 ; 0x06 + 3be: 57 fd sbrc r21, 7 + 3c0: 0a c0 rjmp .+20 ; 0x3d6 + 3c2: 2f 81 ldd r18, Y+7 ; 0x07 + 3c4: 38 85 ldd r19, Y+8 ; 0x08 + 3c6: 42 17 cp r20, r18 + 3c8: 53 07 cpc r21, r19 + 3ca: 0c f4 brge .+2 ; 0x3ce + 3cc: 9a 01 movw r18, r20 + 3ce: f8 01 movw r30, r16 + 3d0: e2 0f add r30, r18 + 3d2: f3 1f adc r31, r19 + 3d4: 10 82 st Z, r1 + 3d6: 2e 96 adiw r28, 0x0e ; 14 + 3d8: 0f b6 in r0, 0x3f ; 63 + 3da: f8 94 cli + 3dc: de bf out 0x3e, r29 ; 62 + 3de: 0f be out 0x3f, r0 ; 63 + 3e0: cd bf out 0x3d, r28 ; 61 + 3e2: df 91 pop r29 + 3e4: cf 91 pop r28 + 3e6: 1f 91 pop r17 + 3e8: 0f 91 pop r16 + 3ea: 08 95 ret -0000017a <__stop_program>: - 17a: ff cf rjmp .-2 ; 0x17a <__stop_program> +000003ec : + 3ec: 2f 92 push r2 + 3ee: 3f 92 push r3 + 3f0: 4f 92 push r4 + 3f2: 5f 92 push r5 + 3f4: 6f 92 push r6 + 3f6: 7f 92 push r7 + 3f8: 8f 92 push r8 + 3fa: 9f 92 push r9 + 3fc: af 92 push r10 + 3fe: bf 92 push r11 + 400: cf 92 push r12 + 402: df 92 push r13 + 404: ef 92 push r14 + 406: ff 92 push r15 + 408: 0f 93 push r16 + 40a: 1f 93 push r17 + 40c: cf 93 push r28 + 40e: df 93 push r29 + 410: cd b7 in r28, 0x3d ; 61 + 412: de b7 in r29, 0x3e ; 62 + 414: 2b 97 sbiw r28, 0x0b ; 11 + 416: 0f b6 in r0, 0x3f ; 63 + 418: f8 94 cli + 41a: de bf out 0x3e, r29 ; 62 + 41c: 0f be out 0x3f, r0 ; 63 + 41e: cd bf out 0x3d, r28 ; 61 + 420: 6c 01 movw r12, r24 + 422: 7b 01 movw r14, r22 + 424: 8a 01 movw r16, r20 + 426: fc 01 movw r30, r24 + 428: 17 82 std Z+7, r1 ; 0x07 + 42a: 16 82 std Z+6, r1 ; 0x06 + 42c: 83 81 ldd r24, Z+3 ; 0x03 + 42e: 81 ff sbrs r24, 1 + 430: bf c1 rjmp .+894 ; 0x7b0 <__LOCK_REGION_LENGTH__+0x3b0> + 432: ce 01 movw r24, r28 + 434: 01 96 adiw r24, 0x01 ; 1 + 436: 3c 01 movw r6, r24 + 438: f6 01 movw r30, r12 + 43a: 93 81 ldd r25, Z+3 ; 0x03 + 43c: f7 01 movw r30, r14 + 43e: 93 fd sbrc r25, 3 + 440: 85 91 lpm r24, Z+ + 442: 93 ff sbrs r25, 3 + 444: 81 91 ld r24, Z+ + 446: 7f 01 movw r14, r30 + 448: 88 23 and r24, r24 + 44a: 09 f4 brne .+2 ; 0x44e <__LOCK_REGION_LENGTH__+0x4e> + 44c: ad c1 rjmp .+858 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> + 44e: 85 32 cpi r24, 0x25 ; 37 + 450: 39 f4 brne .+14 ; 0x460 <__LOCK_REGION_LENGTH__+0x60> + 452: 93 fd sbrc r25, 3 + 454: 85 91 lpm r24, Z+ + 456: 93 ff sbrs r25, 3 + 458: 81 91 ld r24, Z+ + 45a: 7f 01 movw r14, r30 + 45c: 85 32 cpi r24, 0x25 ; 37 + 45e: 21 f4 brne .+8 ; 0x468 <__LOCK_REGION_LENGTH__+0x68> + 460: b6 01 movw r22, r12 + 462: 90 e0 ldi r25, 0x00 ; 0 + 464: d6 d1 rcall .+940 ; 0x812 + 466: e8 cf rjmp .-48 ; 0x438 <__LOCK_REGION_LENGTH__+0x38> + 468: 91 2c mov r9, r1 + 46a: 21 2c mov r2, r1 + 46c: 31 2c mov r3, r1 + 46e: ff e1 ldi r31, 0x1F ; 31 + 470: f3 15 cp r31, r3 + 472: d8 f0 brcs .+54 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> + 474: 8b 32 cpi r24, 0x2B ; 43 + 476: 79 f0 breq .+30 ; 0x496 <__LOCK_REGION_LENGTH__+0x96> + 478: 38 f4 brcc .+14 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> + 47a: 80 32 cpi r24, 0x20 ; 32 + 47c: 79 f0 breq .+30 ; 0x49c <__LOCK_REGION_LENGTH__+0x9c> + 47e: 83 32 cpi r24, 0x23 ; 35 + 480: a1 f4 brne .+40 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> + 482: 23 2d mov r18, r3 + 484: 20 61 ori r18, 0x10 ; 16 + 486: 1d c0 rjmp .+58 ; 0x4c2 <__LOCK_REGION_LENGTH__+0xc2> + 488: 8d 32 cpi r24, 0x2D ; 45 + 48a: 61 f0 breq .+24 ; 0x4a4 <__LOCK_REGION_LENGTH__+0xa4> + 48c: 80 33 cpi r24, 0x30 ; 48 + 48e: 69 f4 brne .+26 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> + 490: 23 2d mov r18, r3 + 492: 21 60 ori r18, 0x01 ; 1 + 494: 16 c0 rjmp .+44 ; 0x4c2 <__LOCK_REGION_LENGTH__+0xc2> + 496: 83 2d mov r24, r3 + 498: 82 60 ori r24, 0x02 ; 2 + 49a: 38 2e mov r3, r24 + 49c: e3 2d mov r30, r3 + 49e: e4 60 ori r30, 0x04 ; 4 + 4a0: 3e 2e mov r3, r30 + 4a2: 2a c0 rjmp .+84 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4a4: f3 2d mov r31, r3 + 4a6: f8 60 ori r31, 0x08 ; 8 + 4a8: 1d c0 rjmp .+58 ; 0x4e4 <__LOCK_REGION_LENGTH__+0xe4> + 4aa: 37 fc sbrc r3, 7 + 4ac: 2d c0 rjmp .+90 ; 0x508 <__LOCK_REGION_LENGTH__+0x108> + 4ae: 20 ed ldi r18, 0xD0 ; 208 + 4b0: 28 0f add r18, r24 + 4b2: 2a 30 cpi r18, 0x0A ; 10 + 4b4: 40 f0 brcs .+16 ; 0x4c6 <__LOCK_REGION_LENGTH__+0xc6> + 4b6: 8e 32 cpi r24, 0x2E ; 46 + 4b8: b9 f4 brne .+46 ; 0x4e8 <__LOCK_REGION_LENGTH__+0xe8> + 4ba: 36 fc sbrc r3, 6 + 4bc: 75 c1 rjmp .+746 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> + 4be: 23 2d mov r18, r3 + 4c0: 20 64 ori r18, 0x40 ; 64 + 4c2: 32 2e mov r3, r18 + 4c4: 19 c0 rjmp .+50 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4c6: 36 fe sbrs r3, 6 + 4c8: 06 c0 rjmp .+12 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> + 4ca: 8a e0 ldi r24, 0x0A ; 10 + 4cc: 98 9e mul r9, r24 + 4ce: 20 0d add r18, r0 + 4d0: 11 24 eor r1, r1 + 4d2: 92 2e mov r9, r18 + 4d4: 11 c0 rjmp .+34 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4d6: ea e0 ldi r30, 0x0A ; 10 + 4d8: 2e 9e mul r2, r30 + 4da: 20 0d add r18, r0 + 4dc: 11 24 eor r1, r1 + 4de: 22 2e mov r2, r18 + 4e0: f3 2d mov r31, r3 + 4e2: f0 62 ori r31, 0x20 ; 32 + 4e4: 3f 2e mov r3, r31 + 4e6: 08 c0 rjmp .+16 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4e8: 8c 36 cpi r24, 0x6C ; 108 + 4ea: 21 f4 brne .+8 ; 0x4f4 <__LOCK_REGION_LENGTH__+0xf4> + 4ec: 83 2d mov r24, r3 + 4ee: 80 68 ori r24, 0x80 ; 128 + 4f0: 38 2e mov r3, r24 + 4f2: 02 c0 rjmp .+4 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4f4: 88 36 cpi r24, 0x68 ; 104 + 4f6: 41 f4 brne .+16 ; 0x508 <__LOCK_REGION_LENGTH__+0x108> + 4f8: f7 01 movw r30, r14 + 4fa: 93 fd sbrc r25, 3 + 4fc: 85 91 lpm r24, Z+ + 4fe: 93 ff sbrs r25, 3 + 500: 81 91 ld r24, Z+ + 502: 7f 01 movw r14, r30 + 504: 81 11 cpse r24, r1 + 506: b3 cf rjmp .-154 ; 0x46e <__LOCK_REGION_LENGTH__+0x6e> + 508: 98 2f mov r25, r24 + 50a: 9f 7d andi r25, 0xDF ; 223 + 50c: 95 54 subi r25, 0x45 ; 69 + 50e: 93 30 cpi r25, 0x03 ; 3 + 510: 28 f4 brcc .+10 ; 0x51c <__LOCK_REGION_LENGTH__+0x11c> + 512: 0c 5f subi r16, 0xFC ; 252 + 514: 1f 4f sbci r17, 0xFF ; 255 + 516: 9f e3 ldi r25, 0x3F ; 63 + 518: 99 83 std Y+1, r25 ; 0x01 + 51a: 0d c0 rjmp .+26 ; 0x536 <__LOCK_REGION_LENGTH__+0x136> + 51c: 83 36 cpi r24, 0x63 ; 99 + 51e: 31 f0 breq .+12 ; 0x52c <__LOCK_REGION_LENGTH__+0x12c> + 520: 83 37 cpi r24, 0x73 ; 115 + 522: 71 f0 breq .+28 ; 0x540 <__LOCK_REGION_LENGTH__+0x140> + 524: 83 35 cpi r24, 0x53 ; 83 + 526: 09 f0 breq .+2 ; 0x52a <__LOCK_REGION_LENGTH__+0x12a> + 528: 55 c0 rjmp .+170 ; 0x5d4 <__LOCK_REGION_LENGTH__+0x1d4> + 52a: 20 c0 rjmp .+64 ; 0x56c <__LOCK_REGION_LENGTH__+0x16c> + 52c: f8 01 movw r30, r16 + 52e: 80 81 ld r24, Z + 530: 89 83 std Y+1, r24 ; 0x01 + 532: 0e 5f subi r16, 0xFE ; 254 + 534: 1f 4f sbci r17, 0xFF ; 255 + 536: 88 24 eor r8, r8 + 538: 83 94 inc r8 + 53a: 91 2c mov r9, r1 + 53c: 53 01 movw r10, r6 + 53e: 12 c0 rjmp .+36 ; 0x564 <__LOCK_REGION_LENGTH__+0x164> + 540: 28 01 movw r4, r16 + 542: f2 e0 ldi r31, 0x02 ; 2 + 544: 4f 0e add r4, r31 + 546: 51 1c adc r5, r1 + 548: f8 01 movw r30, r16 + 54a: a0 80 ld r10, Z + 54c: b1 80 ldd r11, Z+1 ; 0x01 + 54e: 36 fe sbrs r3, 6 + 550: 03 c0 rjmp .+6 ; 0x558 <__LOCK_REGION_LENGTH__+0x158> + 552: 69 2d mov r22, r9 + 554: 70 e0 ldi r23, 0x00 ; 0 + 556: 02 c0 rjmp .+4 ; 0x55c <__LOCK_REGION_LENGTH__+0x15c> + 558: 6f ef ldi r22, 0xFF ; 255 + 55a: 7f ef ldi r23, 0xFF ; 255 + 55c: c5 01 movw r24, r10 + 55e: 4e d1 rcall .+668 ; 0x7fc + 560: 4c 01 movw r8, r24 + 562: 82 01 movw r16, r4 + 564: f3 2d mov r31, r3 + 566: ff 77 andi r31, 0x7F ; 127 + 568: 3f 2e mov r3, r31 + 56a: 15 c0 rjmp .+42 ; 0x596 <__LOCK_REGION_LENGTH__+0x196> + 56c: 28 01 movw r4, r16 + 56e: 22 e0 ldi r18, 0x02 ; 2 + 570: 42 0e add r4, r18 + 572: 51 1c adc r5, r1 + 574: f8 01 movw r30, r16 + 576: a0 80 ld r10, Z + 578: b1 80 ldd r11, Z+1 ; 0x01 + 57a: 36 fe sbrs r3, 6 + 57c: 03 c0 rjmp .+6 ; 0x584 <__LOCK_REGION_LENGTH__+0x184> + 57e: 69 2d mov r22, r9 + 580: 70 e0 ldi r23, 0x00 ; 0 + 582: 02 c0 rjmp .+4 ; 0x588 <__LOCK_REGION_LENGTH__+0x188> + 584: 6f ef ldi r22, 0xFF ; 255 + 586: 7f ef ldi r23, 0xFF ; 255 + 588: c5 01 movw r24, r10 + 58a: 2d d1 rcall .+602 ; 0x7e6 + 58c: 4c 01 movw r8, r24 + 58e: f3 2d mov r31, r3 + 590: f0 68 ori r31, 0x80 ; 128 + 592: 3f 2e mov r3, r31 + 594: 82 01 movw r16, r4 + 596: 33 fc sbrc r3, 3 + 598: 19 c0 rjmp .+50 ; 0x5cc <__LOCK_REGION_LENGTH__+0x1cc> + 59a: 82 2d mov r24, r2 + 59c: 90 e0 ldi r25, 0x00 ; 0 + 59e: 88 16 cp r8, r24 + 5a0: 99 06 cpc r9, r25 + 5a2: a0 f4 brcc .+40 ; 0x5cc <__LOCK_REGION_LENGTH__+0x1cc> + 5a4: b6 01 movw r22, r12 + 5a6: 80 e2 ldi r24, 0x20 ; 32 + 5a8: 90 e0 ldi r25, 0x00 ; 0 + 5aa: 33 d1 rcall .+614 ; 0x812 + 5ac: 2a 94 dec r2 + 5ae: f5 cf rjmp .-22 ; 0x59a <__LOCK_REGION_LENGTH__+0x19a> + 5b0: f5 01 movw r30, r10 + 5b2: 37 fc sbrc r3, 7 + 5b4: 85 91 lpm r24, Z+ + 5b6: 37 fe sbrs r3, 7 + 5b8: 81 91 ld r24, Z+ + 5ba: 5f 01 movw r10, r30 + 5bc: b6 01 movw r22, r12 + 5be: 90 e0 ldi r25, 0x00 ; 0 + 5c0: 28 d1 rcall .+592 ; 0x812 + 5c2: 21 10 cpse r2, r1 + 5c4: 2a 94 dec r2 + 5c6: 21 e0 ldi r18, 0x01 ; 1 + 5c8: 82 1a sub r8, r18 + 5ca: 91 08 sbc r9, r1 + 5cc: 81 14 cp r8, r1 + 5ce: 91 04 cpc r9, r1 + 5d0: 79 f7 brne .-34 ; 0x5b0 <__LOCK_REGION_LENGTH__+0x1b0> + 5d2: e1 c0 rjmp .+450 ; 0x796 <__LOCK_REGION_LENGTH__+0x396> + 5d4: 84 36 cpi r24, 0x64 ; 100 + 5d6: 11 f0 breq .+4 ; 0x5dc <__LOCK_REGION_LENGTH__+0x1dc> + 5d8: 89 36 cpi r24, 0x69 ; 105 + 5da: 39 f5 brne .+78 ; 0x62a <__LOCK_REGION_LENGTH__+0x22a> + 5dc: f8 01 movw r30, r16 + 5de: 37 fe sbrs r3, 7 + 5e0: 07 c0 rjmp .+14 ; 0x5f0 <__LOCK_REGION_LENGTH__+0x1f0> + 5e2: 60 81 ld r22, Z + 5e4: 71 81 ldd r23, Z+1 ; 0x01 + 5e6: 82 81 ldd r24, Z+2 ; 0x02 + 5e8: 93 81 ldd r25, Z+3 ; 0x03 + 5ea: 0c 5f subi r16, 0xFC ; 252 + 5ec: 1f 4f sbci r17, 0xFF ; 255 + 5ee: 08 c0 rjmp .+16 ; 0x600 <__LOCK_REGION_LENGTH__+0x200> + 5f0: 60 81 ld r22, Z + 5f2: 71 81 ldd r23, Z+1 ; 0x01 + 5f4: 07 2e mov r0, r23 + 5f6: 00 0c add r0, r0 + 5f8: 88 0b sbc r24, r24 + 5fa: 99 0b sbc r25, r25 + 5fc: 0e 5f subi r16, 0xFE ; 254 + 5fe: 1f 4f sbci r17, 0xFF ; 255 + 600: f3 2d mov r31, r3 + 602: ff 76 andi r31, 0x6F ; 111 + 604: 3f 2e mov r3, r31 + 606: 97 ff sbrs r25, 7 + 608: 09 c0 rjmp .+18 ; 0x61c <__LOCK_REGION_LENGTH__+0x21c> + 60a: 90 95 com r25 + 60c: 80 95 com r24 + 60e: 70 95 com r23 + 610: 61 95 neg r22 + 612: 7f 4f sbci r23, 0xFF ; 255 + 614: 8f 4f sbci r24, 0xFF ; 255 + 616: 9f 4f sbci r25, 0xFF ; 255 + 618: f0 68 ori r31, 0x80 ; 128 + 61a: 3f 2e mov r3, r31 + 61c: 2a e0 ldi r18, 0x0A ; 10 + 61e: 30 e0 ldi r19, 0x00 ; 0 + 620: a3 01 movw r20, r6 + 622: 33 d1 rcall .+614 ; 0x88a <__ultoa_invert> + 624: 88 2e mov r8, r24 + 626: 86 18 sub r8, r6 + 628: 44 c0 rjmp .+136 ; 0x6b2 <__LOCK_REGION_LENGTH__+0x2b2> + 62a: 85 37 cpi r24, 0x75 ; 117 + 62c: 31 f4 brne .+12 ; 0x63a <__LOCK_REGION_LENGTH__+0x23a> + 62e: 23 2d mov r18, r3 + 630: 2f 7e andi r18, 0xEF ; 239 + 632: b2 2e mov r11, r18 + 634: 2a e0 ldi r18, 0x0A ; 10 + 636: 30 e0 ldi r19, 0x00 ; 0 + 638: 25 c0 rjmp .+74 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 63a: 93 2d mov r25, r3 + 63c: 99 7f andi r25, 0xF9 ; 249 + 63e: b9 2e mov r11, r25 + 640: 8f 36 cpi r24, 0x6F ; 111 + 642: c1 f0 breq .+48 ; 0x674 <__LOCK_REGION_LENGTH__+0x274> + 644: 18 f4 brcc .+6 ; 0x64c <__LOCK_REGION_LENGTH__+0x24c> + 646: 88 35 cpi r24, 0x58 ; 88 + 648: 79 f0 breq .+30 ; 0x668 <__LOCK_REGION_LENGTH__+0x268> + 64a: ae c0 rjmp .+348 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> + 64c: 80 37 cpi r24, 0x70 ; 112 + 64e: 19 f0 breq .+6 ; 0x656 <__LOCK_REGION_LENGTH__+0x256> + 650: 88 37 cpi r24, 0x78 ; 120 + 652: 21 f0 breq .+8 ; 0x65c <__LOCK_REGION_LENGTH__+0x25c> + 654: a9 c0 rjmp .+338 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> + 656: e9 2f mov r30, r25 + 658: e0 61 ori r30, 0x10 ; 16 + 65a: be 2e mov r11, r30 + 65c: b4 fe sbrs r11, 4 + 65e: 0d c0 rjmp .+26 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> + 660: fb 2d mov r31, r11 + 662: f4 60 ori r31, 0x04 ; 4 + 664: bf 2e mov r11, r31 + 666: 09 c0 rjmp .+18 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> + 668: 34 fe sbrs r3, 4 + 66a: 0a c0 rjmp .+20 ; 0x680 <__LOCK_REGION_LENGTH__+0x280> + 66c: 29 2f mov r18, r25 + 66e: 26 60 ori r18, 0x06 ; 6 + 670: b2 2e mov r11, r18 + 672: 06 c0 rjmp .+12 ; 0x680 <__LOCK_REGION_LENGTH__+0x280> + 674: 28 e0 ldi r18, 0x08 ; 8 + 676: 30 e0 ldi r19, 0x00 ; 0 + 678: 05 c0 rjmp .+10 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 67a: 20 e1 ldi r18, 0x10 ; 16 + 67c: 30 e0 ldi r19, 0x00 ; 0 + 67e: 02 c0 rjmp .+4 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 680: 20 e1 ldi r18, 0x10 ; 16 + 682: 32 e0 ldi r19, 0x02 ; 2 + 684: f8 01 movw r30, r16 + 686: b7 fe sbrs r11, 7 + 688: 07 c0 rjmp .+14 ; 0x698 <__LOCK_REGION_LENGTH__+0x298> + 68a: 60 81 ld r22, Z + 68c: 71 81 ldd r23, Z+1 ; 0x01 + 68e: 82 81 ldd r24, Z+2 ; 0x02 + 690: 93 81 ldd r25, Z+3 ; 0x03 + 692: 0c 5f subi r16, 0xFC ; 252 + 694: 1f 4f sbci r17, 0xFF ; 255 + 696: 06 c0 rjmp .+12 ; 0x6a4 <__LOCK_REGION_LENGTH__+0x2a4> + 698: 60 81 ld r22, Z + 69a: 71 81 ldd r23, Z+1 ; 0x01 + 69c: 80 e0 ldi r24, 0x00 ; 0 + 69e: 90 e0 ldi r25, 0x00 ; 0 + 6a0: 0e 5f subi r16, 0xFE ; 254 + 6a2: 1f 4f sbci r17, 0xFF ; 255 + 6a4: a3 01 movw r20, r6 + 6a6: f1 d0 rcall .+482 ; 0x88a <__ultoa_invert> + 6a8: 88 2e mov r8, r24 + 6aa: 86 18 sub r8, r6 + 6ac: fb 2d mov r31, r11 + 6ae: ff 77 andi r31, 0x7F ; 127 + 6b0: 3f 2e mov r3, r31 + 6b2: 36 fe sbrs r3, 6 + 6b4: 0d c0 rjmp .+26 ; 0x6d0 <__LOCK_REGION_LENGTH__+0x2d0> + 6b6: 23 2d mov r18, r3 + 6b8: 2e 7f andi r18, 0xFE ; 254 + 6ba: a2 2e mov r10, r18 + 6bc: 89 14 cp r8, r9 + 6be: 58 f4 brcc .+22 ; 0x6d6 <__LOCK_REGION_LENGTH__+0x2d6> + 6c0: 34 fe sbrs r3, 4 + 6c2: 0b c0 rjmp .+22 ; 0x6da <__LOCK_REGION_LENGTH__+0x2da> + 6c4: 32 fc sbrc r3, 2 + 6c6: 09 c0 rjmp .+18 ; 0x6da <__LOCK_REGION_LENGTH__+0x2da> + 6c8: 83 2d mov r24, r3 + 6ca: 8e 7e andi r24, 0xEE ; 238 + 6cc: a8 2e mov r10, r24 + 6ce: 05 c0 rjmp .+10 ; 0x6da <__LOCK_REGION_LENGTH__+0x2da> + 6d0: b8 2c mov r11, r8 + 6d2: a3 2c mov r10, r3 + 6d4: 03 c0 rjmp .+6 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> + 6d6: b8 2c mov r11, r8 + 6d8: 01 c0 rjmp .+2 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> + 6da: b9 2c mov r11, r9 + 6dc: a4 fe sbrs r10, 4 + 6de: 0f c0 rjmp .+30 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> + 6e0: fe 01 movw r30, r28 + 6e2: e8 0d add r30, r8 + 6e4: f1 1d adc r31, r1 + 6e6: 80 81 ld r24, Z + 6e8: 80 33 cpi r24, 0x30 ; 48 + 6ea: 21 f4 brne .+8 ; 0x6f4 <__LOCK_REGION_LENGTH__+0x2f4> + 6ec: 9a 2d mov r25, r10 + 6ee: 99 7e andi r25, 0xE9 ; 233 + 6f0: a9 2e mov r10, r25 + 6f2: 09 c0 rjmp .+18 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> + 6f4: a2 fe sbrs r10, 2 + 6f6: 06 c0 rjmp .+12 ; 0x704 <__LOCK_REGION_LENGTH__+0x304> + 6f8: b3 94 inc r11 + 6fa: b3 94 inc r11 + 6fc: 04 c0 rjmp .+8 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> + 6fe: 8a 2d mov r24, r10 + 700: 86 78 andi r24, 0x86 ; 134 + 702: 09 f0 breq .+2 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> + 704: b3 94 inc r11 + 706: a3 fc sbrc r10, 3 + 708: 10 c0 rjmp .+32 ; 0x72a <__LOCK_REGION_LENGTH__+0x32a> + 70a: a0 fe sbrs r10, 0 + 70c: 06 c0 rjmp .+12 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> + 70e: b2 14 cp r11, r2 + 710: 80 f4 brcc .+32 ; 0x732 <__LOCK_REGION_LENGTH__+0x332> + 712: 28 0c add r2, r8 + 714: 92 2c mov r9, r2 + 716: 9b 18 sub r9, r11 + 718: 0d c0 rjmp .+26 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 71a: b2 14 cp r11, r2 + 71c: 58 f4 brcc .+22 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 71e: b6 01 movw r22, r12 + 720: 80 e2 ldi r24, 0x20 ; 32 + 722: 90 e0 ldi r25, 0x00 ; 0 + 724: 76 d0 rcall .+236 ; 0x812 + 726: b3 94 inc r11 + 728: f8 cf rjmp .-16 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> + 72a: b2 14 cp r11, r2 + 72c: 18 f4 brcc .+6 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 72e: 2b 18 sub r2, r11 + 730: 02 c0 rjmp .+4 ; 0x736 <__LOCK_REGION_LENGTH__+0x336> + 732: 98 2c mov r9, r8 + 734: 21 2c mov r2, r1 + 736: a4 fe sbrs r10, 4 + 738: 0f c0 rjmp .+30 ; 0x758 <__LOCK_REGION_LENGTH__+0x358> + 73a: b6 01 movw r22, r12 + 73c: 80 e3 ldi r24, 0x30 ; 48 + 73e: 90 e0 ldi r25, 0x00 ; 0 + 740: 68 d0 rcall .+208 ; 0x812 + 742: a2 fe sbrs r10, 2 + 744: 16 c0 rjmp .+44 ; 0x772 <__LOCK_REGION_LENGTH__+0x372> + 746: a1 fc sbrc r10, 1 + 748: 03 c0 rjmp .+6 ; 0x750 <__LOCK_REGION_LENGTH__+0x350> + 74a: 88 e7 ldi r24, 0x78 ; 120 + 74c: 90 e0 ldi r25, 0x00 ; 0 + 74e: 02 c0 rjmp .+4 ; 0x754 <__LOCK_REGION_LENGTH__+0x354> + 750: 88 e5 ldi r24, 0x58 ; 88 + 752: 90 e0 ldi r25, 0x00 ; 0 + 754: b6 01 movw r22, r12 + 756: 0c c0 rjmp .+24 ; 0x770 <__LOCK_REGION_LENGTH__+0x370> + 758: 8a 2d mov r24, r10 + 75a: 86 78 andi r24, 0x86 ; 134 + 75c: 51 f0 breq .+20 ; 0x772 <__LOCK_REGION_LENGTH__+0x372> + 75e: a1 fe sbrs r10, 1 + 760: 02 c0 rjmp .+4 ; 0x766 <__LOCK_REGION_LENGTH__+0x366> + 762: 8b e2 ldi r24, 0x2B ; 43 + 764: 01 c0 rjmp .+2 ; 0x768 <__LOCK_REGION_LENGTH__+0x368> + 766: 80 e2 ldi r24, 0x20 ; 32 + 768: a7 fc sbrc r10, 7 + 76a: 8d e2 ldi r24, 0x2D ; 45 + 76c: b6 01 movw r22, r12 + 76e: 90 e0 ldi r25, 0x00 ; 0 + 770: 50 d0 rcall .+160 ; 0x812 + 772: 89 14 cp r8, r9 + 774: 30 f4 brcc .+12 ; 0x782 <__LOCK_REGION_LENGTH__+0x382> + 776: b6 01 movw r22, r12 + 778: 80 e3 ldi r24, 0x30 ; 48 + 77a: 90 e0 ldi r25, 0x00 ; 0 + 77c: 4a d0 rcall .+148 ; 0x812 + 77e: 9a 94 dec r9 + 780: f8 cf rjmp .-16 ; 0x772 <__LOCK_REGION_LENGTH__+0x372> + 782: 8a 94 dec r8 + 784: f3 01 movw r30, r6 + 786: e8 0d add r30, r8 + 788: f1 1d adc r31, r1 + 78a: 80 81 ld r24, Z + 78c: b6 01 movw r22, r12 + 78e: 90 e0 ldi r25, 0x00 ; 0 + 790: 40 d0 rcall .+128 ; 0x812 + 792: 81 10 cpse r8, r1 + 794: f6 cf rjmp .-20 ; 0x782 <__LOCK_REGION_LENGTH__+0x382> + 796: 22 20 and r2, r2 + 798: 09 f4 brne .+2 ; 0x79c <__LOCK_REGION_LENGTH__+0x39c> + 79a: 4e ce rjmp .-868 ; 0x438 <__LOCK_REGION_LENGTH__+0x38> + 79c: b6 01 movw r22, r12 + 79e: 80 e2 ldi r24, 0x20 ; 32 + 7a0: 90 e0 ldi r25, 0x00 ; 0 + 7a2: 37 d0 rcall .+110 ; 0x812 + 7a4: 2a 94 dec r2 + 7a6: f7 cf rjmp .-18 ; 0x796 <__LOCK_REGION_LENGTH__+0x396> + 7a8: f6 01 movw r30, r12 + 7aa: 86 81 ldd r24, Z+6 ; 0x06 + 7ac: 97 81 ldd r25, Z+7 ; 0x07 + 7ae: 02 c0 rjmp .+4 ; 0x7b4 <__LOCK_REGION_LENGTH__+0x3b4> + 7b0: 8f ef ldi r24, 0xFF ; 255 + 7b2: 9f ef ldi r25, 0xFF ; 255 + 7b4: 2b 96 adiw r28, 0x0b ; 11 + 7b6: 0f b6 in r0, 0x3f ; 63 + 7b8: f8 94 cli + 7ba: de bf out 0x3e, r29 ; 62 + 7bc: 0f be out 0x3f, r0 ; 63 + 7be: cd bf out 0x3d, r28 ; 61 + 7c0: df 91 pop r29 + 7c2: cf 91 pop r28 + 7c4: 1f 91 pop r17 + 7c6: 0f 91 pop r16 + 7c8: ff 90 pop r15 + 7ca: ef 90 pop r14 + 7cc: df 90 pop r13 + 7ce: cf 90 pop r12 + 7d0: bf 90 pop r11 + 7d2: af 90 pop r10 + 7d4: 9f 90 pop r9 + 7d6: 8f 90 pop r8 + 7d8: 7f 90 pop r7 + 7da: 6f 90 pop r6 + 7dc: 5f 90 pop r5 + 7de: 4f 90 pop r4 + 7e0: 3f 90 pop r3 + 7e2: 2f 90 pop r2 + 7e4: 08 95 ret + +000007e6 : + 7e6: fc 01 movw r30, r24 + 7e8: 05 90 lpm r0, Z+ + 7ea: 61 50 subi r22, 0x01 ; 1 + 7ec: 70 40 sbci r23, 0x00 ; 0 + 7ee: 01 10 cpse r0, r1 + 7f0: d8 f7 brcc .-10 ; 0x7e8 + 7f2: 80 95 com r24 + 7f4: 90 95 com r25 + 7f6: 8e 0f add r24, r30 + 7f8: 9f 1f adc r25, r31 + 7fa: 08 95 ret + +000007fc : + 7fc: fc 01 movw r30, r24 + 7fe: 61 50 subi r22, 0x01 ; 1 + 800: 70 40 sbci r23, 0x00 ; 0 + 802: 01 90 ld r0, Z+ + 804: 01 10 cpse r0, r1 + 806: d8 f7 brcc .-10 ; 0x7fe + 808: 80 95 com r24 + 80a: 90 95 com r25 + 80c: 8e 0f add r24, r30 + 80e: 9f 1f adc r25, r31 + 810: 08 95 ret + +00000812 : + 812: 0f 93 push r16 + 814: 1f 93 push r17 + 816: cf 93 push r28 + 818: df 93 push r29 + 81a: fb 01 movw r30, r22 + 81c: 23 81 ldd r18, Z+3 ; 0x03 + 81e: 21 fd sbrc r18, 1 + 820: 03 c0 rjmp .+6 ; 0x828 + 822: 8f ef ldi r24, 0xFF ; 255 + 824: 9f ef ldi r25, 0xFF ; 255 + 826: 2c c0 rjmp .+88 ; 0x880 + 828: 22 ff sbrs r18, 2 + 82a: 16 c0 rjmp .+44 ; 0x858 + 82c: 46 81 ldd r20, Z+6 ; 0x06 + 82e: 57 81 ldd r21, Z+7 ; 0x07 + 830: 24 81 ldd r18, Z+4 ; 0x04 + 832: 35 81 ldd r19, Z+5 ; 0x05 + 834: 42 17 cp r20, r18 + 836: 53 07 cpc r21, r19 + 838: 44 f4 brge .+16 ; 0x84a + 83a: a0 81 ld r26, Z + 83c: b1 81 ldd r27, Z+1 ; 0x01 + 83e: 9d 01 movw r18, r26 + 840: 2f 5f subi r18, 0xFF ; 255 + 842: 3f 4f sbci r19, 0xFF ; 255 + 844: 31 83 std Z+1, r19 ; 0x01 + 846: 20 83 st Z, r18 + 848: 8c 93 st X, r24 + 84a: 26 81 ldd r18, Z+6 ; 0x06 + 84c: 37 81 ldd r19, Z+7 ; 0x07 + 84e: 2f 5f subi r18, 0xFF ; 255 + 850: 3f 4f sbci r19, 0xFF ; 255 + 852: 37 83 std Z+7, r19 ; 0x07 + 854: 26 83 std Z+6, r18 ; 0x06 + 856: 14 c0 rjmp .+40 ; 0x880 + 858: 8b 01 movw r16, r22 + 85a: ec 01 movw r28, r24 + 85c: fb 01 movw r30, r22 + 85e: 00 84 ldd r0, Z+8 ; 0x08 + 860: f1 85 ldd r31, Z+9 ; 0x09 + 862: e0 2d mov r30, r0 + 864: 09 95 icall + 866: 89 2b or r24, r25 + 868: e1 f6 brne .-72 ; 0x822 + 86a: d8 01 movw r26, r16 + 86c: 16 96 adiw r26, 0x06 ; 6 + 86e: 8d 91 ld r24, X+ + 870: 9c 91 ld r25, X + 872: 17 97 sbiw r26, 0x07 ; 7 + 874: 01 96 adiw r24, 0x01 ; 1 + 876: 17 96 adiw r26, 0x07 ; 7 + 878: 9c 93 st X, r25 + 87a: 8e 93 st -X, r24 + 87c: 16 97 sbiw r26, 0x06 ; 6 + 87e: ce 01 movw r24, r28 + 880: df 91 pop r29 + 882: cf 91 pop r28 + 884: 1f 91 pop r17 + 886: 0f 91 pop r16 + 888: 08 95 ret + +0000088a <__ultoa_invert>: + 88a: fa 01 movw r30, r20 + 88c: aa 27 eor r26, r26 + 88e: 28 30 cpi r18, 0x08 ; 8 + 890: 51 f1 breq .+84 ; 0x8e6 <__ultoa_invert+0x5c> + 892: 20 31 cpi r18, 0x10 ; 16 + 894: 81 f1 breq .+96 ; 0x8f6 <__ultoa_invert+0x6c> + 896: e8 94 clt + 898: 6f 93 push r22 + 89a: 6e 7f andi r22, 0xFE ; 254 + 89c: 6e 5f subi r22, 0xFE ; 254 + 89e: 7f 4f sbci r23, 0xFF ; 255 + 8a0: 8f 4f sbci r24, 0xFF ; 255 + 8a2: 9f 4f sbci r25, 0xFF ; 255 + 8a4: af 4f sbci r26, 0xFF ; 255 + 8a6: b1 e0 ldi r27, 0x01 ; 1 + 8a8: 3e d0 rcall .+124 ; 0x926 <__ultoa_invert+0x9c> + 8aa: b4 e0 ldi r27, 0x04 ; 4 + 8ac: 3c d0 rcall .+120 ; 0x926 <__ultoa_invert+0x9c> + 8ae: 67 0f add r22, r23 + 8b0: 78 1f adc r23, r24 + 8b2: 89 1f adc r24, r25 + 8b4: 9a 1f adc r25, r26 + 8b6: a1 1d adc r26, r1 + 8b8: 68 0f add r22, r24 + 8ba: 79 1f adc r23, r25 + 8bc: 8a 1f adc r24, r26 + 8be: 91 1d adc r25, r1 + 8c0: a1 1d adc r26, r1 + 8c2: 6a 0f add r22, r26 + 8c4: 71 1d adc r23, r1 + 8c6: 81 1d adc r24, r1 + 8c8: 91 1d adc r25, r1 + 8ca: a1 1d adc r26, r1 + 8cc: 20 d0 rcall .+64 ; 0x90e <__ultoa_invert+0x84> + 8ce: 09 f4 brne .+2 ; 0x8d2 <__ultoa_invert+0x48> + 8d0: 68 94 set + 8d2: 3f 91 pop r19 + 8d4: 2a e0 ldi r18, 0x0A ; 10 + 8d6: 26 9f mul r18, r22 + 8d8: 11 24 eor r1, r1 + 8da: 30 19 sub r19, r0 + 8dc: 30 5d subi r19, 0xD0 ; 208 + 8de: 31 93 st Z+, r19 + 8e0: de f6 brtc .-74 ; 0x898 <__ultoa_invert+0xe> + 8e2: cf 01 movw r24, r30 + 8e4: 08 95 ret + 8e6: 46 2f mov r20, r22 + 8e8: 47 70 andi r20, 0x07 ; 7 + 8ea: 40 5d subi r20, 0xD0 ; 208 + 8ec: 41 93 st Z+, r20 + 8ee: b3 e0 ldi r27, 0x03 ; 3 + 8f0: 0f d0 rcall .+30 ; 0x910 <__ultoa_invert+0x86> + 8f2: c9 f7 brne .-14 ; 0x8e6 <__ultoa_invert+0x5c> + 8f4: f6 cf rjmp .-20 ; 0x8e2 <__ultoa_invert+0x58> + 8f6: 46 2f mov r20, r22 + 8f8: 4f 70 andi r20, 0x0F ; 15 + 8fa: 40 5d subi r20, 0xD0 ; 208 + 8fc: 4a 33 cpi r20, 0x3A ; 58 + 8fe: 18 f0 brcs .+6 ; 0x906 <__ultoa_invert+0x7c> + 900: 49 5d subi r20, 0xD9 ; 217 + 902: 31 fd sbrc r19, 1 + 904: 40 52 subi r20, 0x20 ; 32 + 906: 41 93 st Z+, r20 + 908: 02 d0 rcall .+4 ; 0x90e <__ultoa_invert+0x84> + 90a: a9 f7 brne .-22 ; 0x8f6 <__ultoa_invert+0x6c> + 90c: ea cf rjmp .-44 ; 0x8e2 <__ultoa_invert+0x58> + 90e: b4 e0 ldi r27, 0x04 ; 4 + 910: a6 95 lsr r26 + 912: 97 95 ror r25 + 914: 87 95 ror r24 + 916: 77 95 ror r23 + 918: 67 95 ror r22 + 91a: ba 95 dec r27 + 91c: c9 f7 brne .-14 ; 0x910 <__ultoa_invert+0x86> + 91e: 00 97 sbiw r24, 0x00 ; 0 + 920: 61 05 cpc r22, r1 + 922: 71 05 cpc r23, r1 + 924: 08 95 ret + 926: 9b 01 movw r18, r22 + 928: ac 01 movw r20, r24 + 92a: 0a 2e mov r0, r26 + 92c: 06 94 lsr r0 + 92e: 57 95 ror r21 + 930: 47 95 ror r20 + 932: 37 95 ror r19 + 934: 27 95 ror r18 + 936: ba 95 dec r27 + 938: c9 f7 brne .-14 ; 0x92c <__ultoa_invert+0xa2> + 93a: 62 0f add r22, r18 + 93c: 73 1f adc r23, r19 + 93e: 84 1f adc r24, r20 + 940: 95 1f adc r25, r21 + 942: a0 1d adc r26, r0 + 944: 08 95 ret + +00000946 <_exit>: + 946: f8 94 cli + +00000948 <__stop_program>: + 948: ff cf rjmp .-2 ; 0x948 <__stop_program> diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec index 6f6627c..49463ab 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec @@ -1,27 +1,152 @@ S0180000756C747261736F6E696353656E736F722E737265634E -S113000045C0000082C0000056C0000054C000007B -S113001052C0000050C000004EC000004CC00000A0 -S11300204AC0000048C0000046C0000044C00000B0 -S113003042C0000040C000003EC000003CC00000C0 -S11300403AC0000038C0000036C0000034C00000D0 -S113005032C0000030C000002EC000002CC00000E0 -S11300602AC0000028C0000026C0000024C00000F0 -S113007022C0000020C000001EC000001CC0000000 -S11300801AC0000018C0000016C0000011241FBED2 -S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0ECE7EF -S11300A0F1E000E00BBF02C007900D92A230B1074F -S11300B0D9F747D061C0A4CF20E030E006C046E0C5 -S11300C04A95F1F700C02F5F3F4F28173907B8F35F -S11300D0089520E030E008C0E7E8F3E13197F1F754 -S11300E000C000002F5F3F4F28173907A8F3089579 -S11300F0CF93DF93C5E6D0E018828AE090E0DCDF9E -S113010081E08883DF91CF9108951F920F920FB6FB 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+S1130930479537952795BA95C9F7620F731F841F9A +S10D0940951FA01D0895F894FFCF41 +S107094A012564001B S9030000FC diff --git a/Microcontrollers/ultrasonicSensor/lcd_control.c b/Microcontrollers/ultrasonicSensor/lcd_control.c index 17487c7..07fc59c 100644 --- a/Microcontrollers/ultrasonicSensor/lcd_control.c +++ b/Microcontrollers/ultrasonicSensor/lcd_control.c @@ -126,8 +126,8 @@ void lcd_move_right(void){ void lcd_write_int(int number) { - int length = snprintf(NULL, 0, "%d", number + 1); + int length = snprintf(NULL, 0, "%d", number); char str[length + 1]; - snprintf(str, length + 1, "%d", number + 1); + snprintf(str, length + 1, "%d", number); lcd_write_string(str); } diff --git a/Microcontrollers/ultrasonicSensor/main.c b/Microcontrollers/ultrasonicSensor/main.c index 4108632..3b4c977 100644 --- a/Microcontrollers/ultrasonicSensor/main.c +++ b/Microcontrollers/ultrasonicSensor/main.c @@ -28,6 +28,8 @@ enum interrupt_status {INTERRUPT_FALLING, INTERRUPT_RISING}; static enum interrupt_status int_stat = INTERRUPT_RISING; +uint16_t timer_dist = 0; // time measured by timer; + void wait_us(unsigned int us) { for(int i = 0; i < us; i++) @@ -61,6 +63,9 @@ ISR(INT0_vect) // set interrupt pin 0 on PORTD to falling edge EICRA = 0x02; + // reset the time in timer1 + TCNT1 = 0x00; + // set interrupt status int_stat = INTERRUPT_FALLING; } else @@ -69,6 +74,9 @@ ISR(INT0_vect) // set interrupt pin 0 on PORTD to rising edge EICRA = 0x03; + // read timer1 into time_dist + timer_dist = TCNT1; + // set interrupt status int_stat = INTERRUPT_RISING; } @@ -81,26 +89,34 @@ int main(void) DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt - DDRA = 0xFF; - EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) + TCCR1A = 0b00000000; // initialize timer1, prescaler=256 + TCCR1B = 0b00001100; // CTC compare A, RUN + + sei(); // turn on interrupt system + init_4bits_mode(); + + _delay_ms(10); + + lcd_clear(); + + /* Replace with your application code */ while (1) { ultrasonic_send_pulse(); - if (int_stat == INTERRUPT_FALLING) - { - PORTA = 0xFF; - } else { - PORTA = 0x00; - } - wait_ms(100); + int distance = timer_dist * 340 / 2; + lcd_clear(); + lcd_write_int(distance); + + + wait_ms(1000); } } From c7aefdc95d8a9c247b13ab6b44ee942e4a5f4956 Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Thu, 18 Mar 2021 20:24:04 +0100 Subject: [PATCH 06/11] interrupt doesn't generate -____- --- .../Opdracht 2.2/Debug/memoryfile.xml | 4 +- Microcontrollers/Opdracht 2.2/main.c | 32 - .../Debug/ultrasonicSensor.lss | 2305 ++++++++--------- .../Debug/ultrasonicSensor.srec | 298 ++- Microcontrollers/ultrasonicSensor/main.c | 5 +- 5 files changed, 1294 insertions(+), 1350 deletions(-) diff --git a/Microcontrollers/Opdracht 2.2/Debug/memoryfile.xml b/Microcontrollers/Opdracht 2.2/Debug/memoryfile.xml index d62a7ce..699facf 100644 --- a/Microcontrollers/Opdracht 2.2/Debug/memoryfile.xml +++ b/Microcontrollers/Opdracht 2.2/Debug/memoryfile.xml @@ -4,8 +4,8 @@ bytes 131072 - 318 - 130754 + 280 + 130792 bytes diff --git a/Microcontrollers/Opdracht 2.2/main.c b/Microcontrollers/Opdracht 2.2/main.c index eef2e4d..5e83604 100644 --- a/Microcontrollers/Opdracht 2.2/main.c +++ b/Microcontrollers/Opdracht 2.2/main.c @@ -65,36 +65,4 @@ int main(void) } -void init_4bits_mode(void) { - // PORTC output mode and all low (also E and RS pin) - DDRC = 0xFF; - PORTC = 0x00; - PORTC = 0x20; // (0x28 for 2 lines) - lcd_strobe_lcd_e(); -} - -void init_4bits_mode(void) { - - // PORTC output mode and all low (also E and RS pin) - DDRC = 0xFF; - PORTC = 0x00; - - PORTC = 0x20; // function for 4-bit 1 row - lcd_strobe_lcd_e(); - - PORTC = 0x20; // function high nibble 4-bit 2 row - lcd_strobe_lcd_e(); - PORTC = 0x80; // function low nibble 4-bit 2 row - lcd_strobe_lcd_e(); - - PORTC = 0x00; // function high nibble turn on visible blinking-block cursor - lcd_strobe_lcd_e(); - PORTC = 0xF0; // function low nibble turn on visible blinking-block cursor - lcd_strobe_lcd_e(); - - PORTC = 0x00; // Entry mode set high nibble - lcd_strobe_lcd_e(); - PORTC = 0x60; // Entry mode set low nibble - lcd_strobe_lcd_e(); -} \ No newline at end of file diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss index da8af0d..d8fee23 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss @@ -3,31 +3,29 @@ ultrasonicSensor.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 00000004 00800100 0000094a 000009de 2**0 + 0 .data 00000006 00800100 0000092e 000009a2 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 0000094a 00000000 00000000 00000094 2**1 + 1 .text 0000092e 00000000 00000000 00000074 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .bss 00000002 00800104 00800104 000009e2 2**0 - ALLOC - 3 .comment 0000005c 00000000 00000000 000009e2 2**0 + 2 .comment 0000005c 00000000 00000000 000009a8 2**0 CONTENTS, READONLY - 4 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000a40 2**2 + 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000a04 2**2 CONTENTS, READONLY - 5 .debug_aranges 000000b8 00000000 00000000 00000a7c 2**0 + 4 .debug_aranges 000000b8 00000000 00000000 00000a40 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_info 00000fd4 00000000 00000000 00000b34 2**0 + 5 .debug_info 00000fc1 00000000 00000000 00000af8 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_abbrev 00000a97 00000000 00000000 00001b08 2**0 + 6 .debug_abbrev 00000a99 00000000 00000000 00001ab9 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_line 0000071a 00000000 00000000 0000259f 2**0 + 7 .debug_line 00000716 00000000 00000000 00002552 2**0 CONTENTS, READONLY, DEBUGGING - 9 .debug_frame 000001b4 00000000 00000000 00002cbc 2**2 + 8 .debug_frame 000001b4 00000000 00000000 00002c68 2**2 CONTENTS, READONLY, DEBUGGING - 10 .debug_str 0000059a 00000000 00000000 00002e70 2**0 + 9 .debug_str 0000059a 00000000 00000000 00002e1c 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_loc 0000047c 00000000 00000000 0000340a 2**0 + 10 .debug_loc 0000049c 00000000 00000000 000033b6 2**0 CONTENTS, READONLY, DEBUGGING - 12 .debug_ranges 00000098 00000000 00000000 00003886 2**0 + 11 .debug_ranges 00000098 00000000 00000000 00003852 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -35,73 +33,73 @@ Disassembly of section .text: 00000000 <__vectors>: 0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end> 2: 00 00 nop - 4: 62 c1 rjmp .+708 ; 0x2ca <__vector_1> + 4: 5a c1 rjmp .+692 ; 0x2ba <__vector_1> 6: 00 00 nop - 8: 5e c0 rjmp .+188 ; 0xc6 <__bad_interrupt> + 8: 56 c0 rjmp .+172 ; 0xb6 <__bad_interrupt> a: 00 00 nop - c: 5c c0 rjmp .+184 ; 0xc6 <__bad_interrupt> + c: 54 c0 rjmp .+168 ; 0xb6 <__bad_interrupt> e: 00 00 nop - 10: 5a c0 rjmp .+180 ; 0xc6 <__bad_interrupt> + 10: 52 c0 rjmp .+164 ; 0xb6 <__bad_interrupt> 12: 00 00 nop - 14: 58 c0 rjmp .+176 ; 0xc6 <__bad_interrupt> + 14: 50 c0 rjmp .+160 ; 0xb6 <__bad_interrupt> 16: 00 00 nop - 18: 56 c0 rjmp .+172 ; 0xc6 <__bad_interrupt> + 18: 4e c0 rjmp .+156 ; 0xb6 <__bad_interrupt> 1a: 00 00 nop - 1c: 54 c0 rjmp .+168 ; 0xc6 <__bad_interrupt> + 1c: 4c c0 rjmp .+152 ; 0xb6 <__bad_interrupt> 1e: 00 00 nop - 20: 52 c0 rjmp .+164 ; 0xc6 <__bad_interrupt> + 20: 4a c0 rjmp .+148 ; 0xb6 <__bad_interrupt> 22: 00 00 nop - 24: 50 c0 rjmp .+160 ; 0xc6 <__bad_interrupt> + 24: 48 c0 rjmp .+144 ; 0xb6 <__bad_interrupt> 26: 00 00 nop - 28: 4e c0 rjmp .+156 ; 0xc6 <__bad_interrupt> + 28: 46 c0 rjmp .+140 ; 0xb6 <__bad_interrupt> 2a: 00 00 nop - 2c: 4c c0 rjmp .+152 ; 0xc6 <__bad_interrupt> + 2c: 44 c0 rjmp .+136 ; 0xb6 <__bad_interrupt> 2e: 00 00 nop - 30: 4a c0 rjmp .+148 ; 0xc6 <__bad_interrupt> + 30: 42 c0 rjmp .+132 ; 0xb6 <__bad_interrupt> 32: 00 00 nop - 34: 48 c0 rjmp .+144 ; 0xc6 <__bad_interrupt> + 34: 40 c0 rjmp .+128 ; 0xb6 <__bad_interrupt> 36: 00 00 nop - 38: 46 c0 rjmp .+140 ; 0xc6 <__bad_interrupt> + 38: 3e c0 rjmp .+124 ; 0xb6 <__bad_interrupt> 3a: 00 00 nop - 3c: 44 c0 rjmp .+136 ; 0xc6 <__bad_interrupt> + 3c: 3c c0 rjmp .+120 ; 0xb6 <__bad_interrupt> 3e: 00 00 nop - 40: 42 c0 rjmp .+132 ; 0xc6 <__bad_interrupt> + 40: 3a c0 rjmp .+116 ; 0xb6 <__bad_interrupt> 42: 00 00 nop - 44: 40 c0 rjmp .+128 ; 0xc6 <__bad_interrupt> + 44: 38 c0 rjmp .+112 ; 0xb6 <__bad_interrupt> 46: 00 00 nop - 48: 3e c0 rjmp .+124 ; 0xc6 <__bad_interrupt> + 48: 36 c0 rjmp .+108 ; 0xb6 <__bad_interrupt> 4a: 00 00 nop - 4c: 3c c0 rjmp .+120 ; 0xc6 <__bad_interrupt> + 4c: 34 c0 rjmp .+104 ; 0xb6 <__bad_interrupt> 4e: 00 00 nop - 50: 3a c0 rjmp .+116 ; 0xc6 <__bad_interrupt> + 50: 32 c0 rjmp .+100 ; 0xb6 <__bad_interrupt> 52: 00 00 nop - 54: 38 c0 rjmp .+112 ; 0xc6 <__bad_interrupt> + 54: 30 c0 rjmp .+96 ; 0xb6 <__bad_interrupt> 56: 00 00 nop - 58: 36 c0 rjmp .+108 ; 0xc6 <__bad_interrupt> + 58: 2e c0 rjmp .+92 ; 0xb6 <__bad_interrupt> 5a: 00 00 nop - 5c: 34 c0 rjmp .+104 ; 0xc6 <__bad_interrupt> + 5c: 2c c0 rjmp .+88 ; 0xb6 <__bad_interrupt> 5e: 00 00 nop - 60: 32 c0 rjmp .+100 ; 0xc6 <__bad_interrupt> + 60: 2a c0 rjmp .+84 ; 0xb6 <__bad_interrupt> 62: 00 00 nop - 64: 30 c0 rjmp .+96 ; 0xc6 <__bad_interrupt> + 64: 28 c0 rjmp .+80 ; 0xb6 <__bad_interrupt> 66: 00 00 nop - 68: 2e c0 rjmp .+92 ; 0xc6 <__bad_interrupt> + 68: 26 c0 rjmp .+76 ; 0xb6 <__bad_interrupt> 6a: 00 00 nop - 6c: 2c c0 rjmp .+88 ; 0xc6 <__bad_interrupt> + 6c: 24 c0 rjmp .+72 ; 0xb6 <__bad_interrupt> 6e: 00 00 nop - 70: 2a c0 rjmp .+84 ; 0xc6 <__bad_interrupt> + 70: 22 c0 rjmp .+68 ; 0xb6 <__bad_interrupt> 72: 00 00 nop - 74: 28 c0 rjmp .+80 ; 0xc6 <__bad_interrupt> + 74: 20 c0 rjmp .+64 ; 0xb6 <__bad_interrupt> 76: 00 00 nop - 78: 26 c0 rjmp .+76 ; 0xc6 <__bad_interrupt> + 78: 1e c0 rjmp .+60 ; 0xb6 <__bad_interrupt> 7a: 00 00 nop - 7c: 24 c0 rjmp .+72 ; 0xc6 <__bad_interrupt> + 7c: 1c c0 rjmp .+56 ; 0xb6 <__bad_interrupt> 7e: 00 00 nop - 80: 22 c0 rjmp .+68 ; 0xc6 <__bad_interrupt> + 80: 1a c0 rjmp .+52 ; 0xb6 <__bad_interrupt> 82: 00 00 nop - 84: 20 c0 rjmp .+64 ; 0xc6 <__bad_interrupt> + 84: 18 c0 rjmp .+48 ; 0xb6 <__bad_interrupt> 86: 00 00 nop - 88: 1e c0 rjmp .+60 ; 0xc6 <__bad_interrupt> + 88: 16 c0 rjmp .+44 ; 0xb6 <__bad_interrupt> ... 0000008c <__ctors_end>: @@ -116,1282 +114,1261 @@ Disassembly of section .text: 98: 11 e0 ldi r17, 0x01 ; 1 9a: a0 e0 ldi r26, 0x00 ; 0 9c: b1 e0 ldi r27, 0x01 ; 1 - 9e: ea e4 ldi r30, 0x4A ; 74 + 9e: ee e2 ldi r30, 0x2E ; 46 a0: f9 e0 ldi r31, 0x09 ; 9 a2: 00 e0 ldi r16, 0x00 ; 0 a4: 0b bf out 0x3b, r16 ; 59 a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14> a8: 07 90 elpm r0, Z+ aa: 0d 92 st X+, r0 - ac: a4 30 cpi r26, 0x04 ; 4 + ac: a6 30 cpi r26, 0x06 ; 6 ae: b1 07 cpc r27, r17 b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> + b2: 2f d1 rcall .+606 ; 0x312
+ b4: 3a c4 rjmp .+2164 ; 0x92a <_exit> -000000b2 <__do_clear_bss>: - b2: 21 e0 ldi r18, 0x01 ; 1 - b4: a4 e0 ldi r26, 0x04 ; 4 - b6: b1 e0 ldi r27, 0x01 ; 1 - b8: 01 c0 rjmp .+2 ; 0xbc <.do_clear_bss_start> +000000b6 <__bad_interrupt>: + b6: a4 cf rjmp .-184 ; 0x0 <__vectors> -000000ba <.do_clear_bss_loop>: - ba: 1d 92 st X+, r1 - -000000bc <.do_clear_bss_start>: - bc: a6 30 cpi r26, 0x06 ; 6 - be: b2 07 cpc r27, r18 - c0: e1 f7 brne .-8 ; 0xba <.do_clear_bss_loop> - c2: 29 d1 rcall .+594 ; 0x316
- c4: 40 c4 rjmp .+2176 ; 0x946 <_exit> - -000000c6 <__bad_interrupt>: - c6: 9c cf rjmp .-200 ; 0x0 <__vectors> - -000000c8 : +000000b8 : } } void lcd_move_right(void){ lcd_write_command(0x1E); - c8: 9b b3 in r25, 0x1b ; 27 - ca: 21 e0 ldi r18, 0x01 ; 1 - cc: 30 e0 ldi r19, 0x00 ; 0 - ce: 02 c0 rjmp .+4 ; 0xd4 - d0: 22 0f add r18, r18 - d2: 33 1f adc r19, r19 - d4: 8a 95 dec r24 - d6: e2 f7 brpl .-8 ; 0xd0 - d8: 29 2b or r18, r25 - da: 2b bb out 0x1b, r18 ; 27 - dc: 08 95 ret + b8: 9b b3 in r25, 0x1b ; 27 + ba: 21 e0 ldi r18, 0x01 ; 1 + bc: 30 e0 ldi r19, 0x00 ; 0 + be: 02 c0 rjmp .+4 ; 0xc4 + c0: 22 0f add r18, r18 + c2: 33 1f adc r19, r19 + c4: 8a 95 dec r24 + c6: e2 f7 brpl .-8 ; 0xc0 + c8: 29 2b or r18, r25 + ca: 2b bb out 0x1b, r18 ; 27 + cc: 08 95 ret -000000de : - de: 9b b3 in r25, 0x1b ; 27 - e0: 21 e0 ldi r18, 0x01 ; 1 - e2: 30 e0 ldi r19, 0x00 ; 0 - e4: 02 c0 rjmp .+4 ; 0xea - e6: 22 0f add r18, r18 - e8: 33 1f adc r19, r19 - ea: 8a 95 dec r24 - ec: e2 f7 brpl .-8 ; 0xe6 - ee: 20 95 com r18 - f0: 29 23 and r18, r25 - f2: 2b bb out 0x1b, r18 ; 27 - f4: 08 95 ret +000000ce : + ce: 9b b3 in r25, 0x1b ; 27 + d0: 21 e0 ldi r18, 0x01 ; 1 + d2: 30 e0 ldi r19, 0x00 ; 0 + d4: 02 c0 rjmp .+4 ; 0xda + d6: 22 0f add r18, r18 + d8: 33 1f adc r19, r19 + da: 8a 95 dec r24 + dc: e2 f7 brpl .-8 ; 0xd6 + de: 20 95 com r18 + e0: 29 23 and r18, r25 + e2: 2b bb out 0x1b, r18 ; 27 + e4: 08 95 ret -000000f6 : - f6: 86 e0 ldi r24, 0x06 ; 6 - f8: 90 e0 ldi r25, 0x00 ; 0 - fa: e6 df rcall .-52 ; 0xc8 - fc: 83 ec ldi r24, 0xC3 ; 195 - fe: 99 e0 ldi r25, 0x09 ; 9 - 100: 01 97 sbiw r24, 0x01 ; 1 - 102: f1 f7 brne .-4 ; 0x100 - 104: 00 c0 rjmp .+0 ; 0x106 - 106: 00 00 nop - 108: 86 e0 ldi r24, 0x06 ; 6 - 10a: 90 e0 ldi r25, 0x00 ; 0 - 10c: e8 df rcall .-48 ; 0xde - 10e: 83 ec ldi r24, 0xC3 ; 195 - 110: 99 e0 ldi r25, 0x09 ; 9 - 112: 01 97 sbiw r24, 0x01 ; 1 - 114: f1 f7 brne .-4 ; 0x112 - 116: 00 c0 rjmp .+0 ; 0x118 - 118: 00 00 nop - 11a: 08 95 ret +000000e6 : + e6: 86 e0 ldi r24, 0x06 ; 6 + e8: 90 e0 ldi r25, 0x00 ; 0 + ea: e6 df rcall .-52 ; 0xb8 + ec: 83 ec ldi r24, 0xC3 ; 195 + ee: 99 e0 ldi r25, 0x09 ; 9 + f0: 01 97 sbiw r24, 0x01 ; 1 + f2: f1 f7 brne .-4 ; 0xf0 + f4: 00 c0 rjmp .+0 ; 0xf6 + f6: 00 00 nop + f8: 86 e0 ldi r24, 0x06 ; 6 + fa: 90 e0 ldi r25, 0x00 ; 0 + fc: e8 df rcall .-48 ; 0xce + fe: 83 ec ldi r24, 0xC3 ; 195 + 100: 99 e0 ldi r25, 0x09 ; 9 + 102: 01 97 sbiw r24, 0x01 ; 1 + 104: f1 f7 brne .-4 ; 0x102 + 106: 00 c0 rjmp .+0 ; 0x108 + 108: 00 00 nop + 10a: 08 95 ret -0000011c : - 11c: cf 93 push r28 - 11e: c8 2f mov r28, r24 - 120: 85 bb out 0x15, r24 ; 21 - 122: 84 e0 ldi r24, 0x04 ; 4 - 124: 90 e0 ldi r25, 0x00 ; 0 - 126: d0 df rcall .-96 ; 0xc8 - 128: e6 df rcall .-52 ; 0xf6 - 12a: c2 95 swap r28 - 12c: c0 7f andi r28, 0xF0 ; 240 - 12e: c5 bb out 0x15, r28 ; 21 - 130: 84 e0 ldi r24, 0x04 ; 4 - 132: 90 e0 ldi r25, 0x00 ; 0 - 134: c9 df rcall .-110 ; 0xc8 - 136: df df rcall .-66 ; 0xf6 - 138: cf 91 pop r28 - 13a: 08 95 ret +0000010c : + 10c: cf 93 push r28 + 10e: c8 2f mov r28, r24 + 110: 85 bb out 0x15, r24 ; 21 + 112: 84 e0 ldi r24, 0x04 ; 4 + 114: 90 e0 ldi r25, 0x00 ; 0 + 116: d0 df rcall .-96 ; 0xb8 + 118: e6 df rcall .-52 ; 0xe6 + 11a: c2 95 swap r28 + 11c: c0 7f andi r28, 0xF0 ; 240 + 11e: c5 bb out 0x15, r28 ; 21 + 120: 84 e0 ldi r24, 0x04 ; 4 + 122: 90 e0 ldi r25, 0x00 ; 0 + 124: c9 df rcall .-110 ; 0xb8 + 126: df df rcall .-66 ; 0xe6 + 128: cf 91 pop r28 + 12a: 08 95 ret -0000013c : - 13c: cf 93 push r28 - 13e: c8 2f mov r28, r24 - 140: 85 bb out 0x15, r24 ; 21 - 142: 84 e0 ldi r24, 0x04 ; 4 - 144: 90 e0 ldi r25, 0x00 ; 0 - 146: cb df rcall .-106 ; 0xde - 148: d6 df rcall .-84 ; 0xf6 - 14a: c2 95 swap r28 - 14c: c0 7f andi r28, 0xF0 ; 240 - 14e: c5 bb out 0x15, r28 ; 21 - 150: 84 e0 ldi r24, 0x04 ; 4 - 152: 90 e0 ldi r25, 0x00 ; 0 - 154: c4 df rcall .-120 ; 0xde - 156: cf df rcall .-98 ; 0xf6 - 158: cf 91 pop r28 - 15a: 08 95 ret +0000012c : + 12c: cf 93 push r28 + 12e: c8 2f mov r28, r24 + 130: 85 bb out 0x15, r24 ; 21 + 132: 84 e0 ldi r24, 0x04 ; 4 + 134: 90 e0 ldi r25, 0x00 ; 0 + 136: cb df rcall .-106 ; 0xce + 138: d6 df rcall .-84 ; 0xe6 + 13a: c2 95 swap r28 + 13c: c0 7f andi r28, 0xF0 ; 240 + 13e: c5 bb out 0x15, r28 ; 21 + 140: 84 e0 ldi r24, 0x04 ; 4 + 142: 90 e0 ldi r25, 0x00 ; 0 + 144: c4 df rcall .-120 ; 0xce + 146: cf df rcall .-98 ; 0xe6 + 148: cf 91 pop r28 + 14a: 08 95 ret -0000015c : - 15c: 81 e0 ldi r24, 0x01 ; 1 - 15e: ee df rcall .-36 ; 0x13c - 160: 87 e8 ldi r24, 0x87 ; 135 - 162: 93 e1 ldi r25, 0x13 ; 19 - 164: 01 97 sbiw r24, 0x01 ; 1 - 166: f1 f7 brne .-4 ; 0x164 - 168: 00 c0 rjmp .+0 ; 0x16a - 16a: 00 00 nop - 16c: 80 e8 ldi r24, 0x80 ; 128 - 16e: e6 cf rjmp .-52 ; 0x13c - 170: 08 95 ret +0000014c : + 14c: 81 e0 ldi r24, 0x01 ; 1 + 14e: ee df rcall .-36 ; 0x12c + 150: 87 e8 ldi r24, 0x87 ; 135 + 152: 93 e1 ldi r25, 0x13 ; 19 + 154: 01 97 sbiw r24, 0x01 ; 1 + 156: f1 f7 brne .-4 ; 0x154 + 158: 00 c0 rjmp .+0 ; 0x15a + 15a: 00 00 nop + 15c: 80 e8 ldi r24, 0x80 ; 128 + 15e: e6 cf rjmp .-52 ; 0x12c + 160: 08 95 ret -00000172 : - 172: cf 93 push r28 - 174: 8f ef ldi r24, 0xFF ; 255 - 176: 84 bb out 0x14, r24 ; 20 - 178: 85 bb out 0x15, r24 ; 21 - 17a: 81 bb out 0x11, r24 ; 17 - 17c: 8a bb out 0x1a, r24 ; 26 - 17e: 15 ba out 0x15, r1 ; 21 - 180: 1b ba out 0x1b, r1 ; 27 - 182: c0 e2 ldi r28, 0x20 ; 32 - 184: c5 bb out 0x15, r28 ; 21 - 186: b7 df rcall .-146 ; 0xf6 - 188: c5 bb out 0x15, r28 ; 21 - 18a: b5 df rcall .-150 ; 0xf6 - 18c: 80 e8 ldi r24, 0x80 ; 128 - 18e: 85 bb out 0x15, r24 ; 21 - 190: b2 df rcall .-156 ; 0xf6 - 192: 15 ba out 0x15, r1 ; 21 - 194: b0 df rcall .-160 ; 0xf6 - 196: 80 ef ldi r24, 0xF0 ; 240 - 198: 85 bb out 0x15, r24 ; 21 - 19a: ad df rcall .-166 ; 0xf6 - 19c: 15 ba out 0x15, r1 ; 21 - 19e: ab df rcall .-170 ; 0xf6 - 1a0: 80 e6 ldi r24, 0x60 ; 96 - 1a2: 85 bb out 0x15, r24 ; 21 - 1a4: a8 df rcall .-176 ; 0xf6 - 1a6: 82 e0 ldi r24, 0x02 ; 2 - 1a8: c9 df rcall .-110 ; 0x13c - 1aa: a5 df rcall .-182 ; 0xf6 - 1ac: cf 91 pop r28 - 1ae: 08 95 ret +00000162 : + 162: cf 93 push r28 + 164: 8f ef ldi r24, 0xFF ; 255 + 166: 84 bb out 0x14, r24 ; 20 + 168: 85 bb out 0x15, r24 ; 21 + 16a: 81 bb out 0x11, r24 ; 17 + 16c: 8a bb out 0x1a, r24 ; 26 + 16e: 15 ba out 0x15, r1 ; 21 + 170: 1b ba out 0x1b, r1 ; 27 + 172: c0 e2 ldi r28, 0x20 ; 32 + 174: c5 bb out 0x15, r28 ; 21 + 176: b7 df rcall .-146 ; 0xe6 + 178: c5 bb out 0x15, r28 ; 21 + 17a: b5 df rcall .-150 ; 0xe6 + 17c: 80 e8 ldi r24, 0x80 ; 128 + 17e: 85 bb out 0x15, r24 ; 21 + 180: b2 df rcall .-156 ; 0xe6 + 182: 15 ba out 0x15, r1 ; 21 + 184: b0 df rcall .-160 ; 0xe6 + 186: 80 ef ldi r24, 0xF0 ; 240 + 188: 85 bb out 0x15, r24 ; 21 + 18a: ad df rcall .-166 ; 0xe6 + 18c: 15 ba out 0x15, r1 ; 21 + 18e: ab df rcall .-170 ; 0xe6 + 190: 80 e6 ldi r24, 0x60 ; 96 + 192: 85 bb out 0x15, r24 ; 21 + 194: a8 df rcall .-176 ; 0xe6 + 196: 82 e0 ldi r24, 0x02 ; 2 + 198: c9 df rcall .-110 ; 0x12c + 19a: a5 df rcall .-182 ; 0xe6 + 19c: cf 91 pop r28 + 19e: 08 95 ret -000001b0 : - 1b0: cf 93 push r28 - 1b2: df 93 push r29 - 1b4: ec 01 movw r28, r24 - 1b6: 02 c0 rjmp .+4 ; 0x1bc - 1b8: b1 df rcall .-158 ; 0x11c - 1ba: 21 96 adiw r28, 0x01 ; 1 - 1bc: 88 81 ld r24, Y - 1be: 81 11 cpse r24, r1 - 1c0: fb cf rjmp .-10 ; 0x1b8 - 1c2: df 91 pop r29 - 1c4: cf 91 pop r28 - 1c6: 08 95 ret +000001a0 : + 1a0: cf 93 push r28 + 1a2: df 93 push r29 + 1a4: ec 01 movw r28, r24 + 1a6: 02 c0 rjmp .+4 ; 0x1ac + 1a8: b1 df rcall .-158 ; 0x10c + 1aa: 21 96 adiw r28, 0x01 ; 1 + 1ac: 88 81 ld r24, Y + 1ae: 81 11 cpse r24, r1 + 1b0: fb cf rjmp .-10 ; 0x1a8 + 1b2: df 91 pop r29 + 1b4: cf 91 pop r28 + 1b6: 08 95 ret -000001c8 : +000001b8 : } void lcd_write_int(int number) { - 1c8: af 92 push r10 - 1ca: bf 92 push r11 - 1cc: cf 92 push r12 - 1ce: df 92 push r13 - 1d0: ef 92 push r14 - 1d2: ff 92 push r15 - 1d4: 0f 93 push r16 - 1d6: 1f 93 push r17 - 1d8: cf 93 push r28 - 1da: df 93 push r29 - 1dc: cd b7 in r28, 0x3d ; 61 - 1de: de b7 in r29, 0x3e ; 62 - 1e0: d8 2e mov r13, r24 - 1e2: c9 2e mov r12, r25 + 1b8: af 92 push r10 + 1ba: bf 92 push r11 + 1bc: cf 92 push r12 + 1be: df 92 push r13 + 1c0: ef 92 push r14 + 1c2: ff 92 push r15 + 1c4: 0f 93 push r16 + 1c6: 1f 93 push r17 + 1c8: cf 93 push r28 + 1ca: df 93 push r29 + 1cc: cd b7 in r28, 0x3d ; 61 + 1ce: de b7 in r29, 0x3e ; 62 + 1d0: d8 2e mov r13, r24 + 1d2: c9 2e mov r12, r25 int length = snprintf(NULL, 0, "%d", number); char str[length + 1]; snprintf(str, length + 1, "%d", number); lcd_write_string(str); } - 1e4: ad b6 in r10, 0x3d ; 61 - 1e6: be b6 in r11, 0x3e ; 62 + 1d4: ad b6 in r10, 0x3d ; 61 + 1d6: be b6 in r11, 0x3e ; 62 lcd_write_command(0x1E); } void lcd_write_int(int number) { int length = snprintf(NULL, 0, "%d", number); - 1e8: 9f 93 push r25 - 1ea: 8f 93 push r24 - 1ec: 0f 2e mov r0, r31 - 1ee: f1 e0 ldi r31, 0x01 ; 1 - 1f0: ef 2e mov r14, r31 - 1f2: f1 e0 ldi r31, 0x01 ; 1 - 1f4: ff 2e mov r15, r31 - 1f6: f0 2d mov r31, r0 - 1f8: ff 92 push r15 - 1fa: ef 92 push r14 - 1fc: 1f 92 push r1 - 1fe: 1f 92 push r1 - 200: 1f 92 push r1 - 202: 1f 92 push r1 - 204: b7 d0 rcall .+366 ; 0x374 + 1d8: 9f 93 push r25 + 1da: 8f 93 push r24 + 1dc: 0f 2e mov r0, r31 + 1de: f3 e0 ldi r31, 0x03 ; 3 + 1e0: ef 2e mov r14, r31 + 1e2: f1 e0 ldi r31, 0x01 ; 1 + 1e4: ff 2e mov r15, r31 + 1e6: f0 2d mov r31, r0 + 1e8: ff 92 push r15 + 1ea: ef 92 push r14 + 1ec: 1f 92 push r1 + 1ee: 1f 92 push r1 + 1f0: 1f 92 push r1 + 1f2: 1f 92 push r1 + 1f4: b1 d0 rcall .+354 ; 0x358 char str[length + 1]; - 206: 01 96 adiw r24, 0x01 ; 1 - 208: 2d b7 in r18, 0x3d ; 61 - 20a: 3e b7 in r19, 0x3e ; 62 - 20c: 28 5f subi r18, 0xF8 ; 248 - 20e: 3f 4f sbci r19, 0xFF ; 255 - 210: 0f b6 in r0, 0x3f ; 63 - 212: f8 94 cli - 214: 3e bf out 0x3e, r19 ; 62 - 216: 0f be out 0x3f, r0 ; 63 - 218: 2d bf out 0x3d, r18 ; 61 - 21a: 28 1b sub r18, r24 - 21c: 39 0b sbc r19, r25 - 21e: 0f b6 in r0, 0x3f ; 63 - 220: f8 94 cli - 222: 3e bf out 0x3e, r19 ; 62 - 224: 0f be out 0x3f, r0 ; 63 - 226: 2d bf out 0x3d, r18 ; 61 - 228: 0d b7 in r16, 0x3d ; 61 - 22a: 1e b7 in r17, 0x3e ; 62 - 22c: 0f 5f subi r16, 0xFF ; 255 - 22e: 1f 4f sbci r17, 0xFF ; 255 + 1f6: 01 96 adiw r24, 0x01 ; 1 + 1f8: 2d b7 in r18, 0x3d ; 61 + 1fa: 3e b7 in r19, 0x3e ; 62 + 1fc: 28 5f subi r18, 0xF8 ; 248 + 1fe: 3f 4f sbci r19, 0xFF ; 255 + 200: 0f b6 in r0, 0x3f ; 63 + 202: f8 94 cli + 204: 3e bf out 0x3e, r19 ; 62 + 206: 0f be out 0x3f, r0 ; 63 + 208: 2d bf out 0x3d, r18 ; 61 + 20a: 28 1b sub r18, r24 + 20c: 39 0b sbc r19, r25 + 20e: 0f b6 in r0, 0x3f ; 63 + 210: f8 94 cli + 212: 3e bf out 0x3e, r19 ; 62 + 214: 0f be out 0x3f, r0 ; 63 + 216: 2d bf out 0x3d, r18 ; 61 + 218: 0d b7 in r16, 0x3d ; 61 + 21a: 1e b7 in r17, 0x3e ; 62 + 21c: 0f 5f subi r16, 0xFF ; 255 + 21e: 1f 4f sbci r17, 0xFF ; 255 snprintf(str, length + 1, "%d", number); - 230: cf 92 push r12 - 232: df 92 push r13 - 234: ff 92 push r15 - 236: ef 92 push r14 - 238: 9f 93 push r25 - 23a: 8f 93 push r24 - 23c: 1f 93 push r17 - 23e: 0f 93 push r16 - 240: 99 d0 rcall .+306 ; 0x374 + 220: cf 92 push r12 + 222: df 92 push r13 + 224: ff 92 push r15 + 226: ef 92 push r14 + 228: 9f 93 push r25 + 22a: 8f 93 push r24 + 22c: 1f 93 push r17 + 22e: 0f 93 push r16 + 230: 93 d0 rcall .+294 ; 0x358 lcd_write_string(str); - 242: 80 2f mov r24, r16 - 244: 91 2f mov r25, r17 - 246: b4 df rcall .-152 ; 0x1b0 + 232: 80 2f mov r24, r16 + 234: 91 2f mov r25, r17 + 236: b4 df rcall .-152 ; 0x1a0 } - 248: 8d b7 in r24, 0x3d ; 61 - 24a: 9e b7 in r25, 0x3e ; 62 - 24c: 08 96 adiw r24, 0x08 ; 8 - 24e: 0f b6 in r0, 0x3f ; 63 - 250: f8 94 cli - 252: 9e bf out 0x3e, r25 ; 62 - 254: 0f be out 0x3f, r0 ; 63 - 256: 8d bf out 0x3d, r24 ; 61 - 258: 0f b6 in r0, 0x3f ; 63 - 25a: f8 94 cli - 25c: be be out 0x3e, r11 ; 62 - 25e: 0f be out 0x3f, r0 ; 63 - 260: ad be out 0x3d, r10 ; 61 - 262: df 91 pop r29 - 264: cf 91 pop r28 - 266: 1f 91 pop r17 - 268: 0f 91 pop r16 - 26a: ff 90 pop r15 - 26c: ef 90 pop r14 - 26e: df 90 pop r13 - 270: cf 90 pop r12 - 272: bf 90 pop r11 - 274: af 90 pop r10 - 276: 08 95 ret + 238: 8d b7 in r24, 0x3d ; 61 + 23a: 9e b7 in r25, 0x3e ; 62 + 23c: 08 96 adiw r24, 0x08 ; 8 + 23e: 0f b6 in r0, 0x3f ; 63 + 240: f8 94 cli + 242: 9e bf out 0x3e, r25 ; 62 + 244: 0f be out 0x3f, r0 ; 63 + 246: 8d bf out 0x3d, r24 ; 61 + 248: 0f b6 in r0, 0x3f ; 63 + 24a: f8 94 cli + 24c: be be out 0x3e, r11 ; 62 + 24e: 0f be out 0x3f, r0 ; 63 + 250: ad be out 0x3d, r10 ; 61 + 252: df 91 pop r29 + 254: cf 91 pop r28 + 256: 1f 91 pop r17 + 258: 0f 91 pop r16 + 25a: ff 90 pop r15 + 25c: ef 90 pop r14 + 25e: df 90 pop r13 + 260: cf 90 pop r12 + 262: bf 90 pop r11 + 264: af 90 pop r10 + 266: 08 95 ret -00000278 : +00000268 : -uint16_t timer_dist = 0; // time measured by timer; +uint16_t timer_dist = 125; // time measured by timer; void wait_us(unsigned int us) { for(int i = 0; i < us; i++) - 278: 20 e0 ldi r18, 0x00 ; 0 - 27a: 30 e0 ldi r19, 0x00 ; 0 - 27c: 06 c0 rjmp .+12 ; 0x28a + 268: 20 e0 ldi r18, 0x00 ; 0 + 26a: 30 e0 ldi r19, 0x00 ; 0 + 26c: 06 c0 rjmp .+12 ; 0x27a #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); - 27e: 46 e0 ldi r20, 0x06 ; 6 - 280: 4a 95 dec r20 - 282: f1 f7 brne .-4 ; 0x280 - 284: 00 c0 rjmp .+0 ; 0x286 - 286: 2f 5f subi r18, 0xFF ; 255 - 288: 3f 4f sbci r19, 0xFF ; 255 - 28a: 28 17 cp r18, r24 - 28c: 39 07 cpc r19, r25 - 28e: b8 f3 brcs .-18 ; 0x27e + 26e: 46 e0 ldi r20, 0x06 ; 6 + 270: 4a 95 dec r20 + 272: f1 f7 brne .-4 ; 0x270 + 274: 00 c0 rjmp .+0 ; 0x276 + 276: 2f 5f subi r18, 0xFF ; 255 + 278: 3f 4f sbci r19, 0xFF ; 255 + 27a: 28 17 cp r18, r24 + 27c: 39 07 cpc r19, r25 + 27e: b8 f3 brcs .-18 ; 0x26e { _delay_us(1); } } - 290: 08 95 ret + 280: 08 95 ret -00000292 : +00000282 : void wait_ms(unsigned int ms) { for(int i = 0; i < ms; i++) - 292: 20 e0 ldi r18, 0x00 ; 0 - 294: 30 e0 ldi r19, 0x00 ; 0 - 296: 08 c0 rjmp .+16 ; 0x2a8 + 282: 20 e0 ldi r18, 0x00 ; 0 + 284: 30 e0 ldi r19, 0x00 ; 0 + 286: 08 c0 rjmp .+16 ; 0x298 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); - 298: e7 e8 ldi r30, 0x87 ; 135 - 29a: f3 e1 ldi r31, 0x13 ; 19 - 29c: 31 97 sbiw r30, 0x01 ; 1 - 29e: f1 f7 brne .-4 ; 0x29c - 2a0: 00 c0 rjmp .+0 ; 0x2a2 - 2a2: 00 00 nop - 2a4: 2f 5f subi r18, 0xFF ; 255 - 2a6: 3f 4f sbci r19, 0xFF ; 255 - 2a8: 28 17 cp r18, r24 - 2aa: 39 07 cpc r19, r25 - 2ac: a8 f3 brcs .-22 ; 0x298 + 288: e7 e8 ldi r30, 0x87 ; 135 + 28a: f3 e1 ldi r31, 0x13 ; 19 + 28c: 31 97 sbiw r30, 0x01 ; 1 + 28e: f1 f7 brne .-4 ; 0x28c + 290: 00 c0 rjmp .+0 ; 0x292 + 292: 00 00 nop + 294: 2f 5f subi r18, 0xFF ; 255 + 296: 3f 4f sbci r19, 0xFF ; 255 + 298: 28 17 cp r18, r24 + 29a: 39 07 cpc r19, r25 + 29c: a8 f3 brcs .-22 ; 0x288 { _delay_ms(1); } } - 2ae: 08 95 ret + 29e: 08 95 ret -000002b0 : +000002a0 : void ultrasonic_send_pulse() { - 2b0: cf 93 push r28 - 2b2: df 93 push r29 + 2a0: cf 93 push r28 + 2a2: df 93 push r29 PORTG = 0x00; // 10 us low pulse - 2b4: c5 e6 ldi r28, 0x65 ; 101 - 2b6: d0 e0 ldi r29, 0x00 ; 0 - 2b8: 18 82 st Y, r1 + 2a4: c5 e6 ldi r28, 0x65 ; 101 + 2a6: d0 e0 ldi r29, 0x00 ; 0 + 2a8: 18 82 st Y, r1 wait_us(10); - 2ba: 8a e0 ldi r24, 0x0A ; 10 - 2bc: 90 e0 ldi r25, 0x00 ; 0 - 2be: dc df rcall .-72 ; 0x278 + 2aa: 8a e0 ldi r24, 0x0A ; 10 + 2ac: 90 e0 ldi r25, 0x00 ; 0 + 2ae: dc df rcall .-72 ; 0x268 PORTG = 0x01; - 2c0: 81 e0 ldi r24, 0x01 ; 1 - 2c2: 88 83 st Y, r24 + 2b0: 81 e0 ldi r24, 0x01 ; 1 + 2b2: 88 83 st Y, r24 } - 2c4: df 91 pop r29 - 2c6: cf 91 pop r28 - 2c8: 08 95 ret + 2b4: df 91 pop r29 + 2b6: cf 91 pop r28 + 2b8: 08 95 ret -000002ca <__vector_1>: +000002ba <__vector_1>: ISR(INT0_vect) { - 2ca: 1f 92 push r1 - 2cc: 0f 92 push r0 - 2ce: 0f b6 in r0, 0x3f ; 63 - 2d0: 0f 92 push r0 - 2d2: 11 24 eor r1, r1 - 2d4: 8f 93 push r24 - 2d6: 9f 93 push r25 + 2ba: 1f 92 push r1 + 2bc: 0f 92 push r0 + 2be: 0f b6 in r0, 0x3f ; 63 + 2c0: 0f 92 push r0 + 2c2: 11 24 eor r1, r1 + 2c4: 8f 93 push r24 + 2c6: 9f 93 push r25 + timer_dist = 2009; + 2c8: 89 ed ldi r24, 0xD9 ; 217 + 2ca: 97 e0 ldi r25, 0x07 ; 7 + 2cc: 90 93 01 01 sts 0x0101, r25 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> + 2d0: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> // if the interrupt was generated on a rising edge (start sending echo) if (int_stat == INTERRUPT_RISING) - 2d8: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> - 2dc: 81 30 cpi r24, 0x01 ; 1 - 2de: 41 f4 brne .+16 ; 0x2f0 <__vector_1+0x26> + 2d4: 80 91 02 01 lds r24, 0x0102 ; 0x800102 + 2d8: 81 30 cpi r24, 0x01 ; 1 + 2da: 41 f4 brne .+16 ; 0x2ec <__vector_1+0x32> { // set interrupt pin 0 on PORTD to falling edge EICRA = 0x02; - 2e0: 82 e0 ldi r24, 0x02 ; 2 - 2e2: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + 2dc: 82 e0 ldi r24, 0x02 ; 2 + 2de: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> // reset the time in timer1 TCNT1 = 0x00; - 2e6: 1d bc out 0x2d, r1 ; 45 - 2e8: 1c bc out 0x2c, r1 ; 44 + 2e2: 1d bc out 0x2d, r1 ; 45 + 2e4: 1c bc out 0x2c, r1 ; 44 // set interrupt status int_stat = INTERRUPT_FALLING; - 2ea: 10 92 00 01 sts 0x0100, r1 ; 0x800100 <__DATA_REGION_ORIGIN__> - 2ee: 0c c0 rjmp .+24 ; 0x308 <__vector_1+0x3e> + 2e6: 10 92 02 01 sts 0x0102, r1 ; 0x800102 + 2ea: 0c c0 rjmp .+24 ; 0x304 <__vector_1+0x4a> } else // else if it was generated on a falling edge (end sending echo) { // set interrupt pin 0 on PORTD to rising edge EICRA = 0x03; - 2f0: 83 e0 ldi r24, 0x03 ; 3 - 2f2: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + 2ec: 83 e0 ldi r24, 0x03 ; 3 + 2ee: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> // read timer1 into time_dist timer_dist = TCNT1; - 2f6: 8c b5 in r24, 0x2c ; 44 - 2f8: 9d b5 in r25, 0x2d ; 45 - 2fa: 90 93 05 01 sts 0x0105, r25 ; 0x800105 <__data_end+0x1> - 2fe: 80 93 04 01 sts 0x0104, r24 ; 0x800104 <__data_end> + 2f2: 8c b5 in r24, 0x2c ; 44 + 2f4: 9d b5 in r25, 0x2d ; 45 + 2f6: 90 93 01 01 sts 0x0101, r25 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> + 2fa: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> // set interrupt status int_stat = INTERRUPT_RISING; - 302: 81 e0 ldi r24, 0x01 ; 1 - 304: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> + 2fe: 81 e0 ldi r24, 0x01 ; 1 + 300: 80 93 02 01 sts 0x0102, r24 ; 0x800102 } } - 308: 9f 91 pop r25 - 30a: 8f 91 pop r24 + 304: 9f 91 pop r25 + 306: 8f 91 pop r24 + 308: 0f 90 pop r0 + 30a: 0f be out 0x3f, r0 ; 63 30c: 0f 90 pop r0 - 30e: 0f be out 0x3f, r0 ; 63 - 310: 0f 90 pop r0 - 312: 1f 90 pop r1 - 314: 18 95 reti + 30e: 1f 90 pop r1 + 310: 18 95 reti -00000316
: +00000312
: int main(void) { DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug - 316: 8f ef ldi r24, 0xFF ; 255 - 318: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> + 312: 8f ef ldi r24, 0xFF ; 255 + 314: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt - 31c: 11 ba out 0x11, r1 ; 17 + 318: 11 ba out 0x11, r1 ; 17 EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge - 31e: ea e6 ldi r30, 0x6A ; 106 - 320: f0 e0 ldi r31, 0x00 ; 0 - 322: 80 81 ld r24, Z - 324: 83 60 ori r24, 0x03 ; 3 - 326: 80 83 st Z, r24 + 31a: ea e6 ldi r30, 0x6A ; 106 + 31c: f0 e0 ldi r31, 0x00 ; 0 + 31e: 80 81 ld r24, Z + 320: 83 60 ori r24, 0x03 ; 3 + 322: 80 83 st Z, r24 EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) - 328: 89 b7 in r24, 0x39 ; 57 - 32a: 81 60 ori r24, 0x01 ; 1 - 32c: 89 bf out 0x39, r24 ; 57 + 324: 89 b7 in r24, 0x39 ; 57 + 326: 81 60 ori r24, 0x01 ; 1 + 328: 89 bf out 0x39, r24 ; 57 TCCR1A = 0b00000000; // initialize timer1, prescaler=256 - 32e: 1f bc out 0x2f, r1 ; 47 + 32a: 1f bc out 0x2f, r1 ; 47 TCCR1B = 0b00001100; // CTC compare A, RUN - 330: 8c e0 ldi r24, 0x0C ; 12 - 332: 8e bd out 0x2e, r24 ; 46 + 32c: 8c e0 ldi r24, 0x0C ; 12 + 32e: 8e bd out 0x2e, r24 ; 46 sei(); // turn on interrupt system - 334: 78 94 sei + 330: 78 94 sei init_4bits_mode(); - 336: 1d df rcall .-454 ; 0x172 - 338: 8f e4 ldi r24, 0x4F ; 79 - 33a: 93 ec ldi r25, 0xC3 ; 195 - 33c: 01 97 sbiw r24, 0x01 ; 1 - 33e: f1 f7 brne .-4 ; 0x33c - 340: 00 c0 rjmp .+0 ; 0x342 + 332: 17 df rcall .-466 ; 0x162 + 334: 8f e4 ldi r24, 0x4F ; 79 + 336: 93 ec ldi r25, 0xC3 ; 195 + 338: 01 97 sbiw r24, 0x01 ; 1 + 33a: f1 f7 brne .-4 ; 0x338 + 33c: 00 c0 rjmp .+0 ; 0x33e _delay_ms(10); lcd_clear(); - 342: 00 00 nop + 33e: 00 00 nop /* Replace with your application code */ while (1) { ultrasonic_send_pulse(); - 344: 0b df rcall .-490 ; 0x15c - 346: b4 df rcall .-152 ; 0x2b0 + 340: 05 df rcall .-502 ; 0x14c + 342: ae df rcall .-164 ; 0x2a0 int distance = timer_dist * 340 / 2; - 348: 20 91 04 01 lds r18, 0x0104 ; 0x800104 <__data_end> - 34c: 30 91 05 01 lds r19, 0x0105 ; 0x800105 <__data_end+0x1> - 350: 84 e5 ldi r24, 0x54 ; 84 - 352: 91 e0 ldi r25, 0x01 ; 1 - 354: 28 9f mul r18, r24 - 356: e0 01 movw r28, r0 - 358: 29 9f mul r18, r25 - 35a: d0 0d add r29, r0 - 35c: 38 9f mul r19, r24 - 35e: d0 0d add r29, r0 - 360: 11 24 eor r1, r1 - 362: d6 95 lsr r29 lcd_clear(); - 364: c7 95 ror r28 - 366: fa de rcall .-524 ; 0x15c - lcd_write_int(distance); - 368: ce 01 movw r24, r28 - 36a: 2e df rcall .-420 ; 0x1c8 + 344: 03 df rcall .-506 ; 0x14c + 346: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> + lcd_write_int(timer_dist); + 34a: 90 91 01 01 lds r25, 0x0101 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> + 34e: 34 df rcall .-408 ; 0x1b8 wait_ms(1000); - 36c: 88 ee ldi r24, 0xE8 ; 232 - 36e: 93 e0 ldi r25, 0x03 ; 3 - 370: 90 df rcall .-224 ; 0x292 - 372: e9 cf rjmp .-46 ; 0x346 + 350: 88 ee ldi r24, 0xE8 ; 232 + 352: 93 e0 ldi r25, 0x03 ; 3 + 354: 96 df rcall .-212 ; 0x282 + 356: f5 cf rjmp .-22 ; 0x342 -00000374 : - 374: 0f 93 push r16 - 376: 1f 93 push r17 - 378: cf 93 push r28 - 37a: df 93 push r29 - 37c: cd b7 in r28, 0x3d ; 61 - 37e: de b7 in r29, 0x3e ; 62 - 380: 2e 97 sbiw r28, 0x0e ; 14 - 382: 0f b6 in r0, 0x3f ; 63 - 384: f8 94 cli - 386: de bf out 0x3e, r29 ; 62 - 388: 0f be out 0x3f, r0 ; 63 - 38a: cd bf out 0x3d, r28 ; 61 - 38c: 0d 89 ldd r16, Y+21 ; 0x15 - 38e: 1e 89 ldd r17, Y+22 ; 0x16 - 390: 8f 89 ldd r24, Y+23 ; 0x17 - 392: 98 8d ldd r25, Y+24 ; 0x18 - 394: 26 e0 ldi r18, 0x06 ; 6 - 396: 2c 83 std Y+4, r18 ; 0x04 - 398: 1a 83 std Y+2, r17 ; 0x02 - 39a: 09 83 std Y+1, r16 ; 0x01 - 39c: 97 ff sbrs r25, 7 - 39e: 02 c0 rjmp .+4 ; 0x3a4 - 3a0: 80 e0 ldi r24, 0x00 ; 0 - 3a2: 90 e8 ldi r25, 0x80 ; 128 - 3a4: 01 97 sbiw r24, 0x01 ; 1 - 3a6: 9e 83 std Y+6, r25 ; 0x06 - 3a8: 8d 83 std Y+5, r24 ; 0x05 - 3aa: ae 01 movw r20, r28 - 3ac: 45 5e subi r20, 0xE5 ; 229 - 3ae: 5f 4f sbci r21, 0xFF ; 255 - 3b0: 69 8d ldd r22, Y+25 ; 0x19 - 3b2: 7a 8d ldd r23, Y+26 ; 0x1a - 3b4: ce 01 movw r24, r28 - 3b6: 01 96 adiw r24, 0x01 ; 1 - 3b8: 19 d0 rcall .+50 ; 0x3ec - 3ba: 4d 81 ldd r20, Y+5 ; 0x05 - 3bc: 5e 81 ldd r21, Y+6 ; 0x06 - 3be: 57 fd sbrc r21, 7 - 3c0: 0a c0 rjmp .+20 ; 0x3d6 - 3c2: 2f 81 ldd r18, Y+7 ; 0x07 - 3c4: 38 85 ldd r19, Y+8 ; 0x08 - 3c6: 42 17 cp r20, r18 - 3c8: 53 07 cpc r21, r19 - 3ca: 0c f4 brge .+2 ; 0x3ce - 3cc: 9a 01 movw r18, r20 - 3ce: f8 01 movw r30, r16 - 3d0: e2 0f add r30, r18 - 3d2: f3 1f adc r31, r19 - 3d4: 10 82 st Z, r1 - 3d6: 2e 96 adiw r28, 0x0e ; 14 - 3d8: 0f b6 in r0, 0x3f ; 63 - 3da: f8 94 cli - 3dc: de bf out 0x3e, r29 ; 62 - 3de: 0f be out 0x3f, r0 ; 63 - 3e0: cd bf out 0x3d, r28 ; 61 - 3e2: df 91 pop r29 - 3e4: cf 91 pop r28 - 3e6: 1f 91 pop r17 - 3e8: 0f 91 pop r16 - 3ea: 08 95 ret +00000358 : + 358: 0f 93 push r16 + 35a: 1f 93 push r17 + 35c: cf 93 push r28 + 35e: df 93 push r29 + 360: cd b7 in r28, 0x3d ; 61 + 362: de b7 in r29, 0x3e ; 62 + 364: 2e 97 sbiw r28, 0x0e ; 14 + 366: 0f b6 in r0, 0x3f ; 63 + 368: f8 94 cli + 36a: de bf out 0x3e, r29 ; 62 + 36c: 0f be out 0x3f, r0 ; 63 + 36e: cd bf out 0x3d, r28 ; 61 + 370: 0d 89 ldd r16, Y+21 ; 0x15 + 372: 1e 89 ldd r17, Y+22 ; 0x16 + 374: 8f 89 ldd r24, Y+23 ; 0x17 + 376: 98 8d ldd r25, Y+24 ; 0x18 + 378: 26 e0 ldi r18, 0x06 ; 6 + 37a: 2c 83 std Y+4, r18 ; 0x04 + 37c: 1a 83 std Y+2, r17 ; 0x02 + 37e: 09 83 std Y+1, r16 ; 0x01 + 380: 97 ff sbrs r25, 7 + 382: 02 c0 rjmp .+4 ; 0x388 + 384: 80 e0 ldi r24, 0x00 ; 0 + 386: 90 e8 ldi r25, 0x80 ; 128 + 388: 01 97 sbiw r24, 0x01 ; 1 + 38a: 9e 83 std Y+6, r25 ; 0x06 + 38c: 8d 83 std Y+5, r24 ; 0x05 + 38e: ae 01 movw r20, r28 + 390: 45 5e subi r20, 0xE5 ; 229 + 392: 5f 4f sbci r21, 0xFF ; 255 + 394: 69 8d ldd r22, Y+25 ; 0x19 + 396: 7a 8d ldd r23, Y+26 ; 0x1a + 398: ce 01 movw r24, r28 + 39a: 01 96 adiw r24, 0x01 ; 1 + 39c: 19 d0 rcall .+50 ; 0x3d0 + 39e: 4d 81 ldd r20, Y+5 ; 0x05 + 3a0: 5e 81 ldd r21, Y+6 ; 0x06 + 3a2: 57 fd sbrc r21, 7 + 3a4: 0a c0 rjmp .+20 ; 0x3ba + 3a6: 2f 81 ldd r18, Y+7 ; 0x07 + 3a8: 38 85 ldd r19, Y+8 ; 0x08 + 3aa: 42 17 cp r20, r18 + 3ac: 53 07 cpc r21, r19 + 3ae: 0c f4 brge .+2 ; 0x3b2 + 3b0: 9a 01 movw r18, r20 + 3b2: f8 01 movw r30, r16 + 3b4: e2 0f add r30, r18 + 3b6: f3 1f adc r31, r19 + 3b8: 10 82 st Z, r1 + 3ba: 2e 96 adiw r28, 0x0e ; 14 + 3bc: 0f b6 in r0, 0x3f ; 63 + 3be: f8 94 cli + 3c0: de bf out 0x3e, r29 ; 62 + 3c2: 0f be out 0x3f, r0 ; 63 + 3c4: cd bf out 0x3d, r28 ; 61 + 3c6: df 91 pop r29 + 3c8: cf 91 pop r28 + 3ca: 1f 91 pop r17 + 3cc: 0f 91 pop r16 + 3ce: 08 95 ret -000003ec : - 3ec: 2f 92 push r2 - 3ee: 3f 92 push r3 - 3f0: 4f 92 push r4 - 3f2: 5f 92 push r5 - 3f4: 6f 92 push r6 - 3f6: 7f 92 push r7 - 3f8: 8f 92 push r8 - 3fa: 9f 92 push r9 - 3fc: af 92 push r10 - 3fe: bf 92 push r11 - 400: cf 92 push r12 - 402: df 92 push r13 - 404: ef 92 push r14 - 406: ff 92 push r15 - 408: 0f 93 push r16 - 40a: 1f 93 push r17 - 40c: cf 93 push r28 - 40e: df 93 push r29 - 410: cd b7 in r28, 0x3d ; 61 - 412: de b7 in r29, 0x3e ; 62 - 414: 2b 97 sbiw r28, 0x0b ; 11 - 416: 0f b6 in r0, 0x3f ; 63 - 418: f8 94 cli - 41a: de bf out 0x3e, r29 ; 62 - 41c: 0f be out 0x3f, r0 ; 63 - 41e: cd bf out 0x3d, r28 ; 61 - 420: 6c 01 movw r12, r24 - 422: 7b 01 movw r14, r22 - 424: 8a 01 movw r16, r20 - 426: fc 01 movw r30, r24 - 428: 17 82 std Z+7, r1 ; 0x07 - 42a: 16 82 std Z+6, r1 ; 0x06 - 42c: 83 81 ldd r24, Z+3 ; 0x03 - 42e: 81 ff sbrs r24, 1 - 430: bf c1 rjmp .+894 ; 0x7b0 <__LOCK_REGION_LENGTH__+0x3b0> - 432: ce 01 movw r24, r28 - 434: 01 96 adiw r24, 0x01 ; 1 - 436: 3c 01 movw r6, r24 - 438: f6 01 movw r30, r12 - 43a: 93 81 ldd r25, Z+3 ; 0x03 - 43c: f7 01 movw r30, r14 - 43e: 93 fd sbrc r25, 3 - 440: 85 91 lpm r24, Z+ - 442: 93 ff sbrs r25, 3 - 444: 81 91 ld r24, Z+ - 446: 7f 01 movw r14, r30 - 448: 88 23 and r24, r24 - 44a: 09 f4 brne .+2 ; 0x44e <__LOCK_REGION_LENGTH__+0x4e> - 44c: ad c1 rjmp .+858 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> - 44e: 85 32 cpi r24, 0x25 ; 37 - 450: 39 f4 brne .+14 ; 0x460 <__LOCK_REGION_LENGTH__+0x60> - 452: 93 fd sbrc r25, 3 - 454: 85 91 lpm r24, Z+ - 456: 93 ff sbrs r25, 3 - 458: 81 91 ld r24, Z+ - 45a: 7f 01 movw r14, r30 - 45c: 85 32 cpi r24, 0x25 ; 37 - 45e: 21 f4 brne .+8 ; 0x468 <__LOCK_REGION_LENGTH__+0x68> - 460: b6 01 movw r22, r12 - 462: 90 e0 ldi r25, 0x00 ; 0 - 464: d6 d1 rcall .+940 ; 0x812 - 466: e8 cf rjmp .-48 ; 0x438 <__LOCK_REGION_LENGTH__+0x38> - 468: 91 2c mov r9, r1 - 46a: 21 2c mov r2, r1 - 46c: 31 2c mov r3, r1 - 46e: ff e1 ldi r31, 0x1F ; 31 - 470: f3 15 cp r31, r3 - 472: d8 f0 brcs .+54 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> - 474: 8b 32 cpi r24, 0x2B ; 43 - 476: 79 f0 breq .+30 ; 0x496 <__LOCK_REGION_LENGTH__+0x96> - 478: 38 f4 brcc .+14 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> - 47a: 80 32 cpi r24, 0x20 ; 32 - 47c: 79 f0 breq .+30 ; 0x49c <__LOCK_REGION_LENGTH__+0x9c> - 47e: 83 32 cpi r24, 0x23 ; 35 - 480: a1 f4 brne .+40 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> - 482: 23 2d mov r18, r3 - 484: 20 61 ori r18, 0x10 ; 16 - 486: 1d c0 rjmp .+58 ; 0x4c2 <__LOCK_REGION_LENGTH__+0xc2> - 488: 8d 32 cpi r24, 0x2D ; 45 - 48a: 61 f0 breq .+24 ; 0x4a4 <__LOCK_REGION_LENGTH__+0xa4> - 48c: 80 33 cpi r24, 0x30 ; 48 - 48e: 69 f4 brne .+26 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> - 490: 23 2d mov r18, r3 - 492: 21 60 ori r18, 0x01 ; 1 - 494: 16 c0 rjmp .+44 ; 0x4c2 <__LOCK_REGION_LENGTH__+0xc2> - 496: 83 2d mov r24, r3 - 498: 82 60 ori r24, 0x02 ; 2 - 49a: 38 2e mov r3, r24 - 49c: e3 2d mov r30, r3 - 49e: e4 60 ori r30, 0x04 ; 4 - 4a0: 3e 2e mov r3, r30 - 4a2: 2a c0 rjmp .+84 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> - 4a4: f3 2d mov r31, r3 - 4a6: f8 60 ori r31, 0x08 ; 8 - 4a8: 1d c0 rjmp .+58 ; 0x4e4 <__LOCK_REGION_LENGTH__+0xe4> - 4aa: 37 fc sbrc r3, 7 - 4ac: 2d c0 rjmp .+90 ; 0x508 <__LOCK_REGION_LENGTH__+0x108> - 4ae: 20 ed ldi r18, 0xD0 ; 208 - 4b0: 28 0f add r18, r24 - 4b2: 2a 30 cpi r18, 0x0A ; 10 - 4b4: 40 f0 brcs .+16 ; 0x4c6 <__LOCK_REGION_LENGTH__+0xc6> - 4b6: 8e 32 cpi r24, 0x2E ; 46 - 4b8: b9 f4 brne .+46 ; 0x4e8 <__LOCK_REGION_LENGTH__+0xe8> - 4ba: 36 fc sbrc r3, 6 - 4bc: 75 c1 rjmp .+746 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> - 4be: 23 2d mov r18, r3 - 4c0: 20 64 ori r18, 0x40 ; 64 - 4c2: 32 2e mov r3, r18 - 4c4: 19 c0 rjmp .+50 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> - 4c6: 36 fe sbrs r3, 6 - 4c8: 06 c0 rjmp .+12 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> - 4ca: 8a e0 ldi r24, 0x0A ; 10 - 4cc: 98 9e mul r9, r24 - 4ce: 20 0d add r18, r0 - 4d0: 11 24 eor r1, r1 - 4d2: 92 2e mov r9, r18 - 4d4: 11 c0 rjmp .+34 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> - 4d6: ea e0 ldi r30, 0x0A ; 10 - 4d8: 2e 9e mul r2, r30 - 4da: 20 0d add r18, r0 - 4dc: 11 24 eor r1, r1 - 4de: 22 2e mov r2, r18 - 4e0: f3 2d mov r31, r3 - 4e2: f0 62 ori r31, 0x20 ; 32 - 4e4: 3f 2e mov r3, r31 - 4e6: 08 c0 rjmp .+16 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> - 4e8: 8c 36 cpi r24, 0x6C ; 108 - 4ea: 21 f4 brne .+8 ; 0x4f4 <__LOCK_REGION_LENGTH__+0xf4> - 4ec: 83 2d mov r24, r3 - 4ee: 80 68 ori r24, 0x80 ; 128 - 4f0: 38 2e mov r3, r24 - 4f2: 02 c0 rjmp .+4 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> - 4f4: 88 36 cpi r24, 0x68 ; 104 - 4f6: 41 f4 brne .+16 ; 0x508 <__LOCK_REGION_LENGTH__+0x108> - 4f8: f7 01 movw r30, r14 - 4fa: 93 fd sbrc r25, 3 - 4fc: 85 91 lpm r24, Z+ - 4fe: 93 ff sbrs r25, 3 - 500: 81 91 ld r24, Z+ - 502: 7f 01 movw r14, r30 - 504: 81 11 cpse r24, r1 - 506: b3 cf rjmp .-154 ; 0x46e <__LOCK_REGION_LENGTH__+0x6e> - 508: 98 2f mov r25, r24 - 50a: 9f 7d andi r25, 0xDF ; 223 - 50c: 95 54 subi r25, 0x45 ; 69 - 50e: 93 30 cpi r25, 0x03 ; 3 - 510: 28 f4 brcc .+10 ; 0x51c <__LOCK_REGION_LENGTH__+0x11c> - 512: 0c 5f subi r16, 0xFC ; 252 - 514: 1f 4f sbci r17, 0xFF ; 255 - 516: 9f e3 ldi r25, 0x3F ; 63 - 518: 99 83 std Y+1, r25 ; 0x01 - 51a: 0d c0 rjmp .+26 ; 0x536 <__LOCK_REGION_LENGTH__+0x136> - 51c: 83 36 cpi r24, 0x63 ; 99 - 51e: 31 f0 breq .+12 ; 0x52c <__LOCK_REGION_LENGTH__+0x12c> - 520: 83 37 cpi r24, 0x73 ; 115 - 522: 71 f0 breq .+28 ; 0x540 <__LOCK_REGION_LENGTH__+0x140> - 524: 83 35 cpi r24, 0x53 ; 83 - 526: 09 f0 breq .+2 ; 0x52a <__LOCK_REGION_LENGTH__+0x12a> - 528: 55 c0 rjmp .+170 ; 0x5d4 <__LOCK_REGION_LENGTH__+0x1d4> - 52a: 20 c0 rjmp .+64 ; 0x56c <__LOCK_REGION_LENGTH__+0x16c> +000003d0 : + 3d0: 2f 92 push r2 + 3d2: 3f 92 push r3 + 3d4: 4f 92 push r4 + 3d6: 5f 92 push r5 + 3d8: 6f 92 push r6 + 3da: 7f 92 push r7 + 3dc: 8f 92 push r8 + 3de: 9f 92 push r9 + 3e0: af 92 push r10 + 3e2: bf 92 push r11 + 3e4: cf 92 push r12 + 3e6: df 92 push r13 + 3e8: ef 92 push r14 + 3ea: ff 92 push r15 + 3ec: 0f 93 push r16 + 3ee: 1f 93 push r17 + 3f0: cf 93 push r28 + 3f2: df 93 push r29 + 3f4: cd b7 in r28, 0x3d ; 61 + 3f6: de b7 in r29, 0x3e ; 62 + 3f8: 2b 97 sbiw r28, 0x0b ; 11 + 3fa: 0f b6 in r0, 0x3f ; 63 + 3fc: f8 94 cli + 3fe: de bf out 0x3e, r29 ; 62 + 400: 0f be out 0x3f, r0 ; 63 + 402: cd bf out 0x3d, r28 ; 61 + 404: 6c 01 movw r12, r24 + 406: 7b 01 movw r14, r22 + 408: 8a 01 movw r16, r20 + 40a: fc 01 movw r30, r24 + 40c: 17 82 std Z+7, r1 ; 0x07 + 40e: 16 82 std Z+6, r1 ; 0x06 + 410: 83 81 ldd r24, Z+3 ; 0x03 + 412: 81 ff sbrs r24, 1 + 414: bf c1 rjmp .+894 ; 0x794 <__LOCK_REGION_LENGTH__+0x394> + 416: ce 01 movw r24, r28 + 418: 01 96 adiw r24, 0x01 ; 1 + 41a: 3c 01 movw r6, r24 + 41c: f6 01 movw r30, r12 + 41e: 93 81 ldd r25, Z+3 ; 0x03 + 420: f7 01 movw r30, r14 + 422: 93 fd sbrc r25, 3 + 424: 85 91 lpm r24, Z+ + 426: 93 ff sbrs r25, 3 + 428: 81 91 ld r24, Z+ + 42a: 7f 01 movw r14, r30 + 42c: 88 23 and r24, r24 + 42e: 09 f4 brne .+2 ; 0x432 <__LOCK_REGION_LENGTH__+0x32> + 430: ad c1 rjmp .+858 ; 0x78c <__LOCK_REGION_LENGTH__+0x38c> + 432: 85 32 cpi r24, 0x25 ; 37 + 434: 39 f4 brne .+14 ; 0x444 <__LOCK_REGION_LENGTH__+0x44> + 436: 93 fd sbrc r25, 3 + 438: 85 91 lpm r24, Z+ + 43a: 93 ff sbrs r25, 3 + 43c: 81 91 ld r24, Z+ + 43e: 7f 01 movw r14, r30 + 440: 85 32 cpi r24, 0x25 ; 37 + 442: 21 f4 brne .+8 ; 0x44c <__LOCK_REGION_LENGTH__+0x4c> + 444: b6 01 movw r22, r12 + 446: 90 e0 ldi r25, 0x00 ; 0 + 448: d6 d1 rcall .+940 ; 0x7f6 + 44a: e8 cf rjmp .-48 ; 0x41c <__LOCK_REGION_LENGTH__+0x1c> + 44c: 91 2c mov r9, r1 + 44e: 21 2c mov r2, r1 + 450: 31 2c mov r3, r1 + 452: ff e1 ldi r31, 0x1F ; 31 + 454: f3 15 cp r31, r3 + 456: d8 f0 brcs .+54 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e> + 458: 8b 32 cpi r24, 0x2B ; 43 + 45a: 79 f0 breq .+30 ; 0x47a <__LOCK_REGION_LENGTH__+0x7a> + 45c: 38 f4 brcc .+14 ; 0x46c <__LOCK_REGION_LENGTH__+0x6c> + 45e: 80 32 cpi r24, 0x20 ; 32 + 460: 79 f0 breq .+30 ; 0x480 <__LOCK_REGION_LENGTH__+0x80> + 462: 83 32 cpi r24, 0x23 ; 35 + 464: a1 f4 brne .+40 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e> + 466: 23 2d mov r18, r3 + 468: 20 61 ori r18, 0x10 ; 16 + 46a: 1d c0 rjmp .+58 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> + 46c: 8d 32 cpi r24, 0x2D ; 45 + 46e: 61 f0 breq .+24 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> + 470: 80 33 cpi r24, 0x30 ; 48 + 472: 69 f4 brne .+26 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e> + 474: 23 2d mov r18, r3 + 476: 21 60 ori r18, 0x01 ; 1 + 478: 16 c0 rjmp .+44 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> + 47a: 83 2d mov r24, r3 + 47c: 82 60 ori r24, 0x02 ; 2 + 47e: 38 2e mov r3, r24 + 480: e3 2d mov r30, r3 + 482: e4 60 ori r30, 0x04 ; 4 + 484: 3e 2e mov r3, r30 + 486: 2a c0 rjmp .+84 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> + 488: f3 2d mov r31, r3 + 48a: f8 60 ori r31, 0x08 ; 8 + 48c: 1d c0 rjmp .+58 ; 0x4c8 <__LOCK_REGION_LENGTH__+0xc8> + 48e: 37 fc sbrc r3, 7 + 490: 2d c0 rjmp .+90 ; 0x4ec <__LOCK_REGION_LENGTH__+0xec> + 492: 20 ed ldi r18, 0xD0 ; 208 + 494: 28 0f add r18, r24 + 496: 2a 30 cpi r18, 0x0A ; 10 + 498: 40 f0 brcs .+16 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> + 49a: 8e 32 cpi r24, 0x2E ; 46 + 49c: b9 f4 brne .+46 ; 0x4cc <__LOCK_REGION_LENGTH__+0xcc> + 49e: 36 fc sbrc r3, 6 + 4a0: 75 c1 rjmp .+746 ; 0x78c <__LOCK_REGION_LENGTH__+0x38c> + 4a2: 23 2d mov r18, r3 + 4a4: 20 64 ori r18, 0x40 ; 64 + 4a6: 32 2e mov r3, r18 + 4a8: 19 c0 rjmp .+50 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> + 4aa: 36 fe sbrs r3, 6 + 4ac: 06 c0 rjmp .+12 ; 0x4ba <__LOCK_REGION_LENGTH__+0xba> + 4ae: 8a e0 ldi r24, 0x0A ; 10 + 4b0: 98 9e mul r9, r24 + 4b2: 20 0d add r18, r0 + 4b4: 11 24 eor r1, r1 + 4b6: 92 2e mov r9, r18 + 4b8: 11 c0 rjmp .+34 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> + 4ba: ea e0 ldi r30, 0x0A ; 10 + 4bc: 2e 9e mul r2, r30 + 4be: 20 0d add r18, r0 + 4c0: 11 24 eor r1, r1 + 4c2: 22 2e mov r2, r18 + 4c4: f3 2d mov r31, r3 + 4c6: f0 62 ori r31, 0x20 ; 32 + 4c8: 3f 2e mov r3, r31 + 4ca: 08 c0 rjmp .+16 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> + 4cc: 8c 36 cpi r24, 0x6C ; 108 + 4ce: 21 f4 brne .+8 ; 0x4d8 <__LOCK_REGION_LENGTH__+0xd8> + 4d0: 83 2d mov r24, r3 + 4d2: 80 68 ori r24, 0x80 ; 128 + 4d4: 38 2e mov r3, r24 + 4d6: 02 c0 rjmp .+4 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> + 4d8: 88 36 cpi r24, 0x68 ; 104 + 4da: 41 f4 brne .+16 ; 0x4ec <__LOCK_REGION_LENGTH__+0xec> + 4dc: f7 01 movw r30, r14 + 4de: 93 fd sbrc r25, 3 + 4e0: 85 91 lpm r24, Z+ + 4e2: 93 ff sbrs r25, 3 + 4e4: 81 91 ld r24, Z+ + 4e6: 7f 01 movw r14, r30 + 4e8: 81 11 cpse r24, r1 + 4ea: b3 cf rjmp .-154 ; 0x452 <__LOCK_REGION_LENGTH__+0x52> + 4ec: 98 2f mov r25, r24 + 4ee: 9f 7d andi r25, 0xDF ; 223 + 4f0: 95 54 subi r25, 0x45 ; 69 + 4f2: 93 30 cpi r25, 0x03 ; 3 + 4f4: 28 f4 brcc .+10 ; 0x500 <__LOCK_REGION_LENGTH__+0x100> + 4f6: 0c 5f subi r16, 0xFC ; 252 + 4f8: 1f 4f sbci r17, 0xFF ; 255 + 4fa: 9f e3 ldi r25, 0x3F ; 63 + 4fc: 99 83 std Y+1, r25 ; 0x01 + 4fe: 0d c0 rjmp .+26 ; 0x51a <__LOCK_REGION_LENGTH__+0x11a> + 500: 83 36 cpi r24, 0x63 ; 99 + 502: 31 f0 breq .+12 ; 0x510 <__LOCK_REGION_LENGTH__+0x110> + 504: 83 37 cpi r24, 0x73 ; 115 + 506: 71 f0 breq .+28 ; 0x524 <__LOCK_REGION_LENGTH__+0x124> + 508: 83 35 cpi r24, 0x53 ; 83 + 50a: 09 f0 breq .+2 ; 0x50e <__LOCK_REGION_LENGTH__+0x10e> + 50c: 55 c0 rjmp .+170 ; 0x5b8 <__LOCK_REGION_LENGTH__+0x1b8> + 50e: 20 c0 rjmp .+64 ; 0x550 <__LOCK_REGION_LENGTH__+0x150> + 510: f8 01 movw r30, r16 + 512: 80 81 ld r24, Z + 514: 89 83 std Y+1, r24 ; 0x01 + 516: 0e 5f subi r16, 0xFE ; 254 + 518: 1f 4f sbci r17, 0xFF ; 255 + 51a: 88 24 eor r8, r8 + 51c: 83 94 inc r8 + 51e: 91 2c mov r9, r1 + 520: 53 01 movw r10, r6 + 522: 12 c0 rjmp .+36 ; 0x548 <__LOCK_REGION_LENGTH__+0x148> + 524: 28 01 movw r4, r16 + 526: f2 e0 ldi r31, 0x02 ; 2 + 528: 4f 0e add r4, r31 + 52a: 51 1c adc r5, r1 52c: f8 01 movw r30, r16 - 52e: 80 81 ld r24, Z - 530: 89 83 std Y+1, r24 ; 0x01 - 532: 0e 5f subi r16, 0xFE ; 254 - 534: 1f 4f sbci r17, 0xFF ; 255 - 536: 88 24 eor r8, r8 - 538: 83 94 inc r8 - 53a: 91 2c mov r9, r1 - 53c: 53 01 movw r10, r6 - 53e: 12 c0 rjmp .+36 ; 0x564 <__LOCK_REGION_LENGTH__+0x164> - 540: 28 01 movw r4, r16 - 542: f2 e0 ldi r31, 0x02 ; 2 - 544: 4f 0e add r4, r31 - 546: 51 1c adc r5, r1 - 548: f8 01 movw r30, r16 - 54a: a0 80 ld r10, Z - 54c: b1 80 ldd r11, Z+1 ; 0x01 - 54e: 36 fe sbrs r3, 6 - 550: 03 c0 rjmp .+6 ; 0x558 <__LOCK_REGION_LENGTH__+0x158> - 552: 69 2d mov r22, r9 - 554: 70 e0 ldi r23, 0x00 ; 0 - 556: 02 c0 rjmp .+4 ; 0x55c <__LOCK_REGION_LENGTH__+0x15c> - 558: 6f ef ldi r22, 0xFF ; 255 - 55a: 7f ef ldi r23, 0xFF ; 255 - 55c: c5 01 movw r24, r10 - 55e: 4e d1 rcall .+668 ; 0x7fc - 560: 4c 01 movw r8, r24 - 562: 82 01 movw r16, r4 - 564: f3 2d mov r31, r3 - 566: ff 77 andi r31, 0x7F ; 127 - 568: 3f 2e mov r3, r31 - 56a: 15 c0 rjmp .+42 ; 0x596 <__LOCK_REGION_LENGTH__+0x196> - 56c: 28 01 movw r4, r16 - 56e: 22 e0 ldi r18, 0x02 ; 2 - 570: 42 0e add r4, r18 - 572: 51 1c adc r5, r1 - 574: f8 01 movw r30, r16 - 576: a0 80 ld r10, Z - 578: b1 80 ldd r11, Z+1 ; 0x01 - 57a: 36 fe sbrs r3, 6 - 57c: 03 c0 rjmp .+6 ; 0x584 <__LOCK_REGION_LENGTH__+0x184> - 57e: 69 2d mov r22, r9 - 580: 70 e0 ldi r23, 0x00 ; 0 - 582: 02 c0 rjmp .+4 ; 0x588 <__LOCK_REGION_LENGTH__+0x188> - 584: 6f ef ldi r22, 0xFF ; 255 - 586: 7f ef ldi r23, 0xFF ; 255 - 588: c5 01 movw r24, r10 - 58a: 2d d1 rcall .+602 ; 0x7e6 - 58c: 4c 01 movw r8, r24 - 58e: f3 2d mov r31, r3 - 590: f0 68 ori r31, 0x80 ; 128 - 592: 3f 2e mov r3, r31 - 594: 82 01 movw r16, r4 - 596: 33 fc sbrc r3, 3 - 598: 19 c0 rjmp .+50 ; 0x5cc <__LOCK_REGION_LENGTH__+0x1cc> - 59a: 82 2d mov r24, r2 - 59c: 90 e0 ldi r25, 0x00 ; 0 - 59e: 88 16 cp r8, r24 - 5a0: 99 06 cpc r9, r25 - 5a2: a0 f4 brcc .+40 ; 0x5cc <__LOCK_REGION_LENGTH__+0x1cc> - 5a4: b6 01 movw r22, r12 - 5a6: 80 e2 ldi r24, 0x20 ; 32 - 5a8: 90 e0 ldi r25, 0x00 ; 0 - 5aa: 33 d1 rcall .+614 ; 0x812 - 5ac: 2a 94 dec r2 - 5ae: f5 cf rjmp .-22 ; 0x59a <__LOCK_REGION_LENGTH__+0x19a> - 5b0: f5 01 movw r30, r10 - 5b2: 37 fc sbrc r3, 7 - 5b4: 85 91 lpm r24, Z+ - 5b6: 37 fe sbrs r3, 7 - 5b8: 81 91 ld r24, Z+ - 5ba: 5f 01 movw r10, r30 - 5bc: b6 01 movw r22, r12 - 5be: 90 e0 ldi r25, 0x00 ; 0 - 5c0: 28 d1 rcall .+592 ; 0x812 - 5c2: 21 10 cpse r2, r1 - 5c4: 2a 94 dec r2 - 5c6: 21 e0 ldi r18, 0x01 ; 1 - 5c8: 82 1a sub r8, r18 - 5ca: 91 08 sbc r9, r1 - 5cc: 81 14 cp r8, r1 - 5ce: 91 04 cpc r9, r1 - 5d0: 79 f7 brne .-34 ; 0x5b0 <__LOCK_REGION_LENGTH__+0x1b0> - 5d2: e1 c0 rjmp .+450 ; 0x796 <__LOCK_REGION_LENGTH__+0x396> - 5d4: 84 36 cpi r24, 0x64 ; 100 - 5d6: 11 f0 breq .+4 ; 0x5dc <__LOCK_REGION_LENGTH__+0x1dc> - 5d8: 89 36 cpi r24, 0x69 ; 105 - 5da: 39 f5 brne .+78 ; 0x62a <__LOCK_REGION_LENGTH__+0x22a> - 5dc: f8 01 movw r30, r16 - 5de: 37 fe sbrs r3, 7 - 5e0: 07 c0 rjmp .+14 ; 0x5f0 <__LOCK_REGION_LENGTH__+0x1f0> - 5e2: 60 81 ld r22, Z - 5e4: 71 81 ldd r23, Z+1 ; 0x01 - 5e6: 82 81 ldd r24, Z+2 ; 0x02 - 5e8: 93 81 ldd r25, Z+3 ; 0x03 - 5ea: 0c 5f subi r16, 0xFC ; 252 - 5ec: 1f 4f sbci r17, 0xFF ; 255 - 5ee: 08 c0 rjmp .+16 ; 0x600 <__LOCK_REGION_LENGTH__+0x200> - 5f0: 60 81 ld r22, Z - 5f2: 71 81 ldd r23, Z+1 ; 0x01 - 5f4: 07 2e mov r0, r23 - 5f6: 00 0c add r0, r0 - 5f8: 88 0b sbc r24, r24 - 5fa: 99 0b sbc r25, r25 - 5fc: 0e 5f subi r16, 0xFE ; 254 - 5fe: 1f 4f sbci r17, 0xFF ; 255 - 600: f3 2d mov r31, r3 - 602: ff 76 andi r31, 0x6F ; 111 - 604: 3f 2e mov r3, r31 - 606: 97 ff sbrs r25, 7 - 608: 09 c0 rjmp .+18 ; 0x61c <__LOCK_REGION_LENGTH__+0x21c> - 60a: 90 95 com r25 - 60c: 80 95 com r24 - 60e: 70 95 com r23 - 610: 61 95 neg r22 - 612: 7f 4f sbci r23, 0xFF ; 255 - 614: 8f 4f sbci r24, 0xFF ; 255 - 616: 9f 4f sbci r25, 0xFF ; 255 - 618: f0 68 ori r31, 0x80 ; 128 - 61a: 3f 2e mov r3, r31 - 61c: 2a e0 ldi r18, 0x0A ; 10 - 61e: 30 e0 ldi r19, 0x00 ; 0 - 620: a3 01 movw r20, r6 - 622: 33 d1 rcall .+614 ; 0x88a <__ultoa_invert> - 624: 88 2e mov r8, r24 - 626: 86 18 sub r8, r6 - 628: 44 c0 rjmp .+136 ; 0x6b2 <__LOCK_REGION_LENGTH__+0x2b2> - 62a: 85 37 cpi r24, 0x75 ; 117 - 62c: 31 f4 brne .+12 ; 0x63a <__LOCK_REGION_LENGTH__+0x23a> - 62e: 23 2d mov r18, r3 - 630: 2f 7e andi r18, 0xEF ; 239 - 632: b2 2e mov r11, r18 - 634: 2a e0 ldi r18, 0x0A ; 10 - 636: 30 e0 ldi r19, 0x00 ; 0 - 638: 25 c0 rjmp .+74 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> - 63a: 93 2d mov r25, r3 - 63c: 99 7f andi r25, 0xF9 ; 249 - 63e: b9 2e mov r11, r25 - 640: 8f 36 cpi r24, 0x6F ; 111 - 642: c1 f0 breq .+48 ; 0x674 <__LOCK_REGION_LENGTH__+0x274> - 644: 18 f4 brcc .+6 ; 0x64c <__LOCK_REGION_LENGTH__+0x24c> - 646: 88 35 cpi r24, 0x58 ; 88 - 648: 79 f0 breq .+30 ; 0x668 <__LOCK_REGION_LENGTH__+0x268> - 64a: ae c0 rjmp .+348 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> - 64c: 80 37 cpi r24, 0x70 ; 112 - 64e: 19 f0 breq .+6 ; 0x656 <__LOCK_REGION_LENGTH__+0x256> - 650: 88 37 cpi r24, 0x78 ; 120 - 652: 21 f0 breq .+8 ; 0x65c <__LOCK_REGION_LENGTH__+0x25c> - 654: a9 c0 rjmp .+338 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> - 656: e9 2f mov r30, r25 - 658: e0 61 ori r30, 0x10 ; 16 - 65a: be 2e mov r11, r30 - 65c: b4 fe sbrs r11, 4 - 65e: 0d c0 rjmp .+26 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> - 660: fb 2d mov r31, r11 - 662: f4 60 ori r31, 0x04 ; 4 - 664: bf 2e mov r11, r31 - 666: 09 c0 rjmp .+18 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> - 668: 34 fe sbrs r3, 4 - 66a: 0a c0 rjmp .+20 ; 0x680 <__LOCK_REGION_LENGTH__+0x280> - 66c: 29 2f mov r18, r25 - 66e: 26 60 ori r18, 0x06 ; 6 - 670: b2 2e mov r11, r18 - 672: 06 c0 rjmp .+12 ; 0x680 <__LOCK_REGION_LENGTH__+0x280> - 674: 28 e0 ldi r18, 0x08 ; 8 - 676: 30 e0 ldi r19, 0x00 ; 0 - 678: 05 c0 rjmp .+10 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> - 67a: 20 e1 ldi r18, 0x10 ; 16 - 67c: 30 e0 ldi r19, 0x00 ; 0 - 67e: 02 c0 rjmp .+4 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> - 680: 20 e1 ldi r18, 0x10 ; 16 - 682: 32 e0 ldi r19, 0x02 ; 2 - 684: f8 01 movw r30, r16 - 686: b7 fe sbrs r11, 7 - 688: 07 c0 rjmp .+14 ; 0x698 <__LOCK_REGION_LENGTH__+0x298> - 68a: 60 81 ld r22, Z - 68c: 71 81 ldd r23, Z+1 ; 0x01 - 68e: 82 81 ldd r24, Z+2 ; 0x02 - 690: 93 81 ldd r25, Z+3 ; 0x03 - 692: 0c 5f subi r16, 0xFC ; 252 - 694: 1f 4f sbci r17, 0xFF ; 255 - 696: 06 c0 rjmp .+12 ; 0x6a4 <__LOCK_REGION_LENGTH__+0x2a4> - 698: 60 81 ld r22, Z - 69a: 71 81 ldd r23, Z+1 ; 0x01 - 69c: 80 e0 ldi r24, 0x00 ; 0 - 69e: 90 e0 ldi r25, 0x00 ; 0 - 6a0: 0e 5f subi r16, 0xFE ; 254 - 6a2: 1f 4f sbci r17, 0xFF ; 255 - 6a4: a3 01 movw r20, r6 - 6a6: f1 d0 rcall .+482 ; 0x88a <__ultoa_invert> - 6a8: 88 2e mov r8, r24 - 6aa: 86 18 sub r8, r6 - 6ac: fb 2d mov r31, r11 - 6ae: ff 77 andi r31, 0x7F ; 127 - 6b0: 3f 2e mov r3, r31 - 6b2: 36 fe sbrs r3, 6 - 6b4: 0d c0 rjmp .+26 ; 0x6d0 <__LOCK_REGION_LENGTH__+0x2d0> - 6b6: 23 2d mov r18, r3 - 6b8: 2e 7f andi r18, 0xFE ; 254 - 6ba: a2 2e mov r10, r18 - 6bc: 89 14 cp r8, r9 - 6be: 58 f4 brcc .+22 ; 0x6d6 <__LOCK_REGION_LENGTH__+0x2d6> - 6c0: 34 fe sbrs r3, 4 - 6c2: 0b c0 rjmp .+22 ; 0x6da <__LOCK_REGION_LENGTH__+0x2da> - 6c4: 32 fc sbrc r3, 2 - 6c6: 09 c0 rjmp .+18 ; 0x6da <__LOCK_REGION_LENGTH__+0x2da> - 6c8: 83 2d mov r24, r3 - 6ca: 8e 7e andi r24, 0xEE ; 238 - 6cc: a8 2e mov r10, r24 - 6ce: 05 c0 rjmp .+10 ; 0x6da <__LOCK_REGION_LENGTH__+0x2da> - 6d0: b8 2c mov r11, r8 - 6d2: a3 2c mov r10, r3 - 6d4: 03 c0 rjmp .+6 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> - 6d6: b8 2c mov r11, r8 - 6d8: 01 c0 rjmp .+2 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> - 6da: b9 2c mov r11, r9 - 6dc: a4 fe sbrs r10, 4 - 6de: 0f c0 rjmp .+30 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> - 6e0: fe 01 movw r30, r28 - 6e2: e8 0d add r30, r8 - 6e4: f1 1d adc r31, r1 - 6e6: 80 81 ld r24, Z - 6e8: 80 33 cpi r24, 0x30 ; 48 - 6ea: 21 f4 brne .+8 ; 0x6f4 <__LOCK_REGION_LENGTH__+0x2f4> - 6ec: 9a 2d mov r25, r10 - 6ee: 99 7e andi r25, 0xE9 ; 233 - 6f0: a9 2e mov r10, r25 - 6f2: 09 c0 rjmp .+18 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> - 6f4: a2 fe sbrs r10, 2 - 6f6: 06 c0 rjmp .+12 ; 0x704 <__LOCK_REGION_LENGTH__+0x304> - 6f8: b3 94 inc r11 - 6fa: b3 94 inc r11 - 6fc: 04 c0 rjmp .+8 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> - 6fe: 8a 2d mov r24, r10 - 700: 86 78 andi r24, 0x86 ; 134 - 702: 09 f0 breq .+2 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> - 704: b3 94 inc r11 - 706: a3 fc sbrc r10, 3 - 708: 10 c0 rjmp .+32 ; 0x72a <__LOCK_REGION_LENGTH__+0x32a> - 70a: a0 fe sbrs r10, 0 - 70c: 06 c0 rjmp .+12 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> + 52e: a0 80 ld r10, Z + 530: b1 80 ldd r11, Z+1 ; 0x01 + 532: 36 fe sbrs r3, 6 + 534: 03 c0 rjmp .+6 ; 0x53c <__LOCK_REGION_LENGTH__+0x13c> + 536: 69 2d mov r22, r9 + 538: 70 e0 ldi r23, 0x00 ; 0 + 53a: 02 c0 rjmp .+4 ; 0x540 <__LOCK_REGION_LENGTH__+0x140> + 53c: 6f ef ldi r22, 0xFF ; 255 + 53e: 7f ef ldi r23, 0xFF ; 255 + 540: c5 01 movw r24, r10 + 542: 4e d1 rcall .+668 ; 0x7e0 + 544: 4c 01 movw r8, r24 + 546: 82 01 movw r16, r4 + 548: f3 2d mov r31, r3 + 54a: ff 77 andi r31, 0x7F ; 127 + 54c: 3f 2e mov r3, r31 + 54e: 15 c0 rjmp .+42 ; 0x57a <__LOCK_REGION_LENGTH__+0x17a> + 550: 28 01 movw r4, r16 + 552: 22 e0 ldi r18, 0x02 ; 2 + 554: 42 0e add r4, r18 + 556: 51 1c adc r5, r1 + 558: f8 01 movw r30, r16 + 55a: a0 80 ld r10, Z + 55c: b1 80 ldd r11, Z+1 ; 0x01 + 55e: 36 fe sbrs r3, 6 + 560: 03 c0 rjmp .+6 ; 0x568 <__LOCK_REGION_LENGTH__+0x168> + 562: 69 2d mov r22, r9 + 564: 70 e0 ldi r23, 0x00 ; 0 + 566: 02 c0 rjmp .+4 ; 0x56c <__LOCK_REGION_LENGTH__+0x16c> + 568: 6f ef ldi r22, 0xFF ; 255 + 56a: 7f ef ldi r23, 0xFF ; 255 + 56c: c5 01 movw r24, r10 + 56e: 2d d1 rcall .+602 ; 0x7ca + 570: 4c 01 movw r8, r24 + 572: f3 2d mov r31, r3 + 574: f0 68 ori r31, 0x80 ; 128 + 576: 3f 2e mov r3, r31 + 578: 82 01 movw r16, r4 + 57a: 33 fc sbrc r3, 3 + 57c: 19 c0 rjmp .+50 ; 0x5b0 <__LOCK_REGION_LENGTH__+0x1b0> + 57e: 82 2d mov r24, r2 + 580: 90 e0 ldi r25, 0x00 ; 0 + 582: 88 16 cp r8, r24 + 584: 99 06 cpc r9, r25 + 586: a0 f4 brcc .+40 ; 0x5b0 <__LOCK_REGION_LENGTH__+0x1b0> + 588: b6 01 movw r22, r12 + 58a: 80 e2 ldi r24, 0x20 ; 32 + 58c: 90 e0 ldi r25, 0x00 ; 0 + 58e: 33 d1 rcall .+614 ; 0x7f6 + 590: 2a 94 dec r2 + 592: f5 cf rjmp .-22 ; 0x57e <__LOCK_REGION_LENGTH__+0x17e> + 594: f5 01 movw r30, r10 + 596: 37 fc sbrc r3, 7 + 598: 85 91 lpm r24, Z+ + 59a: 37 fe sbrs r3, 7 + 59c: 81 91 ld r24, Z+ + 59e: 5f 01 movw r10, r30 + 5a0: b6 01 movw r22, r12 + 5a2: 90 e0 ldi r25, 0x00 ; 0 + 5a4: 28 d1 rcall .+592 ; 0x7f6 + 5a6: 21 10 cpse r2, r1 + 5a8: 2a 94 dec r2 + 5aa: 21 e0 ldi r18, 0x01 ; 1 + 5ac: 82 1a sub r8, r18 + 5ae: 91 08 sbc r9, r1 + 5b0: 81 14 cp r8, r1 + 5b2: 91 04 cpc r9, r1 + 5b4: 79 f7 brne .-34 ; 0x594 <__LOCK_REGION_LENGTH__+0x194> + 5b6: e1 c0 rjmp .+450 ; 0x77a <__LOCK_REGION_LENGTH__+0x37a> + 5b8: 84 36 cpi r24, 0x64 ; 100 + 5ba: 11 f0 breq .+4 ; 0x5c0 <__LOCK_REGION_LENGTH__+0x1c0> + 5bc: 89 36 cpi r24, 0x69 ; 105 + 5be: 39 f5 brne .+78 ; 0x60e <__LOCK_REGION_LENGTH__+0x20e> + 5c0: f8 01 movw r30, r16 + 5c2: 37 fe sbrs r3, 7 + 5c4: 07 c0 rjmp .+14 ; 0x5d4 <__LOCK_REGION_LENGTH__+0x1d4> + 5c6: 60 81 ld r22, Z + 5c8: 71 81 ldd r23, Z+1 ; 0x01 + 5ca: 82 81 ldd r24, Z+2 ; 0x02 + 5cc: 93 81 ldd r25, Z+3 ; 0x03 + 5ce: 0c 5f subi r16, 0xFC ; 252 + 5d0: 1f 4f sbci r17, 0xFF ; 255 + 5d2: 08 c0 rjmp .+16 ; 0x5e4 <__LOCK_REGION_LENGTH__+0x1e4> + 5d4: 60 81 ld r22, Z + 5d6: 71 81 ldd r23, Z+1 ; 0x01 + 5d8: 07 2e mov r0, r23 + 5da: 00 0c add r0, r0 + 5dc: 88 0b sbc r24, r24 + 5de: 99 0b sbc r25, r25 + 5e0: 0e 5f subi r16, 0xFE ; 254 + 5e2: 1f 4f sbci r17, 0xFF ; 255 + 5e4: f3 2d mov r31, r3 + 5e6: ff 76 andi r31, 0x6F ; 111 + 5e8: 3f 2e mov r3, r31 + 5ea: 97 ff sbrs r25, 7 + 5ec: 09 c0 rjmp .+18 ; 0x600 <__LOCK_REGION_LENGTH__+0x200> + 5ee: 90 95 com r25 + 5f0: 80 95 com r24 + 5f2: 70 95 com r23 + 5f4: 61 95 neg r22 + 5f6: 7f 4f sbci r23, 0xFF ; 255 + 5f8: 8f 4f sbci r24, 0xFF ; 255 + 5fa: 9f 4f sbci r25, 0xFF ; 255 + 5fc: f0 68 ori r31, 0x80 ; 128 + 5fe: 3f 2e mov r3, r31 + 600: 2a e0 ldi r18, 0x0A ; 10 + 602: 30 e0 ldi r19, 0x00 ; 0 + 604: a3 01 movw r20, r6 + 606: 33 d1 rcall .+614 ; 0x86e <__ultoa_invert> + 608: 88 2e mov r8, r24 + 60a: 86 18 sub r8, r6 + 60c: 44 c0 rjmp .+136 ; 0x696 <__LOCK_REGION_LENGTH__+0x296> + 60e: 85 37 cpi r24, 0x75 ; 117 + 610: 31 f4 brne .+12 ; 0x61e <__LOCK_REGION_LENGTH__+0x21e> + 612: 23 2d mov r18, r3 + 614: 2f 7e andi r18, 0xEF ; 239 + 616: b2 2e mov r11, r18 + 618: 2a e0 ldi r18, 0x0A ; 10 + 61a: 30 e0 ldi r19, 0x00 ; 0 + 61c: 25 c0 rjmp .+74 ; 0x668 <__LOCK_REGION_LENGTH__+0x268> + 61e: 93 2d mov r25, r3 + 620: 99 7f andi r25, 0xF9 ; 249 + 622: b9 2e mov r11, r25 + 624: 8f 36 cpi r24, 0x6F ; 111 + 626: c1 f0 breq .+48 ; 0x658 <__LOCK_REGION_LENGTH__+0x258> + 628: 18 f4 brcc .+6 ; 0x630 <__LOCK_REGION_LENGTH__+0x230> + 62a: 88 35 cpi r24, 0x58 ; 88 + 62c: 79 f0 breq .+30 ; 0x64c <__LOCK_REGION_LENGTH__+0x24c> + 62e: ae c0 rjmp .+348 ; 0x78c <__LOCK_REGION_LENGTH__+0x38c> + 630: 80 37 cpi r24, 0x70 ; 112 + 632: 19 f0 breq .+6 ; 0x63a <__LOCK_REGION_LENGTH__+0x23a> + 634: 88 37 cpi r24, 0x78 ; 120 + 636: 21 f0 breq .+8 ; 0x640 <__LOCK_REGION_LENGTH__+0x240> + 638: a9 c0 rjmp .+338 ; 0x78c <__LOCK_REGION_LENGTH__+0x38c> + 63a: e9 2f mov r30, r25 + 63c: e0 61 ori r30, 0x10 ; 16 + 63e: be 2e mov r11, r30 + 640: b4 fe sbrs r11, 4 + 642: 0d c0 rjmp .+26 ; 0x65e <__LOCK_REGION_LENGTH__+0x25e> + 644: fb 2d mov r31, r11 + 646: f4 60 ori r31, 0x04 ; 4 + 648: bf 2e mov r11, r31 + 64a: 09 c0 rjmp .+18 ; 0x65e <__LOCK_REGION_LENGTH__+0x25e> + 64c: 34 fe sbrs r3, 4 + 64e: 0a c0 rjmp .+20 ; 0x664 <__LOCK_REGION_LENGTH__+0x264> + 650: 29 2f mov r18, r25 + 652: 26 60 ori r18, 0x06 ; 6 + 654: b2 2e mov r11, r18 + 656: 06 c0 rjmp .+12 ; 0x664 <__LOCK_REGION_LENGTH__+0x264> + 658: 28 e0 ldi r18, 0x08 ; 8 + 65a: 30 e0 ldi r19, 0x00 ; 0 + 65c: 05 c0 rjmp .+10 ; 0x668 <__LOCK_REGION_LENGTH__+0x268> + 65e: 20 e1 ldi r18, 0x10 ; 16 + 660: 30 e0 ldi r19, 0x00 ; 0 + 662: 02 c0 rjmp .+4 ; 0x668 <__LOCK_REGION_LENGTH__+0x268> + 664: 20 e1 ldi r18, 0x10 ; 16 + 666: 32 e0 ldi r19, 0x02 ; 2 + 668: f8 01 movw r30, r16 + 66a: b7 fe sbrs r11, 7 + 66c: 07 c0 rjmp .+14 ; 0x67c <__LOCK_REGION_LENGTH__+0x27c> + 66e: 60 81 ld r22, Z + 670: 71 81 ldd r23, Z+1 ; 0x01 + 672: 82 81 ldd r24, Z+2 ; 0x02 + 674: 93 81 ldd r25, Z+3 ; 0x03 + 676: 0c 5f subi r16, 0xFC ; 252 + 678: 1f 4f sbci r17, 0xFF ; 255 + 67a: 06 c0 rjmp .+12 ; 0x688 <__LOCK_REGION_LENGTH__+0x288> + 67c: 60 81 ld r22, Z + 67e: 71 81 ldd r23, Z+1 ; 0x01 + 680: 80 e0 ldi r24, 0x00 ; 0 + 682: 90 e0 ldi r25, 0x00 ; 0 + 684: 0e 5f subi r16, 0xFE ; 254 + 686: 1f 4f sbci r17, 0xFF ; 255 + 688: a3 01 movw r20, r6 + 68a: f1 d0 rcall .+482 ; 0x86e <__ultoa_invert> + 68c: 88 2e mov r8, r24 + 68e: 86 18 sub r8, r6 + 690: fb 2d mov r31, r11 + 692: ff 77 andi r31, 0x7F ; 127 + 694: 3f 2e mov r3, r31 + 696: 36 fe sbrs r3, 6 + 698: 0d c0 rjmp .+26 ; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4> + 69a: 23 2d mov r18, r3 + 69c: 2e 7f andi r18, 0xFE ; 254 + 69e: a2 2e mov r10, r18 + 6a0: 89 14 cp r8, r9 + 6a2: 58 f4 brcc .+22 ; 0x6ba <__LOCK_REGION_LENGTH__+0x2ba> + 6a4: 34 fe sbrs r3, 4 + 6a6: 0b c0 rjmp .+22 ; 0x6be <__LOCK_REGION_LENGTH__+0x2be> + 6a8: 32 fc sbrc r3, 2 + 6aa: 09 c0 rjmp .+18 ; 0x6be <__LOCK_REGION_LENGTH__+0x2be> + 6ac: 83 2d mov r24, r3 + 6ae: 8e 7e andi r24, 0xEE ; 238 + 6b0: a8 2e mov r10, r24 + 6b2: 05 c0 rjmp .+10 ; 0x6be <__LOCK_REGION_LENGTH__+0x2be> + 6b4: b8 2c mov r11, r8 + 6b6: a3 2c mov r10, r3 + 6b8: 03 c0 rjmp .+6 ; 0x6c0 <__LOCK_REGION_LENGTH__+0x2c0> + 6ba: b8 2c mov r11, r8 + 6bc: 01 c0 rjmp .+2 ; 0x6c0 <__LOCK_REGION_LENGTH__+0x2c0> + 6be: b9 2c mov r11, r9 + 6c0: a4 fe sbrs r10, 4 + 6c2: 0f c0 rjmp .+30 ; 0x6e2 <__LOCK_REGION_LENGTH__+0x2e2> + 6c4: fe 01 movw r30, r28 + 6c6: e8 0d add r30, r8 + 6c8: f1 1d adc r31, r1 + 6ca: 80 81 ld r24, Z + 6cc: 80 33 cpi r24, 0x30 ; 48 + 6ce: 21 f4 brne .+8 ; 0x6d8 <__LOCK_REGION_LENGTH__+0x2d8> + 6d0: 9a 2d mov r25, r10 + 6d2: 99 7e andi r25, 0xE9 ; 233 + 6d4: a9 2e mov r10, r25 + 6d6: 09 c0 rjmp .+18 ; 0x6ea <__LOCK_REGION_LENGTH__+0x2ea> + 6d8: a2 fe sbrs r10, 2 + 6da: 06 c0 rjmp .+12 ; 0x6e8 <__LOCK_REGION_LENGTH__+0x2e8> + 6dc: b3 94 inc r11 + 6de: b3 94 inc r11 + 6e0: 04 c0 rjmp .+8 ; 0x6ea <__LOCK_REGION_LENGTH__+0x2ea> + 6e2: 8a 2d mov r24, r10 + 6e4: 86 78 andi r24, 0x86 ; 134 + 6e6: 09 f0 breq .+2 ; 0x6ea <__LOCK_REGION_LENGTH__+0x2ea> + 6e8: b3 94 inc r11 + 6ea: a3 fc sbrc r10, 3 + 6ec: 10 c0 rjmp .+32 ; 0x70e <__LOCK_REGION_LENGTH__+0x30e> + 6ee: a0 fe sbrs r10, 0 + 6f0: 06 c0 rjmp .+12 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> + 6f2: b2 14 cp r11, r2 + 6f4: 80 f4 brcc .+32 ; 0x716 <__LOCK_REGION_LENGTH__+0x316> + 6f6: 28 0c add r2, r8 + 6f8: 92 2c mov r9, r2 + 6fa: 9b 18 sub r9, r11 + 6fc: 0d c0 rjmp .+26 ; 0x718 <__LOCK_REGION_LENGTH__+0x318> + 6fe: b2 14 cp r11, r2 + 700: 58 f4 brcc .+22 ; 0x718 <__LOCK_REGION_LENGTH__+0x318> + 702: b6 01 movw r22, r12 + 704: 80 e2 ldi r24, 0x20 ; 32 + 706: 90 e0 ldi r25, 0x00 ; 0 + 708: 76 d0 rcall .+236 ; 0x7f6 + 70a: b3 94 inc r11 + 70c: f8 cf rjmp .-16 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> 70e: b2 14 cp r11, r2 - 710: 80 f4 brcc .+32 ; 0x732 <__LOCK_REGION_LENGTH__+0x332> - 712: 28 0c add r2, r8 - 714: 92 2c mov r9, r2 - 716: 9b 18 sub r9, r11 - 718: 0d c0 rjmp .+26 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> - 71a: b2 14 cp r11, r2 - 71c: 58 f4 brcc .+22 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 710: 18 f4 brcc .+6 ; 0x718 <__LOCK_REGION_LENGTH__+0x318> + 712: 2b 18 sub r2, r11 + 714: 02 c0 rjmp .+4 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> + 716: 98 2c mov r9, r8 + 718: 21 2c mov r2, r1 + 71a: a4 fe sbrs r10, 4 + 71c: 0f c0 rjmp .+30 ; 0x73c <__LOCK_REGION_LENGTH__+0x33c> 71e: b6 01 movw r22, r12 - 720: 80 e2 ldi r24, 0x20 ; 32 + 720: 80 e3 ldi r24, 0x30 ; 48 722: 90 e0 ldi r25, 0x00 ; 0 - 724: 76 d0 rcall .+236 ; 0x812 - 726: b3 94 inc r11 - 728: f8 cf rjmp .-16 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> - 72a: b2 14 cp r11, r2 - 72c: 18 f4 brcc .+6 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> - 72e: 2b 18 sub r2, r11 - 730: 02 c0 rjmp .+4 ; 0x736 <__LOCK_REGION_LENGTH__+0x336> - 732: 98 2c mov r9, r8 - 734: 21 2c mov r2, r1 - 736: a4 fe sbrs r10, 4 - 738: 0f c0 rjmp .+30 ; 0x758 <__LOCK_REGION_LENGTH__+0x358> - 73a: b6 01 movw r22, r12 - 73c: 80 e3 ldi r24, 0x30 ; 48 - 73e: 90 e0 ldi r25, 0x00 ; 0 - 740: 68 d0 rcall .+208 ; 0x812 - 742: a2 fe sbrs r10, 2 - 744: 16 c0 rjmp .+44 ; 0x772 <__LOCK_REGION_LENGTH__+0x372> - 746: a1 fc sbrc r10, 1 - 748: 03 c0 rjmp .+6 ; 0x750 <__LOCK_REGION_LENGTH__+0x350> - 74a: 88 e7 ldi r24, 0x78 ; 120 - 74c: 90 e0 ldi r25, 0x00 ; 0 - 74e: 02 c0 rjmp .+4 ; 0x754 <__LOCK_REGION_LENGTH__+0x354> - 750: 88 e5 ldi r24, 0x58 ; 88 + 724: 68 d0 rcall .+208 ; 0x7f6 + 726: a2 fe sbrs r10, 2 + 728: 16 c0 rjmp .+44 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> + 72a: a1 fc sbrc r10, 1 + 72c: 03 c0 rjmp .+6 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 72e: 88 e7 ldi r24, 0x78 ; 120 + 730: 90 e0 ldi r25, 0x00 ; 0 + 732: 02 c0 rjmp .+4 ; 0x738 <__LOCK_REGION_LENGTH__+0x338> + 734: 88 e5 ldi r24, 0x58 ; 88 + 736: 90 e0 ldi r25, 0x00 ; 0 + 738: b6 01 movw r22, r12 + 73a: 0c c0 rjmp .+24 ; 0x754 <__LOCK_REGION_LENGTH__+0x354> + 73c: 8a 2d mov r24, r10 + 73e: 86 78 andi r24, 0x86 ; 134 + 740: 51 f0 breq .+20 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> + 742: a1 fe sbrs r10, 1 + 744: 02 c0 rjmp .+4 ; 0x74a <__LOCK_REGION_LENGTH__+0x34a> + 746: 8b e2 ldi r24, 0x2B ; 43 + 748: 01 c0 rjmp .+2 ; 0x74c <__LOCK_REGION_LENGTH__+0x34c> + 74a: 80 e2 ldi r24, 0x20 ; 32 + 74c: a7 fc sbrc r10, 7 + 74e: 8d e2 ldi r24, 0x2D ; 45 + 750: b6 01 movw r22, r12 752: 90 e0 ldi r25, 0x00 ; 0 - 754: b6 01 movw r22, r12 - 756: 0c c0 rjmp .+24 ; 0x770 <__LOCK_REGION_LENGTH__+0x370> - 758: 8a 2d mov r24, r10 - 75a: 86 78 andi r24, 0x86 ; 134 - 75c: 51 f0 breq .+20 ; 0x772 <__LOCK_REGION_LENGTH__+0x372> - 75e: a1 fe sbrs r10, 1 - 760: 02 c0 rjmp .+4 ; 0x766 <__LOCK_REGION_LENGTH__+0x366> - 762: 8b e2 ldi r24, 0x2B ; 43 - 764: 01 c0 rjmp .+2 ; 0x768 <__LOCK_REGION_LENGTH__+0x368> - 766: 80 e2 ldi r24, 0x20 ; 32 - 768: a7 fc sbrc r10, 7 - 76a: 8d e2 ldi r24, 0x2D ; 45 - 76c: b6 01 movw r22, r12 - 76e: 90 e0 ldi r25, 0x00 ; 0 - 770: 50 d0 rcall .+160 ; 0x812 - 772: 89 14 cp r8, r9 - 774: 30 f4 brcc .+12 ; 0x782 <__LOCK_REGION_LENGTH__+0x382> - 776: b6 01 movw r22, r12 - 778: 80 e3 ldi r24, 0x30 ; 48 - 77a: 90 e0 ldi r25, 0x00 ; 0 - 77c: 4a d0 rcall .+148 ; 0x812 - 77e: 9a 94 dec r9 - 780: f8 cf rjmp .-16 ; 0x772 <__LOCK_REGION_LENGTH__+0x372> - 782: 8a 94 dec r8 - 784: f3 01 movw r30, r6 - 786: e8 0d add r30, r8 - 788: f1 1d adc r31, r1 - 78a: 80 81 ld r24, Z - 78c: b6 01 movw r22, r12 - 78e: 90 e0 ldi r25, 0x00 ; 0 - 790: 40 d0 rcall .+128 ; 0x812 - 792: 81 10 cpse r8, r1 - 794: f6 cf rjmp .-20 ; 0x782 <__LOCK_REGION_LENGTH__+0x382> - 796: 22 20 and r2, r2 - 798: 09 f4 brne .+2 ; 0x79c <__LOCK_REGION_LENGTH__+0x39c> - 79a: 4e ce rjmp .-868 ; 0x438 <__LOCK_REGION_LENGTH__+0x38> - 79c: b6 01 movw r22, r12 - 79e: 80 e2 ldi r24, 0x20 ; 32 - 7a0: 90 e0 ldi r25, 0x00 ; 0 - 7a2: 37 d0 rcall .+110 ; 0x812 - 7a4: 2a 94 dec r2 - 7a6: f7 cf rjmp .-18 ; 0x796 <__LOCK_REGION_LENGTH__+0x396> - 7a8: f6 01 movw r30, r12 - 7aa: 86 81 ldd r24, Z+6 ; 0x06 - 7ac: 97 81 ldd r25, Z+7 ; 0x07 - 7ae: 02 c0 rjmp .+4 ; 0x7b4 <__LOCK_REGION_LENGTH__+0x3b4> - 7b0: 8f ef ldi r24, 0xFF ; 255 - 7b2: 9f ef ldi r25, 0xFF ; 255 - 7b4: 2b 96 adiw r28, 0x0b ; 11 - 7b6: 0f b6 in r0, 0x3f ; 63 - 7b8: f8 94 cli - 7ba: de bf out 0x3e, r29 ; 62 - 7bc: 0f be out 0x3f, r0 ; 63 - 7be: cd bf out 0x3d, r28 ; 61 - 7c0: df 91 pop r29 - 7c2: cf 91 pop r28 - 7c4: 1f 91 pop r17 - 7c6: 0f 91 pop r16 - 7c8: ff 90 pop r15 - 7ca: ef 90 pop r14 - 7cc: df 90 pop r13 - 7ce: cf 90 pop r12 - 7d0: bf 90 pop r11 - 7d2: af 90 pop r10 - 7d4: 9f 90 pop r9 - 7d6: 8f 90 pop r8 - 7d8: 7f 90 pop r7 - 7da: 6f 90 pop r6 - 7dc: 5f 90 pop r5 - 7de: 4f 90 pop r4 - 7e0: 3f 90 pop r3 - 7e2: 2f 90 pop r2 - 7e4: 08 95 ret + 754: 50 d0 rcall .+160 ; 0x7f6 + 756: 89 14 cp r8, r9 + 758: 30 f4 brcc .+12 ; 0x766 <__LOCK_REGION_LENGTH__+0x366> + 75a: b6 01 movw r22, r12 + 75c: 80 e3 ldi r24, 0x30 ; 48 + 75e: 90 e0 ldi r25, 0x00 ; 0 + 760: 4a d0 rcall .+148 ; 0x7f6 + 762: 9a 94 dec r9 + 764: f8 cf rjmp .-16 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> + 766: 8a 94 dec r8 + 768: f3 01 movw r30, r6 + 76a: e8 0d add r30, r8 + 76c: f1 1d adc r31, r1 + 76e: 80 81 ld r24, Z + 770: b6 01 movw r22, r12 + 772: 90 e0 ldi r25, 0x00 ; 0 + 774: 40 d0 rcall .+128 ; 0x7f6 + 776: 81 10 cpse r8, r1 + 778: f6 cf rjmp .-20 ; 0x766 <__LOCK_REGION_LENGTH__+0x366> + 77a: 22 20 and r2, r2 + 77c: 09 f4 brne .+2 ; 0x780 <__LOCK_REGION_LENGTH__+0x380> + 77e: 4e ce rjmp .-868 ; 0x41c <__LOCK_REGION_LENGTH__+0x1c> + 780: b6 01 movw r22, r12 + 782: 80 e2 ldi r24, 0x20 ; 32 + 784: 90 e0 ldi r25, 0x00 ; 0 + 786: 37 d0 rcall .+110 ; 0x7f6 + 788: 2a 94 dec r2 + 78a: f7 cf rjmp .-18 ; 0x77a <__LOCK_REGION_LENGTH__+0x37a> + 78c: f6 01 movw r30, r12 + 78e: 86 81 ldd r24, Z+6 ; 0x06 + 790: 97 81 ldd r25, Z+7 ; 0x07 + 792: 02 c0 rjmp .+4 ; 0x798 <__LOCK_REGION_LENGTH__+0x398> + 794: 8f ef ldi r24, 0xFF ; 255 + 796: 9f ef ldi r25, 0xFF ; 255 + 798: 2b 96 adiw r28, 0x0b ; 11 + 79a: 0f b6 in r0, 0x3f ; 63 + 79c: f8 94 cli + 79e: de bf out 0x3e, r29 ; 62 + 7a0: 0f be out 0x3f, r0 ; 63 + 7a2: cd bf out 0x3d, r28 ; 61 + 7a4: df 91 pop r29 + 7a6: cf 91 pop r28 + 7a8: 1f 91 pop r17 + 7aa: 0f 91 pop r16 + 7ac: ff 90 pop r15 + 7ae: ef 90 pop r14 + 7b0: df 90 pop r13 + 7b2: cf 90 pop r12 + 7b4: bf 90 pop r11 + 7b6: af 90 pop r10 + 7b8: 9f 90 pop r9 + 7ba: 8f 90 pop r8 + 7bc: 7f 90 pop r7 + 7be: 6f 90 pop r6 + 7c0: 5f 90 pop r5 + 7c2: 4f 90 pop r4 + 7c4: 3f 90 pop r3 + 7c6: 2f 90 pop r2 + 7c8: 08 95 ret -000007e6 : - 7e6: fc 01 movw r30, r24 - 7e8: 05 90 lpm r0, Z+ - 7ea: 61 50 subi r22, 0x01 ; 1 - 7ec: 70 40 sbci r23, 0x00 ; 0 - 7ee: 01 10 cpse r0, r1 - 7f0: d8 f7 brcc .-10 ; 0x7e8 - 7f2: 80 95 com r24 - 7f4: 90 95 com r25 - 7f6: 8e 0f add r24, r30 - 7f8: 9f 1f adc r25, r31 - 7fa: 08 95 ret +000007ca : + 7ca: fc 01 movw r30, r24 + 7cc: 05 90 lpm r0, Z+ + 7ce: 61 50 subi r22, 0x01 ; 1 + 7d0: 70 40 sbci r23, 0x00 ; 0 + 7d2: 01 10 cpse r0, r1 + 7d4: d8 f7 brcc .-10 ; 0x7cc + 7d6: 80 95 com r24 + 7d8: 90 95 com r25 + 7da: 8e 0f add r24, r30 + 7dc: 9f 1f adc r25, r31 + 7de: 08 95 ret -000007fc : - 7fc: fc 01 movw r30, r24 - 7fe: 61 50 subi r22, 0x01 ; 1 - 800: 70 40 sbci r23, 0x00 ; 0 - 802: 01 90 ld r0, Z+ - 804: 01 10 cpse r0, r1 - 806: d8 f7 brcc .-10 ; 0x7fe - 808: 80 95 com r24 - 80a: 90 95 com r25 - 80c: 8e 0f add r24, r30 - 80e: 9f 1f adc r25, r31 - 810: 08 95 ret +000007e0 : + 7e0: fc 01 movw r30, r24 + 7e2: 61 50 subi r22, 0x01 ; 1 + 7e4: 70 40 sbci r23, 0x00 ; 0 + 7e6: 01 90 ld r0, Z+ + 7e8: 01 10 cpse r0, r1 + 7ea: d8 f7 brcc .-10 ; 0x7e2 + 7ec: 80 95 com r24 + 7ee: 90 95 com r25 + 7f0: 8e 0f add r24, r30 + 7f2: 9f 1f adc r25, r31 + 7f4: 08 95 ret -00000812 : - 812: 0f 93 push r16 - 814: 1f 93 push r17 - 816: cf 93 push r28 - 818: df 93 push r29 - 81a: fb 01 movw r30, r22 - 81c: 23 81 ldd r18, Z+3 ; 0x03 - 81e: 21 fd sbrc r18, 1 - 820: 03 c0 rjmp .+6 ; 0x828 - 822: 8f ef ldi r24, 0xFF ; 255 - 824: 9f ef ldi r25, 0xFF ; 255 - 826: 2c c0 rjmp .+88 ; 0x880 - 828: 22 ff sbrs r18, 2 - 82a: 16 c0 rjmp .+44 ; 0x858 - 82c: 46 81 ldd r20, Z+6 ; 0x06 - 82e: 57 81 ldd r21, Z+7 ; 0x07 - 830: 24 81 ldd r18, Z+4 ; 0x04 - 832: 35 81 ldd r19, Z+5 ; 0x05 - 834: 42 17 cp r20, r18 - 836: 53 07 cpc r21, r19 - 838: 44 f4 brge .+16 ; 0x84a - 83a: a0 81 ld r26, Z - 83c: b1 81 ldd r27, Z+1 ; 0x01 - 83e: 9d 01 movw r18, r26 - 840: 2f 5f subi r18, 0xFF ; 255 - 842: 3f 4f sbci r19, 0xFF ; 255 - 844: 31 83 std Z+1, r19 ; 0x01 - 846: 20 83 st Z, r18 - 848: 8c 93 st X, r24 - 84a: 26 81 ldd r18, Z+6 ; 0x06 - 84c: 37 81 ldd r19, Z+7 ; 0x07 - 84e: 2f 5f subi r18, 0xFF ; 255 - 850: 3f 4f sbci r19, 0xFF ; 255 - 852: 37 83 std Z+7, r19 ; 0x07 - 854: 26 83 std Z+6, r18 ; 0x06 - 856: 14 c0 rjmp .+40 ; 0x880 - 858: 8b 01 movw r16, r22 - 85a: ec 01 movw r28, r24 - 85c: fb 01 movw r30, r22 - 85e: 00 84 ldd r0, Z+8 ; 0x08 - 860: f1 85 ldd r31, Z+9 ; 0x09 - 862: e0 2d mov r30, r0 - 864: 09 95 icall - 866: 89 2b or r24, r25 - 868: e1 f6 brne .-72 ; 0x822 - 86a: d8 01 movw r26, r16 - 86c: 16 96 adiw r26, 0x06 ; 6 - 86e: 8d 91 ld r24, X+ - 870: 9c 91 ld r25, X - 872: 17 97 sbiw r26, 0x07 ; 7 - 874: 01 96 adiw r24, 0x01 ; 1 - 876: 17 96 adiw r26, 0x07 ; 7 - 878: 9c 93 st X, r25 - 87a: 8e 93 st -X, r24 - 87c: 16 97 sbiw r26, 0x06 ; 6 - 87e: ce 01 movw r24, r28 - 880: df 91 pop r29 - 882: cf 91 pop r28 - 884: 1f 91 pop r17 - 886: 0f 91 pop r16 - 888: 08 95 ret +000007f6 : + 7f6: 0f 93 push r16 + 7f8: 1f 93 push r17 + 7fa: cf 93 push r28 + 7fc: df 93 push r29 + 7fe: fb 01 movw r30, r22 + 800: 23 81 ldd r18, Z+3 ; 0x03 + 802: 21 fd sbrc r18, 1 + 804: 03 c0 rjmp .+6 ; 0x80c + 806: 8f ef ldi r24, 0xFF ; 255 + 808: 9f ef ldi r25, 0xFF ; 255 + 80a: 2c c0 rjmp .+88 ; 0x864 + 80c: 22 ff sbrs r18, 2 + 80e: 16 c0 rjmp .+44 ; 0x83c + 810: 46 81 ldd r20, Z+6 ; 0x06 + 812: 57 81 ldd r21, Z+7 ; 0x07 + 814: 24 81 ldd r18, Z+4 ; 0x04 + 816: 35 81 ldd r19, Z+5 ; 0x05 + 818: 42 17 cp r20, r18 + 81a: 53 07 cpc r21, r19 + 81c: 44 f4 brge .+16 ; 0x82e + 81e: a0 81 ld r26, Z + 820: b1 81 ldd r27, Z+1 ; 0x01 + 822: 9d 01 movw r18, r26 + 824: 2f 5f subi r18, 0xFF ; 255 + 826: 3f 4f sbci r19, 0xFF ; 255 + 828: 31 83 std Z+1, r19 ; 0x01 + 82a: 20 83 st Z, r18 + 82c: 8c 93 st X, r24 + 82e: 26 81 ldd r18, Z+6 ; 0x06 + 830: 37 81 ldd r19, Z+7 ; 0x07 + 832: 2f 5f subi r18, 0xFF ; 255 + 834: 3f 4f sbci r19, 0xFF ; 255 + 836: 37 83 std Z+7, r19 ; 0x07 + 838: 26 83 std Z+6, r18 ; 0x06 + 83a: 14 c0 rjmp .+40 ; 0x864 + 83c: 8b 01 movw r16, r22 + 83e: ec 01 movw r28, r24 + 840: fb 01 movw r30, r22 + 842: 00 84 ldd r0, Z+8 ; 0x08 + 844: f1 85 ldd r31, Z+9 ; 0x09 + 846: e0 2d mov r30, r0 + 848: 09 95 icall + 84a: 89 2b or r24, r25 + 84c: e1 f6 brne .-72 ; 0x806 + 84e: d8 01 movw r26, r16 + 850: 16 96 adiw r26, 0x06 ; 6 + 852: 8d 91 ld r24, X+ + 854: 9c 91 ld r25, X + 856: 17 97 sbiw r26, 0x07 ; 7 + 858: 01 96 adiw r24, 0x01 ; 1 + 85a: 17 96 adiw r26, 0x07 ; 7 + 85c: 9c 93 st X, r25 + 85e: 8e 93 st -X, r24 + 860: 16 97 sbiw r26, 0x06 ; 6 + 862: ce 01 movw r24, r28 + 864: df 91 pop r29 + 866: cf 91 pop r28 + 868: 1f 91 pop r17 + 86a: 0f 91 pop r16 + 86c: 08 95 ret -0000088a <__ultoa_invert>: - 88a: fa 01 movw r30, r20 - 88c: aa 27 eor r26, r26 - 88e: 28 30 cpi r18, 0x08 ; 8 - 890: 51 f1 breq .+84 ; 0x8e6 <__ultoa_invert+0x5c> - 892: 20 31 cpi r18, 0x10 ; 16 - 894: 81 f1 breq .+96 ; 0x8f6 <__ultoa_invert+0x6c> - 896: e8 94 clt - 898: 6f 93 push r22 - 89a: 6e 7f andi r22, 0xFE ; 254 - 89c: 6e 5f subi r22, 0xFE ; 254 - 89e: 7f 4f sbci r23, 0xFF ; 255 - 8a0: 8f 4f sbci r24, 0xFF ; 255 - 8a2: 9f 4f sbci r25, 0xFF ; 255 - 8a4: af 4f sbci r26, 0xFF ; 255 - 8a6: b1 e0 ldi r27, 0x01 ; 1 - 8a8: 3e d0 rcall .+124 ; 0x926 <__ultoa_invert+0x9c> - 8aa: b4 e0 ldi r27, 0x04 ; 4 - 8ac: 3c d0 rcall .+120 ; 0x926 <__ultoa_invert+0x9c> - 8ae: 67 0f add r22, r23 - 8b0: 78 1f adc r23, r24 - 8b2: 89 1f adc r24, r25 - 8b4: 9a 1f adc r25, r26 - 8b6: a1 1d adc r26, r1 - 8b8: 68 0f add r22, r24 - 8ba: 79 1f adc r23, r25 - 8bc: 8a 1f adc r24, r26 - 8be: 91 1d adc r25, r1 - 8c0: a1 1d adc r26, r1 - 8c2: 6a 0f add r22, r26 - 8c4: 71 1d adc r23, r1 - 8c6: 81 1d adc r24, r1 - 8c8: 91 1d adc r25, r1 - 8ca: a1 1d adc r26, r1 - 8cc: 20 d0 rcall .+64 ; 0x90e <__ultoa_invert+0x84> - 8ce: 09 f4 brne .+2 ; 0x8d2 <__ultoa_invert+0x48> - 8d0: 68 94 set - 8d2: 3f 91 pop r19 - 8d4: 2a e0 ldi r18, 0x0A ; 10 - 8d6: 26 9f mul r18, r22 - 8d8: 11 24 eor r1, r1 - 8da: 30 19 sub r19, r0 - 8dc: 30 5d subi r19, 0xD0 ; 208 - 8de: 31 93 st Z+, r19 - 8e0: de f6 brtc .-74 ; 0x898 <__ultoa_invert+0xe> - 8e2: cf 01 movw r24, r30 - 8e4: 08 95 ret - 8e6: 46 2f mov r20, r22 - 8e8: 47 70 andi r20, 0x07 ; 7 - 8ea: 40 5d subi r20, 0xD0 ; 208 - 8ec: 41 93 st Z+, r20 - 8ee: b3 e0 ldi r27, 0x03 ; 3 - 8f0: 0f d0 rcall .+30 ; 0x910 <__ultoa_invert+0x86> - 8f2: c9 f7 brne .-14 ; 0x8e6 <__ultoa_invert+0x5c> - 8f4: f6 cf rjmp .-20 ; 0x8e2 <__ultoa_invert+0x58> - 8f6: 46 2f mov r20, r22 - 8f8: 4f 70 andi r20, 0x0F ; 15 - 8fa: 40 5d subi r20, 0xD0 ; 208 - 8fc: 4a 33 cpi r20, 0x3A ; 58 - 8fe: 18 f0 brcs .+6 ; 0x906 <__ultoa_invert+0x7c> - 900: 49 5d subi r20, 0xD9 ; 217 - 902: 31 fd sbrc r19, 1 - 904: 40 52 subi r20, 0x20 ; 32 - 906: 41 93 st Z+, r20 - 908: 02 d0 rcall .+4 ; 0x90e <__ultoa_invert+0x84> - 90a: a9 f7 brne .-22 ; 0x8f6 <__ultoa_invert+0x6c> - 90c: ea cf rjmp .-44 ; 0x8e2 <__ultoa_invert+0x58> - 90e: b4 e0 ldi r27, 0x04 ; 4 - 910: a6 95 lsr r26 - 912: 97 95 ror r25 - 914: 87 95 ror r24 - 916: 77 95 ror r23 - 918: 67 95 ror r22 +0000086e <__ultoa_invert>: + 86e: fa 01 movw r30, r20 + 870: aa 27 eor r26, r26 + 872: 28 30 cpi r18, 0x08 ; 8 + 874: 51 f1 breq .+84 ; 0x8ca <__ultoa_invert+0x5c> + 876: 20 31 cpi r18, 0x10 ; 16 + 878: 81 f1 breq .+96 ; 0x8da <__ultoa_invert+0x6c> + 87a: e8 94 clt + 87c: 6f 93 push r22 + 87e: 6e 7f andi r22, 0xFE ; 254 + 880: 6e 5f subi r22, 0xFE ; 254 + 882: 7f 4f sbci r23, 0xFF ; 255 + 884: 8f 4f sbci r24, 0xFF ; 255 + 886: 9f 4f sbci r25, 0xFF ; 255 + 888: af 4f sbci r26, 0xFF ; 255 + 88a: b1 e0 ldi r27, 0x01 ; 1 + 88c: 3e d0 rcall .+124 ; 0x90a <__ultoa_invert+0x9c> + 88e: b4 e0 ldi r27, 0x04 ; 4 + 890: 3c d0 rcall .+120 ; 0x90a <__ultoa_invert+0x9c> + 892: 67 0f add r22, r23 + 894: 78 1f adc r23, r24 + 896: 89 1f adc r24, r25 + 898: 9a 1f adc r25, r26 + 89a: a1 1d adc r26, r1 + 89c: 68 0f add r22, r24 + 89e: 79 1f adc r23, r25 + 8a0: 8a 1f adc r24, r26 + 8a2: 91 1d adc r25, r1 + 8a4: a1 1d adc r26, r1 + 8a6: 6a 0f add r22, r26 + 8a8: 71 1d adc r23, r1 + 8aa: 81 1d adc r24, r1 + 8ac: 91 1d adc r25, r1 + 8ae: a1 1d adc r26, r1 + 8b0: 20 d0 rcall .+64 ; 0x8f2 <__ultoa_invert+0x84> + 8b2: 09 f4 brne .+2 ; 0x8b6 <__ultoa_invert+0x48> + 8b4: 68 94 set + 8b6: 3f 91 pop r19 + 8b8: 2a e0 ldi r18, 0x0A ; 10 + 8ba: 26 9f mul r18, r22 + 8bc: 11 24 eor r1, r1 + 8be: 30 19 sub r19, r0 + 8c0: 30 5d subi r19, 0xD0 ; 208 + 8c2: 31 93 st Z+, r19 + 8c4: de f6 brtc .-74 ; 0x87c <__ultoa_invert+0xe> + 8c6: cf 01 movw r24, r30 + 8c8: 08 95 ret + 8ca: 46 2f mov r20, r22 + 8cc: 47 70 andi r20, 0x07 ; 7 + 8ce: 40 5d subi r20, 0xD0 ; 208 + 8d0: 41 93 st Z+, r20 + 8d2: b3 e0 ldi r27, 0x03 ; 3 + 8d4: 0f d0 rcall .+30 ; 0x8f4 <__ultoa_invert+0x86> + 8d6: c9 f7 brne .-14 ; 0x8ca <__ultoa_invert+0x5c> + 8d8: f6 cf rjmp .-20 ; 0x8c6 <__ultoa_invert+0x58> + 8da: 46 2f mov r20, r22 + 8dc: 4f 70 andi r20, 0x0F ; 15 + 8de: 40 5d subi r20, 0xD0 ; 208 + 8e0: 4a 33 cpi r20, 0x3A ; 58 + 8e2: 18 f0 brcs .+6 ; 0x8ea <__ultoa_invert+0x7c> + 8e4: 49 5d subi r20, 0xD9 ; 217 + 8e6: 31 fd sbrc r19, 1 + 8e8: 40 52 subi r20, 0x20 ; 32 + 8ea: 41 93 st Z+, r20 + 8ec: 02 d0 rcall .+4 ; 0x8f2 <__ultoa_invert+0x84> + 8ee: a9 f7 brne .-22 ; 0x8da <__ultoa_invert+0x6c> + 8f0: ea cf rjmp .-44 ; 0x8c6 <__ultoa_invert+0x58> + 8f2: b4 e0 ldi r27, 0x04 ; 4 + 8f4: a6 95 lsr r26 + 8f6: 97 95 ror r25 + 8f8: 87 95 ror r24 + 8fa: 77 95 ror r23 + 8fc: 67 95 ror r22 + 8fe: ba 95 dec r27 + 900: c9 f7 brne .-14 ; 0x8f4 <__ultoa_invert+0x86> + 902: 00 97 sbiw r24, 0x00 ; 0 + 904: 61 05 cpc r22, r1 + 906: 71 05 cpc r23, r1 + 908: 08 95 ret + 90a: 9b 01 movw r18, r22 + 90c: ac 01 movw r20, r24 + 90e: 0a 2e mov r0, r26 + 910: 06 94 lsr r0 + 912: 57 95 ror r21 + 914: 47 95 ror r20 + 916: 37 95 ror r19 + 918: 27 95 ror r18 91a: ba 95 dec r27 - 91c: c9 f7 brne .-14 ; 0x910 <__ultoa_invert+0x86> - 91e: 00 97 sbiw r24, 0x00 ; 0 - 920: 61 05 cpc r22, r1 - 922: 71 05 cpc r23, r1 - 924: 08 95 ret - 926: 9b 01 movw r18, r22 - 928: ac 01 movw r20, r24 - 92a: 0a 2e mov r0, r26 - 92c: 06 94 lsr r0 - 92e: 57 95 ror r21 - 930: 47 95 ror r20 - 932: 37 95 ror r19 - 934: 27 95 ror r18 - 936: ba 95 dec r27 - 938: c9 f7 brne .-14 ; 0x92c <__ultoa_invert+0xa2> - 93a: 62 0f add r22, r18 - 93c: 73 1f adc r23, r19 - 93e: 84 1f adc r24, r20 - 940: 95 1f adc r25, r21 - 942: a0 1d adc r26, r0 - 944: 08 95 ret + 91c: c9 f7 brne .-14 ; 0x910 <__ultoa_invert+0xa2> + 91e: 62 0f add r22, r18 + 920: 73 1f adc r23, r19 + 922: 84 1f adc r24, r20 + 924: 95 1f adc r25, r21 + 926: a0 1d adc r26, r0 + 928: 08 95 ret -00000946 <_exit>: - 946: f8 94 cli +0000092a <_exit>: + 92a: f8 94 cli -00000948 <__stop_program>: - 948: ff cf rjmp .-2 ; 0x948 <__stop_program> +0000092c <__stop_program>: + 92c: ff cf rjmp .-2 ; 0x92c <__stop_program> diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec index 49463ab..e8241db 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec @@ -1,152 +1,150 @@ S0180000756C747261736F6E696353656E736F722E737265634E -S113000045C0000062C100005EC000005CC000008A -S11300105AC0000058C0000056C0000054C0000080 -S113002052C0000050C000004EC000004CC0000090 -S11300304AC0000048C0000046C0000044C00000A0 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+S11308D04193B3E00FD0C9F7F6CF462F4F70405D78 +S11308E04A3318F0495D31FD4052419302D0A9F7D3 +S11308F0EACFB4E0A6959795879577956795BA95CD +S1130900C9F700976105710508959B01AC010A2E92 +S113091006945795479537952795BA95C9F7620F69 +S1110920731F841F951FA01D0895F894FFCF28 +S109092E7D0001256400B8 S9030000FC diff --git a/Microcontrollers/ultrasonicSensor/main.c b/Microcontrollers/ultrasonicSensor/main.c index 3b4c977..84b6c75 100644 --- a/Microcontrollers/ultrasonicSensor/main.c +++ b/Microcontrollers/ultrasonicSensor/main.c @@ -28,7 +28,7 @@ enum interrupt_status {INTERRUPT_FALLING, INTERRUPT_RISING}; static enum interrupt_status int_stat = INTERRUPT_RISING; -uint16_t timer_dist = 0; // time measured by timer; +uint16_t timer_dist = 125; // time measured by timer; void wait_us(unsigned int us) { @@ -57,6 +57,7 @@ void ultrasonic_send_pulse() ISR(INT0_vect) { + timer_dist = 2009; // if the interrupt was generated on a rising edge (start sending echo) if (int_stat == INTERRUPT_RISING) { @@ -113,7 +114,7 @@ int main(void) int distance = timer_dist * 340 / 2; lcd_clear(); - lcd_write_int(distance); + lcd_write_int(timer_dist); wait_ms(1000); From a8e69001322b7253208408838577f30aab261d7b Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Thu, 18 Mar 2021 20:24:12 +0100 Subject: [PATCH 07/11] interrupt doesn't generate -____- --- .../Opdracht 2.2/Debug/Opdracht 2.2.eep | 1 + .../Opdracht 2.2/Debug/Opdracht 2.2.lss | 207 ++++++++++++++++++ 2 files changed, 208 insertions(+) create mode 100644 Microcontrollers/Opdracht 2.2/Debug/Opdracht 2.2.eep create mode 100644 Microcontrollers/Opdracht 2.2/Debug/Opdracht 2.2.lss diff --git a/Microcontrollers/Opdracht 2.2/Debug/Opdracht 2.2.eep b/Microcontrollers/Opdracht 2.2/Debug/Opdracht 2.2.eep new file mode 100644 index 0000000..7c166a1 --- /dev/null +++ b/Microcontrollers/Opdracht 2.2/Debug/Opdracht 2.2.eep @@ -0,0 +1 @@ +:00000001FF diff --git a/Microcontrollers/Opdracht 2.2/Debug/Opdracht 2.2.lss b/Microcontrollers/Opdracht 2.2/Debug/Opdracht 2.2.lss new file mode 100644 index 0000000..03ca32e --- /dev/null +++ b/Microcontrollers/Opdracht 2.2/Debug/Opdracht 2.2.lss @@ -0,0 +1,207 @@ + +Opdracht 2.2.elf: file format elf32-avr + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .data 00000000 00800100 00800100 0000016c 2**0 + ALLOC, LOAD, DATA + 1 .text 000000a4 00000000 00000000 00000054 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .comment 0000002f 00000000 00000000 0000016c 2**0 + CONTENTS, READONLY + 3 .debug_aranges 00000038 00000000 00000000 0000019b 2**0 + CONTENTS, READONLY, DEBUGGING + 4 .debug_info 00000b13 00000000 00000000 000001d3 2**0 + CONTENTS, READONLY, DEBUGGING + 5 .debug_abbrev 00000819 00000000 00000000 00000ce6 2**0 + CONTENTS, READONLY, DEBUGGING + 6 .debug_line 000002da 00000000 00000000 000014ff 2**0 + CONTENTS, READONLY, DEBUGGING + 7 .debug_frame 00000074 00000000 00000000 000017dc 2**2 + CONTENTS, READONLY, DEBUGGING + 8 .debug_str 0000027d 00000000 00000000 00001850 2**0 + CONTENTS, READONLY, DEBUGGING + 9 .debug_loc 000000e2 00000000 00000000 00001acd 2**0 + CONTENTS, READONLY, DEBUGGING + 10 .debug_ranges 00000028 00000000 00000000 00001baf 2**0 + CONTENTS, READONLY, DEBUGGING + 11 .text 00000004 00000114 00000114 00000168 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 12 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00001bd8 2**2 + CONTENTS, READONLY, DEBUGGING + 13 .text.__vector_2 00000028 000000a4 000000a4 000000f8 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 14 .text.__vector_3 00000028 000000cc 000000cc 00000120 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 15 .text.main 00000020 000000f4 000000f4 00000148 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + +Disassembly of section .text: + +00000000 <__vectors>: + 0: 0c 94 46 00 jmp 0x8c ; 0x8c <__ctors_end> + 4: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 8: 0c 94 52 00 jmp 0xa4 ; 0xa4 <_etext> + c: 0c 94 66 00 jmp 0xcc ; 0xcc <__vector_3> + 10: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 14: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 18: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 1c: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 20: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 24: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 28: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 2c: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 30: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 34: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 38: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 3c: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 40: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 44: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 48: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 4c: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 50: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 54: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 58: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 5c: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 60: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 64: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 68: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 6c: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 70: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 74: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 78: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 7c: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 80: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 84: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + 88: 0c 94 8a 00 jmp 0x114 ; 0x114 <__bad_interrupt> + +0000008c <__ctors_end>: + 8c: 11 24 eor r1, r1 + 8e: 1f be out 0x3f, r1 ; 63 + 90: cf ef ldi r28, 0xFF ; 255 + 92: d0 e1 ldi r29, 0x10 ; 16 + 94: de bf out 0x3e, r29 ; 62 + 96: cd bf out 0x3d, r28 ; 61 + 98: 0e 94 7a 00 call 0xf4 ; 0xf4
+ 9c: 0c 94 50 00 jmp 0xa0 ; 0xa0 <_exit> + +000000a0 <_exit>: + a0: f8 94 cli + +000000a2 <__stop_program>: + a2: ff cf rjmp .-2 ; 0xa2 <__stop_program> + +Disassembly of section .text: + +00000114 <__bad_interrupt>: + 114: 0c 94 00 00 jmp 0 ; 0x0 <__TEXT_REGION_ORIGIN__> + +Disassembly of section .text.__vector_2: + +000000a4 <__vector_2>: +} +/************************************************************************/ +/* interrupt 1 +walk the light 1 down */ +/************************************************************************/ +ISR( INT1_vect ) { + a4: 1f 92 push r1 + a6: 0f 92 push r0 + a8: 0f b6 in r0, 0x3f ; 63 + aa: 0f 92 push r0 + ac: 11 24 eor r1, r1 + ae: 8f 93 push r24 + if (PORTC == 0b10000000) + b0: 85 b3 in r24, 0x15 ; 21 + b2: 80 38 cpi r24, 0x80 ; 128 + b4: 11 f4 brne .+4 ; 0xba <__vector_2+0x16> + { + PORTC == 0b00000001; + b6: 85 b3 in r24, 0x15 ; 21 + b8: 03 c0 rjmp .+6 ; 0xc0 <__vector_2+0x1c> + } else { + PORTC = PORTC << 1; + ba: 85 b3 in r24, 0x15 ; 21 + bc: 88 0f add r24, r24 + be: 85 bb out 0x15, r24 ; 21 + } + + +} + c0: 8f 91 pop r24 + c2: 0f 90 pop r0 + c4: 0f be out 0x3f, r0 ; 63 + c6: 0f 90 pop r0 + c8: 1f 90 pop r1 + ca: 18 95 reti + +Disassembly of section .text.__vector_3: + +000000cc <__vector_3>: + +/************************************************************************/ +/* interrupt 2 +walk the light 1 up */ +/************************************************************************/ +ISR( INT2_vect ) { + cc: 1f 92 push r1 + ce: 0f 92 push r0 + d0: 0f b6 in r0, 0x3f ; 63 + d2: 0f 92 push r0 + d4: 11 24 eor r1, r1 + d6: 8f 93 push r24 + if (PORTC == 0b00000001) + d8: 85 b3 in r24, 0x15 ; 21 + da: 81 30 cpi r24, 0x01 ; 1 + dc: 11 f4 brne .+4 ; 0xe2 <__vector_3+0x16> + { + PORTC = 0b10000000; + de: 80 e8 ldi r24, 0x80 ; 128 + e0: 85 bb out 0x15, r24 ; 21 + } + PORTC = PORTC >> 1; + e2: 85 b3 in r24, 0x15 ; 21 + e4: 86 95 lsr r24 + e6: 85 bb out 0x15, r24 ; 21 +} + e8: 8f 91 pop r24 + ea: 0f 90 pop r0 + ec: 0f be out 0x3f, r0 ; 63 + ee: 0f 90 pop r0 + f0: 1f 90 pop r1 + f2: 18 95 reti + +Disassembly of section .text.main: + +000000f4
: +int main(void) +{ + /* Replace with your application code */ + + // Init I/O + DDRD = 0xF0; // PORTD (7:4) is output, (3:0) is input + f4: 80 ef ldi r24, 0xF0 ; 240 + f6: 81 bb out 0x11, r24 ; 17 + DDRC = 0xFF; + f8: 8f ef ldi r24, 0xFF ; 255 + fa: 84 bb out 0x14, r24 ; 20 + + // Init Interrupt hardware + EICRA |= 0x2C; // INT2 falling edge, INT1 rising edge + fc: ea e6 ldi r30, 0x6A ; 106 + fe: f0 e0 ldi r31, 0x00 ; 0 + 100: 80 81 ld r24, Z + 102: 8c 62 ori r24, 0x2C ; 44 + 104: 80 83 st Z, r24 + EIMSK |= 0x06; // Enable INT2 & INT1 + 106: 89 b7 in r24, 0x39 ; 57 + 108: 86 60 ori r24, 0x06 ; 6 + 10a: 89 bf out 0x39, r24 ; 57 + + PORTC = 0x01; // init the first bit + 10c: 81 e0 ldi r24, 0x01 ; 1 + 10e: 85 bb out 0x15, r24 ; 21 + + sei(); // enable input mechanism + 110: 78 94 sei + 112: ff cf rjmp .-2 ; 0x112 From 956f42b129ae7c8e4ec34adb29addd44fe3d821d Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Wed, 24 Mar 2021 10:35:34 +0100 Subject: [PATCH 08/11] [EDIT] port d input isr --- .../ultrasonicSensor/Debug/ultrasonicSensor.lss | 13 ++++++------- .../ultrasonicSensor/Debug/ultrasonicSensor.srec | 2 +- Microcontrollers/ultrasonicSensor/main.c | 3 +-- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss index d8fee23..0c1bdfd 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss @@ -13,11 +13,11 @@ Idx Name Size VMA LMA File off Algn CONTENTS, READONLY 4 .debug_aranges 000000b8 00000000 00000000 00000a40 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_info 00000fc1 00000000 00000000 00000af8 2**0 + 5 .debug_info 00000fc0 00000000 00000000 00000af8 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_abbrev 00000a99 00000000 00000000 00001ab9 2**0 + 6 .debug_abbrev 00000a99 00000000 00000000 00001ab8 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_line 00000716 00000000 00000000 00002552 2**0 + 7 .debug_line 00000716 00000000 00000000 00002551 2**0 CONTENTS, READONLY, DEBUGGING 8 .debug_frame 000001b4 00000000 00000000 00002c68 2**2 CONTENTS, READONLY, DEBUGGING @@ -588,7 +588,6 @@ int main(void) 33e: 00 00 nop - /* Replace with your application code */ while (1) { ultrasonic_send_pulse(); @@ -604,9 +603,9 @@ int main(void) 34e: 34 df rcall .-408 ; 0x1b8 - wait_ms(1000); - 350: 88 ee ldi r24, 0xE8 ; 232 - 352: 93 e0 ldi r25, 0x03 ; 3 + wait_ms(100); + 350: 84 e6 ldi r24, 0x64 ; 100 + 352: 90 e0 ldi r25, 0x00 ; 0 354: 96 df rcall .-212 ; 0x282 356: f5 cf rjmp .-22 ; 0x342 diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec index e8241db..5f4fb68 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec @@ -52,7 +52,7 @@ S113031018958FEF8093640011BAEAE6F0E08081CB S11303208360808389B7816089BF1FBC8CE08EBDE8 S1130330789417DF8FE493EC0197F1F700C0000085 S113034005DFAEDF03DF809100019091010134DF0E -S113035088EE93E096DFF5CF0F931F93CF93DF934F +S113035084E690E096DFF5CF0F931F93CF93DF935E S1130360CDB7DEB72E970FB6F894DEBF0FBECDBF64 S11303700D891E898F89988D26E02C831A83098321 S113038097FF02C080E090E801979E838D83AE01C1 diff --git a/Microcontrollers/ultrasonicSensor/main.c b/Microcontrollers/ultrasonicSensor/main.c index 84b6c75..f6882d1 100644 --- a/Microcontrollers/ultrasonicSensor/main.c +++ b/Microcontrollers/ultrasonicSensor/main.c @@ -107,7 +107,6 @@ int main(void) lcd_clear(); - /* Replace with your application code */ while (1) { ultrasonic_send_pulse(); @@ -117,7 +116,7 @@ int main(void) lcd_write_int(timer_dist); - wait_ms(1000); + wait_ms(100); } } From fa20a79a22460e99f4b6210986e97f23df210d10 Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Wed, 24 Mar 2021 11:32:03 +0100 Subject: [PATCH 09/11] [FIX] remove weird portd output in lcd --- .../Debug/ultrasonicSensor.lss | 2008 ++++++++--------- .../Debug/ultrasonicSensor.srec | 258 +-- .../ultrasonicSensor/lcd_control.c | 1 - Microcontrollers/ultrasonicSensor/main.c | 2 +- 4 files changed, 1132 insertions(+), 1137 deletions(-) diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss index 0c1bdfd..7e49b4a 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss @@ -3,29 +3,29 @@ ultrasonicSensor.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 00000006 00800100 0000092e 000009a2 2**0 + 0 .data 00000006 00800100 00000928 0000099c 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 0000092e 00000000 00000000 00000074 2**1 + 1 .text 00000928 00000000 00000000 00000074 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .comment 0000005c 00000000 00000000 000009a8 2**0 + 2 .comment 0000005c 00000000 00000000 000009a2 2**0 CONTENTS, READONLY - 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000a04 2**2 + 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000a00 2**2 CONTENTS, READONLY - 4 .debug_aranges 000000b8 00000000 00000000 00000a40 2**0 + 4 .debug_aranges 000000b8 00000000 00000000 00000a3c 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_info 00000fc0 00000000 00000000 00000af8 2**0 + 5 .debug_info 00000fc0 00000000 00000000 00000af4 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_abbrev 00000a99 00000000 00000000 00001ab8 2**0 + 6 .debug_abbrev 00000a99 00000000 00000000 00001ab4 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_line 00000716 00000000 00000000 00002551 2**0 + 7 .debug_line 00000710 00000000 00000000 0000254d 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_frame 000001b4 00000000 00000000 00002c68 2**2 + 8 .debug_frame 000001b4 00000000 00000000 00002c60 2**2 CONTENTS, READONLY, DEBUGGING - 9 .debug_str 0000059a 00000000 00000000 00002e1c 2**0 + 9 .debug_str 0000059a 00000000 00000000 00002e14 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_loc 0000049c 00000000 00000000 000033b6 2**0 + 10 .debug_loc 0000049c 00000000 00000000 000033ae 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_ranges 00000098 00000000 00000000 00003852 2**0 + 11 .debug_ranges 00000098 00000000 00000000 0000384a 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -33,7 +33,7 @@ Disassembly of section .text: 00000000 <__vectors>: 0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end> 2: 00 00 nop - 4: 5a c1 rjmp .+692 ; 0x2ba <__vector_1> + 4: 59 c1 rjmp .+690 ; 0x2b8 <__vector_1> 6: 00 00 nop 8: 56 c0 rjmp .+172 ; 0xb6 <__bad_interrupt> a: 00 00 nop @@ -114,7 +114,7 @@ Disassembly of section .text: 98: 11 e0 ldi r17, 0x01 ; 1 9a: a0 e0 ldi r26, 0x00 ; 0 9c: b1 e0 ldi r27, 0x01 ; 1 - 9e: ee e2 ldi r30, 0x2E ; 46 + 9e: e8 e2 ldi r30, 0x28 ; 40 a0: f9 e0 ldi r31, 0x09 ; 9 a2: 00 e0 ldi r16, 0x00 ; 0 a4: 0b bf out 0x3b, r16 ; 59 @@ -124,8 +124,8 @@ Disassembly of section .text: ac: a6 30 cpi r26, 0x06 ; 6 ae: b1 07 cpc r27, r17 b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> - b2: 2f d1 rcall .+606 ; 0x312
- b4: 3a c4 rjmp .+2164 ; 0x92a <_exit> + b2: 2e d1 rcall .+604 ; 0x310
+ b4: 37 c4 rjmp .+2158 ; 0x924 <_exit> 000000b6 <__bad_interrupt>: b6: a4 cf rjmp .-184 ; 0x0 <__vectors> @@ -238,1136 +238,1132 @@ void lcd_move_right(void){ 164: 8f ef ldi r24, 0xFF ; 255 166: 84 bb out 0x14, r24 ; 20 168: 85 bb out 0x15, r24 ; 21 - 16a: 81 bb out 0x11, r24 ; 17 - 16c: 8a bb out 0x1a, r24 ; 26 - 16e: 15 ba out 0x15, r1 ; 21 - 170: 1b ba out 0x1b, r1 ; 27 - 172: c0 e2 ldi r28, 0x20 ; 32 - 174: c5 bb out 0x15, r28 ; 21 - 176: b7 df rcall .-146 ; 0xe6 - 178: c5 bb out 0x15, r28 ; 21 - 17a: b5 df rcall .-150 ; 0xe6 - 17c: 80 e8 ldi r24, 0x80 ; 128 - 17e: 85 bb out 0x15, r24 ; 21 - 180: b2 df rcall .-156 ; 0xe6 - 182: 15 ba out 0x15, r1 ; 21 - 184: b0 df rcall .-160 ; 0xe6 - 186: 80 ef ldi r24, 0xF0 ; 240 - 188: 85 bb out 0x15, r24 ; 21 - 18a: ad df rcall .-166 ; 0xe6 - 18c: 15 ba out 0x15, r1 ; 21 - 18e: ab df rcall .-170 ; 0xe6 - 190: 80 e6 ldi r24, 0x60 ; 96 - 192: 85 bb out 0x15, r24 ; 21 - 194: a8 df rcall .-176 ; 0xe6 - 196: 82 e0 ldi r24, 0x02 ; 2 - 198: c9 df rcall .-110 ; 0x12c - 19a: a5 df rcall .-182 ; 0xe6 - 19c: cf 91 pop r28 - 19e: 08 95 ret + 16a: 8a bb out 0x1a, r24 ; 26 + 16c: 15 ba out 0x15, r1 ; 21 + 16e: 1b ba out 0x1b, r1 ; 27 + 170: c0 e2 ldi r28, 0x20 ; 32 + 172: c5 bb out 0x15, r28 ; 21 + 174: b8 df rcall .-144 ; 0xe6 + 176: c5 bb out 0x15, r28 ; 21 + 178: b6 df rcall .-148 ; 0xe6 + 17a: 80 e8 ldi r24, 0x80 ; 128 + 17c: 85 bb out 0x15, r24 ; 21 + 17e: b3 df rcall .-154 ; 0xe6 + 180: 15 ba out 0x15, r1 ; 21 + 182: b1 df rcall .-158 ; 0xe6 + 184: 80 ef ldi r24, 0xF0 ; 240 + 186: 85 bb out 0x15, r24 ; 21 + 188: ae df rcall .-164 ; 0xe6 + 18a: 15 ba out 0x15, r1 ; 21 + 18c: ac df rcall .-168 ; 0xe6 + 18e: 80 e6 ldi r24, 0x60 ; 96 + 190: 85 bb out 0x15, r24 ; 21 + 192: a9 df rcall .-174 ; 0xe6 + 194: 82 e0 ldi r24, 0x02 ; 2 + 196: ca df rcall .-108 ; 0x12c + 198: a6 df rcall .-180 ; 0xe6 + 19a: cf 91 pop r28 + 19c: 08 95 ret -000001a0 : - 1a0: cf 93 push r28 - 1a2: df 93 push r29 - 1a4: ec 01 movw r28, r24 - 1a6: 02 c0 rjmp .+4 ; 0x1ac - 1a8: b1 df rcall .-158 ; 0x10c - 1aa: 21 96 adiw r28, 0x01 ; 1 - 1ac: 88 81 ld r24, Y - 1ae: 81 11 cpse r24, r1 - 1b0: fb cf rjmp .-10 ; 0x1a8 - 1b2: df 91 pop r29 - 1b4: cf 91 pop r28 - 1b6: 08 95 ret +0000019e : + 19e: cf 93 push r28 + 1a0: df 93 push r29 + 1a2: ec 01 movw r28, r24 + 1a4: 02 c0 rjmp .+4 ; 0x1aa + 1a6: b2 df rcall .-156 ; 0x10c + 1a8: 21 96 adiw r28, 0x01 ; 1 + 1aa: 88 81 ld r24, Y + 1ac: 81 11 cpse r24, r1 + 1ae: fb cf rjmp .-10 ; 0x1a6 + 1b0: df 91 pop r29 + 1b2: cf 91 pop r28 + 1b4: 08 95 ret -000001b8 : +000001b6 : } void lcd_write_int(int number) { - 1b8: af 92 push r10 - 1ba: bf 92 push r11 - 1bc: cf 92 push r12 - 1be: df 92 push r13 - 1c0: ef 92 push r14 - 1c2: ff 92 push r15 - 1c4: 0f 93 push r16 - 1c6: 1f 93 push r17 - 1c8: cf 93 push r28 - 1ca: df 93 push r29 - 1cc: cd b7 in r28, 0x3d ; 61 - 1ce: de b7 in r29, 0x3e ; 62 - 1d0: d8 2e mov r13, r24 - 1d2: c9 2e mov r12, r25 + 1b6: af 92 push r10 + 1b8: bf 92 push r11 + 1ba: cf 92 push r12 + 1bc: df 92 push r13 + 1be: ef 92 push r14 + 1c0: ff 92 push r15 + 1c2: 0f 93 push r16 + 1c4: 1f 93 push r17 + 1c6: cf 93 push r28 + 1c8: df 93 push r29 + 1ca: cd b7 in r28, 0x3d ; 61 + 1cc: de b7 in r29, 0x3e ; 62 + 1ce: d8 2e mov r13, r24 + 1d0: c9 2e mov r12, r25 int length = snprintf(NULL, 0, "%d", number); char str[length + 1]; snprintf(str, length + 1, "%d", number); lcd_write_string(str); } - 1d4: ad b6 in r10, 0x3d ; 61 - 1d6: be b6 in r11, 0x3e ; 62 + 1d2: ad b6 in r10, 0x3d ; 61 + 1d4: be b6 in r11, 0x3e ; 62 lcd_write_command(0x1E); } void lcd_write_int(int number) { int length = snprintf(NULL, 0, "%d", number); - 1d8: 9f 93 push r25 - 1da: 8f 93 push r24 - 1dc: 0f 2e mov r0, r31 - 1de: f3 e0 ldi r31, 0x03 ; 3 - 1e0: ef 2e mov r14, r31 - 1e2: f1 e0 ldi r31, 0x01 ; 1 - 1e4: ff 2e mov r15, r31 - 1e6: f0 2d mov r31, r0 - 1e8: ff 92 push r15 - 1ea: ef 92 push r14 + 1d6: 9f 93 push r25 + 1d8: 8f 93 push r24 + 1da: 0f 2e mov r0, r31 + 1dc: f3 e0 ldi r31, 0x03 ; 3 + 1de: ef 2e mov r14, r31 + 1e0: f1 e0 ldi r31, 0x01 ; 1 + 1e2: ff 2e mov r15, r31 + 1e4: f0 2d mov r31, r0 + 1e6: ff 92 push r15 + 1e8: ef 92 push r14 + 1ea: 1f 92 push r1 1ec: 1f 92 push r1 1ee: 1f 92 push r1 1f0: 1f 92 push r1 - 1f2: 1f 92 push r1 - 1f4: b1 d0 rcall .+354 ; 0x358 + 1f2: af d0 rcall .+350 ; 0x352 char str[length + 1]; - 1f6: 01 96 adiw r24, 0x01 ; 1 - 1f8: 2d b7 in r18, 0x3d ; 61 - 1fa: 3e b7 in r19, 0x3e ; 62 - 1fc: 28 5f subi r18, 0xF8 ; 248 - 1fe: 3f 4f sbci r19, 0xFF ; 255 - 200: 0f b6 in r0, 0x3f ; 63 - 202: f8 94 cli - 204: 3e bf out 0x3e, r19 ; 62 - 206: 0f be out 0x3f, r0 ; 63 - 208: 2d bf out 0x3d, r18 ; 61 - 20a: 28 1b sub r18, r24 - 20c: 39 0b sbc r19, r25 - 20e: 0f b6 in r0, 0x3f ; 63 - 210: f8 94 cli - 212: 3e bf out 0x3e, r19 ; 62 - 214: 0f be out 0x3f, r0 ; 63 - 216: 2d bf out 0x3d, r18 ; 61 - 218: 0d b7 in r16, 0x3d ; 61 - 21a: 1e b7 in r17, 0x3e ; 62 - 21c: 0f 5f subi r16, 0xFF ; 255 - 21e: 1f 4f sbci r17, 0xFF ; 255 + 1f4: 01 96 adiw r24, 0x01 ; 1 + 1f6: 2d b7 in r18, 0x3d ; 61 + 1f8: 3e b7 in r19, 0x3e ; 62 + 1fa: 28 5f subi r18, 0xF8 ; 248 + 1fc: 3f 4f sbci r19, 0xFF ; 255 + 1fe: 0f b6 in r0, 0x3f ; 63 + 200: f8 94 cli + 202: 3e bf out 0x3e, r19 ; 62 + 204: 0f be out 0x3f, r0 ; 63 + 206: 2d bf out 0x3d, r18 ; 61 + 208: 28 1b sub r18, r24 + 20a: 39 0b sbc r19, r25 + 20c: 0f b6 in r0, 0x3f ; 63 + 20e: f8 94 cli + 210: 3e bf out 0x3e, r19 ; 62 + 212: 0f be out 0x3f, r0 ; 63 + 214: 2d bf out 0x3d, r18 ; 61 + 216: 0d b7 in r16, 0x3d ; 61 + 218: 1e b7 in r17, 0x3e ; 62 + 21a: 0f 5f subi r16, 0xFF ; 255 + 21c: 1f 4f sbci r17, 0xFF ; 255 snprintf(str, length + 1, "%d", number); - 220: cf 92 push r12 - 222: df 92 push r13 - 224: ff 92 push r15 - 226: ef 92 push r14 - 228: 9f 93 push r25 - 22a: 8f 93 push r24 - 22c: 1f 93 push r17 - 22e: 0f 93 push r16 - 230: 93 d0 rcall .+294 ; 0x358 + 21e: cf 92 push r12 + 220: df 92 push r13 + 222: ff 92 push r15 + 224: ef 92 push r14 + 226: 9f 93 push r25 + 228: 8f 93 push r24 + 22a: 1f 93 push r17 + 22c: 0f 93 push r16 + 22e: 91 d0 rcall .+290 ; 0x352 lcd_write_string(str); - 232: 80 2f mov r24, r16 - 234: 91 2f mov r25, r17 - 236: b4 df rcall .-152 ; 0x1a0 + 230: 80 2f mov r24, r16 + 232: 91 2f mov r25, r17 + 234: b4 df rcall .-152 ; 0x19e } - 238: 8d b7 in r24, 0x3d ; 61 - 23a: 9e b7 in r25, 0x3e ; 62 - 23c: 08 96 adiw r24, 0x08 ; 8 - 23e: 0f b6 in r0, 0x3f ; 63 - 240: f8 94 cli - 242: 9e bf out 0x3e, r25 ; 62 - 244: 0f be out 0x3f, r0 ; 63 - 246: 8d bf out 0x3d, r24 ; 61 - 248: 0f b6 in r0, 0x3f ; 63 - 24a: f8 94 cli - 24c: be be out 0x3e, r11 ; 62 - 24e: 0f be out 0x3f, r0 ; 63 - 250: ad be out 0x3d, r10 ; 61 - 252: df 91 pop r29 - 254: cf 91 pop r28 - 256: 1f 91 pop r17 - 258: 0f 91 pop r16 - 25a: ff 90 pop r15 - 25c: ef 90 pop r14 - 25e: df 90 pop r13 - 260: cf 90 pop r12 - 262: bf 90 pop r11 - 264: af 90 pop r10 - 266: 08 95 ret + 236: 8d b7 in r24, 0x3d ; 61 + 238: 9e b7 in r25, 0x3e ; 62 + 23a: 08 96 adiw r24, 0x08 ; 8 + 23c: 0f b6 in r0, 0x3f ; 63 + 23e: f8 94 cli + 240: 9e bf out 0x3e, r25 ; 62 + 242: 0f be out 0x3f, r0 ; 63 + 244: 8d bf out 0x3d, r24 ; 61 + 246: 0f b6 in r0, 0x3f ; 63 + 248: f8 94 cli + 24a: be be out 0x3e, r11 ; 62 + 24c: 0f be out 0x3f, r0 ; 63 + 24e: ad be out 0x3d, r10 ; 61 + 250: df 91 pop r29 + 252: cf 91 pop r28 + 254: 1f 91 pop r17 + 256: 0f 91 pop r16 + 258: ff 90 pop r15 + 25a: ef 90 pop r14 + 25c: df 90 pop r13 + 25e: cf 90 pop r12 + 260: bf 90 pop r11 + 262: af 90 pop r10 + 264: 08 95 ret -00000268 : +00000266 : uint16_t timer_dist = 125; // time measured by timer; void wait_us(unsigned int us) { for(int i = 0; i < us; i++) - 268: 20 e0 ldi r18, 0x00 ; 0 - 26a: 30 e0 ldi r19, 0x00 ; 0 - 26c: 06 c0 rjmp .+12 ; 0x27a + 266: 20 e0 ldi r18, 0x00 ; 0 + 268: 30 e0 ldi r19, 0x00 ; 0 + 26a: 06 c0 rjmp .+12 ; 0x278 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); - 26e: 46 e0 ldi r20, 0x06 ; 6 - 270: 4a 95 dec r20 - 272: f1 f7 brne .-4 ; 0x270 - 274: 00 c0 rjmp .+0 ; 0x276 - 276: 2f 5f subi r18, 0xFF ; 255 - 278: 3f 4f sbci r19, 0xFF ; 255 - 27a: 28 17 cp r18, r24 - 27c: 39 07 cpc r19, r25 - 27e: b8 f3 brcs .-18 ; 0x26e + 26c: 46 e0 ldi r20, 0x06 ; 6 + 26e: 4a 95 dec r20 + 270: f1 f7 brne .-4 ; 0x26e + 272: 00 c0 rjmp .+0 ; 0x274 + 274: 2f 5f subi r18, 0xFF ; 255 + 276: 3f 4f sbci r19, 0xFF ; 255 + 278: 28 17 cp r18, r24 + 27a: 39 07 cpc r19, r25 + 27c: b8 f3 brcs .-18 ; 0x26c { _delay_us(1); } } - 280: 08 95 ret + 27e: 08 95 ret -00000282 : +00000280 : void wait_ms(unsigned int ms) { for(int i = 0; i < ms; i++) - 282: 20 e0 ldi r18, 0x00 ; 0 - 284: 30 e0 ldi r19, 0x00 ; 0 - 286: 08 c0 rjmp .+16 ; 0x298 + 280: 20 e0 ldi r18, 0x00 ; 0 + 282: 30 e0 ldi r19, 0x00 ; 0 + 284: 08 c0 rjmp .+16 ; 0x296 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); - 288: e7 e8 ldi r30, 0x87 ; 135 - 28a: f3 e1 ldi r31, 0x13 ; 19 - 28c: 31 97 sbiw r30, 0x01 ; 1 - 28e: f1 f7 brne .-4 ; 0x28c - 290: 00 c0 rjmp .+0 ; 0x292 - 292: 00 00 nop - 294: 2f 5f subi r18, 0xFF ; 255 - 296: 3f 4f sbci r19, 0xFF ; 255 - 298: 28 17 cp r18, r24 - 29a: 39 07 cpc r19, r25 - 29c: a8 f3 brcs .-22 ; 0x288 + 286: e7 e8 ldi r30, 0x87 ; 135 + 288: f3 e1 ldi r31, 0x13 ; 19 + 28a: 31 97 sbiw r30, 0x01 ; 1 + 28c: f1 f7 brne .-4 ; 0x28a + 28e: 00 c0 rjmp .+0 ; 0x290 + 290: 00 00 nop + 292: 2f 5f subi r18, 0xFF ; 255 + 294: 3f 4f sbci r19, 0xFF ; 255 + 296: 28 17 cp r18, r24 + 298: 39 07 cpc r19, r25 + 29a: a8 f3 brcs .-22 ; 0x286 { _delay_ms(1); } } - 29e: 08 95 ret + 29c: 08 95 ret -000002a0 : +0000029e : void ultrasonic_send_pulse() { - 2a0: cf 93 push r28 - 2a2: df 93 push r29 + 29e: cf 93 push r28 + 2a0: df 93 push r29 PORTG = 0x00; // 10 us low pulse - 2a4: c5 e6 ldi r28, 0x65 ; 101 - 2a6: d0 e0 ldi r29, 0x00 ; 0 - 2a8: 18 82 st Y, r1 + 2a2: c5 e6 ldi r28, 0x65 ; 101 + 2a4: d0 e0 ldi r29, 0x00 ; 0 + 2a6: 18 82 st Y, r1 wait_us(10); - 2aa: 8a e0 ldi r24, 0x0A ; 10 - 2ac: 90 e0 ldi r25, 0x00 ; 0 - 2ae: dc df rcall .-72 ; 0x268 + 2a8: 8a e0 ldi r24, 0x0A ; 10 + 2aa: 90 e0 ldi r25, 0x00 ; 0 + 2ac: dc df rcall .-72 ; 0x266 PORTG = 0x01; - 2b0: 81 e0 ldi r24, 0x01 ; 1 - 2b2: 88 83 st Y, r24 + 2ae: 81 e0 ldi r24, 0x01 ; 1 + 2b0: 88 83 st Y, r24 } - 2b4: df 91 pop r29 - 2b6: cf 91 pop r28 - 2b8: 08 95 ret + 2b2: df 91 pop r29 + 2b4: cf 91 pop r28 + 2b6: 08 95 ret -000002ba <__vector_1>: +000002b8 <__vector_1>: ISR(INT0_vect) { - 2ba: 1f 92 push r1 - 2bc: 0f 92 push r0 - 2be: 0f b6 in r0, 0x3f ; 63 - 2c0: 0f 92 push r0 - 2c2: 11 24 eor r1, r1 - 2c4: 8f 93 push r24 - 2c6: 9f 93 push r25 + 2b8: 1f 92 push r1 + 2ba: 0f 92 push r0 + 2bc: 0f b6 in r0, 0x3f ; 63 + 2be: 0f 92 push r0 + 2c0: 11 24 eor r1, r1 + 2c2: 8f 93 push r24 + 2c4: 9f 93 push r25 timer_dist = 2009; - 2c8: 89 ed ldi r24, 0xD9 ; 217 - 2ca: 97 e0 ldi r25, 0x07 ; 7 - 2cc: 90 93 01 01 sts 0x0101, r25 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> - 2d0: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> + 2c6: 89 ed ldi r24, 0xD9 ; 217 + 2c8: 97 e0 ldi r25, 0x07 ; 7 + 2ca: 90 93 01 01 sts 0x0101, r25 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> + 2ce: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> // if the interrupt was generated on a rising edge (start sending echo) if (int_stat == INTERRUPT_RISING) - 2d4: 80 91 02 01 lds r24, 0x0102 ; 0x800102 - 2d8: 81 30 cpi r24, 0x01 ; 1 - 2da: 41 f4 brne .+16 ; 0x2ec <__vector_1+0x32> + 2d2: 80 91 02 01 lds r24, 0x0102 ; 0x800102 + 2d6: 81 30 cpi r24, 0x01 ; 1 + 2d8: 41 f4 brne .+16 ; 0x2ea <__vector_1+0x32> { // set interrupt pin 0 on PORTD to falling edge EICRA = 0x02; - 2dc: 82 e0 ldi r24, 0x02 ; 2 - 2de: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + 2da: 82 e0 ldi r24, 0x02 ; 2 + 2dc: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> // reset the time in timer1 TCNT1 = 0x00; - 2e2: 1d bc out 0x2d, r1 ; 45 - 2e4: 1c bc out 0x2c, r1 ; 44 + 2e0: 1d bc out 0x2d, r1 ; 45 + 2e2: 1c bc out 0x2c, r1 ; 44 // set interrupt status int_stat = INTERRUPT_FALLING; - 2e6: 10 92 02 01 sts 0x0102, r1 ; 0x800102 - 2ea: 0c c0 rjmp .+24 ; 0x304 <__vector_1+0x4a> + 2e4: 10 92 02 01 sts 0x0102, r1 ; 0x800102 + 2e8: 0c c0 rjmp .+24 ; 0x302 <__vector_1+0x4a> } else // else if it was generated on a falling edge (end sending echo) { // set interrupt pin 0 on PORTD to rising edge EICRA = 0x03; - 2ec: 83 e0 ldi r24, 0x03 ; 3 - 2ee: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + 2ea: 83 e0 ldi r24, 0x03 ; 3 + 2ec: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> // read timer1 into time_dist timer_dist = TCNT1; - 2f2: 8c b5 in r24, 0x2c ; 44 - 2f4: 9d b5 in r25, 0x2d ; 45 - 2f6: 90 93 01 01 sts 0x0101, r25 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> - 2fa: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> + 2f0: 8c b5 in r24, 0x2c ; 44 + 2f2: 9d b5 in r25, 0x2d ; 45 + 2f4: 90 93 01 01 sts 0x0101, r25 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> + 2f8: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> // set interrupt status int_stat = INTERRUPT_RISING; - 2fe: 81 e0 ldi r24, 0x01 ; 1 - 300: 80 93 02 01 sts 0x0102, r24 ; 0x800102 + 2fc: 81 e0 ldi r24, 0x01 ; 1 + 2fe: 80 93 02 01 sts 0x0102, r24 ; 0x800102 } } - 304: 9f 91 pop r25 - 306: 8f 91 pop r24 - 308: 0f 90 pop r0 - 30a: 0f be out 0x3f, r0 ; 63 - 30c: 0f 90 pop r0 - 30e: 1f 90 pop r1 - 310: 18 95 reti + 302: 9f 91 pop r25 + 304: 8f 91 pop r24 + 306: 0f 90 pop r0 + 308: 0f be out 0x3f, r0 ; 63 + 30a: 0f 90 pop r0 + 30c: 1f 90 pop r1 + 30e: 18 95 reti -00000312
: +00000310
: int main(void) { DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug - 312: 8f ef ldi r24, 0xFF ; 255 - 314: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> + 310: 8f ef ldi r24, 0xFF ; 255 + 312: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt - 318: 11 ba out 0x11, r1 ; 17 + 316: 11 ba out 0x11, r1 ; 17 - EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge - 31a: ea e6 ldi r30, 0x6A ; 106 - 31c: f0 e0 ldi r31, 0x00 ; 0 - 31e: 80 81 ld r24, Z - 320: 83 60 ori r24, 0x03 ; 3 - 322: 80 83 st Z, r24 + EICRA = 0x03; // interrupt PORTD on pin 0, rising edge + 318: 83 e0 ldi r24, 0x03 ; 3 + 31a: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) - 324: 89 b7 in r24, 0x39 ; 57 - 326: 81 60 ori r24, 0x01 ; 1 - 328: 89 bf out 0x39, r24 ; 57 + 31e: 89 b7 in r24, 0x39 ; 57 + 320: 81 60 ori r24, 0x01 ; 1 + 322: 89 bf out 0x39, r24 ; 57 TCCR1A = 0b00000000; // initialize timer1, prescaler=256 - 32a: 1f bc out 0x2f, r1 ; 47 + 324: 1f bc out 0x2f, r1 ; 47 TCCR1B = 0b00001100; // CTC compare A, RUN - 32c: 8c e0 ldi r24, 0x0C ; 12 - 32e: 8e bd out 0x2e, r24 ; 46 + 326: 8c e0 ldi r24, 0x0C ; 12 + 328: 8e bd out 0x2e, r24 ; 46 sei(); // turn on interrupt system - 330: 78 94 sei + 32a: 78 94 sei init_4bits_mode(); - 332: 17 df rcall .-466 ; 0x162 - 334: 8f e4 ldi r24, 0x4F ; 79 - 336: 93 ec ldi r25, 0xC3 ; 195 - 338: 01 97 sbiw r24, 0x01 ; 1 - 33a: f1 f7 brne .-4 ; 0x338 - 33c: 00 c0 rjmp .+0 ; 0x33e + 32c: 1a df rcall .-460 ; 0x162 + 32e: 8f e4 ldi r24, 0x4F ; 79 + 330: 93 ec ldi r25, 0xC3 ; 195 + 332: 01 97 sbiw r24, 0x01 ; 1 + 334: f1 f7 brne .-4 ; 0x332 + 336: 00 c0 rjmp .+0 ; 0x338 _delay_ms(10); lcd_clear(); - 33e: 00 00 nop + 338: 00 00 nop while (1) { ultrasonic_send_pulse(); - 340: 05 df rcall .-502 ; 0x14c - 342: ae df rcall .-164 ; 0x2a0 + 33a: 08 df rcall .-496 ; 0x14c + 33c: b0 df rcall .-160 ; 0x29e int distance = timer_dist * 340 / 2; lcd_clear(); - 344: 03 df rcall .-506 ; 0x14c - 346: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> + 33e: 06 df rcall .-500 ; 0x14c + 340: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> lcd_write_int(timer_dist); - 34a: 90 91 01 01 lds r25, 0x0101 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> - 34e: 34 df rcall .-408 ; 0x1b8 + 344: 90 91 01 01 lds r25, 0x0101 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> + 348: 36 df rcall .-404 ; 0x1b6 wait_ms(100); - 350: 84 e6 ldi r24, 0x64 ; 100 - 352: 90 e0 ldi r25, 0x00 ; 0 - 354: 96 df rcall .-212 ; 0x282 - 356: f5 cf rjmp .-22 ; 0x342 + 34a: 84 e6 ldi r24, 0x64 ; 100 + 34c: 90 e0 ldi r25, 0x00 ; 0 + 34e: 98 df rcall .-208 ; 0x280 + 350: f5 cf rjmp .-22 ; 0x33c -00000358 : - 358: 0f 93 push r16 - 35a: 1f 93 push r17 - 35c: cf 93 push r28 - 35e: df 93 push r29 - 360: cd b7 in r28, 0x3d ; 61 - 362: de b7 in r29, 0x3e ; 62 - 364: 2e 97 sbiw r28, 0x0e ; 14 - 366: 0f b6 in r0, 0x3f ; 63 - 368: f8 94 cli - 36a: de bf out 0x3e, r29 ; 62 - 36c: 0f be out 0x3f, r0 ; 63 - 36e: cd bf out 0x3d, r28 ; 61 - 370: 0d 89 ldd r16, Y+21 ; 0x15 - 372: 1e 89 ldd r17, Y+22 ; 0x16 - 374: 8f 89 ldd r24, Y+23 ; 0x17 - 376: 98 8d ldd r25, Y+24 ; 0x18 - 378: 26 e0 ldi r18, 0x06 ; 6 - 37a: 2c 83 std Y+4, r18 ; 0x04 - 37c: 1a 83 std Y+2, r17 ; 0x02 - 37e: 09 83 std Y+1, r16 ; 0x01 - 380: 97 ff sbrs r25, 7 - 382: 02 c0 rjmp .+4 ; 0x388 - 384: 80 e0 ldi r24, 0x00 ; 0 - 386: 90 e8 ldi r25, 0x80 ; 128 - 388: 01 97 sbiw r24, 0x01 ; 1 - 38a: 9e 83 std Y+6, r25 ; 0x06 - 38c: 8d 83 std Y+5, r24 ; 0x05 - 38e: ae 01 movw r20, r28 - 390: 45 5e subi r20, 0xE5 ; 229 - 392: 5f 4f sbci r21, 0xFF ; 255 - 394: 69 8d ldd r22, Y+25 ; 0x19 - 396: 7a 8d ldd r23, Y+26 ; 0x1a - 398: ce 01 movw r24, r28 - 39a: 01 96 adiw r24, 0x01 ; 1 - 39c: 19 d0 rcall .+50 ; 0x3d0 - 39e: 4d 81 ldd r20, Y+5 ; 0x05 - 3a0: 5e 81 ldd r21, Y+6 ; 0x06 - 3a2: 57 fd sbrc r21, 7 - 3a4: 0a c0 rjmp .+20 ; 0x3ba - 3a6: 2f 81 ldd r18, Y+7 ; 0x07 - 3a8: 38 85 ldd r19, Y+8 ; 0x08 - 3aa: 42 17 cp r20, r18 - 3ac: 53 07 cpc r21, r19 - 3ae: 0c f4 brge .+2 ; 0x3b2 - 3b0: 9a 01 movw r18, r20 - 3b2: f8 01 movw r30, r16 - 3b4: e2 0f add r30, r18 - 3b6: f3 1f adc r31, r19 - 3b8: 10 82 st Z, r1 - 3ba: 2e 96 adiw r28, 0x0e ; 14 - 3bc: 0f b6 in r0, 0x3f ; 63 - 3be: f8 94 cli - 3c0: de bf out 0x3e, r29 ; 62 - 3c2: 0f be out 0x3f, r0 ; 63 - 3c4: cd bf out 0x3d, r28 ; 61 - 3c6: df 91 pop r29 - 3c8: cf 91 pop r28 - 3ca: 1f 91 pop r17 - 3cc: 0f 91 pop r16 - 3ce: 08 95 ret +00000352 : + 352: 0f 93 push r16 + 354: 1f 93 push r17 + 356: cf 93 push r28 + 358: df 93 push r29 + 35a: cd b7 in r28, 0x3d ; 61 + 35c: de b7 in r29, 0x3e ; 62 + 35e: 2e 97 sbiw r28, 0x0e ; 14 + 360: 0f b6 in r0, 0x3f ; 63 + 362: f8 94 cli + 364: de bf out 0x3e, r29 ; 62 + 366: 0f be out 0x3f, r0 ; 63 + 368: cd bf out 0x3d, r28 ; 61 + 36a: 0d 89 ldd r16, Y+21 ; 0x15 + 36c: 1e 89 ldd r17, Y+22 ; 0x16 + 36e: 8f 89 ldd r24, Y+23 ; 0x17 + 370: 98 8d ldd r25, Y+24 ; 0x18 + 372: 26 e0 ldi r18, 0x06 ; 6 + 374: 2c 83 std Y+4, r18 ; 0x04 + 376: 1a 83 std Y+2, r17 ; 0x02 + 378: 09 83 std Y+1, r16 ; 0x01 + 37a: 97 ff sbrs r25, 7 + 37c: 02 c0 rjmp .+4 ; 0x382 + 37e: 80 e0 ldi r24, 0x00 ; 0 + 380: 90 e8 ldi r25, 0x80 ; 128 + 382: 01 97 sbiw r24, 0x01 ; 1 + 384: 9e 83 std Y+6, r25 ; 0x06 + 386: 8d 83 std Y+5, r24 ; 0x05 + 388: ae 01 movw r20, r28 + 38a: 45 5e subi r20, 0xE5 ; 229 + 38c: 5f 4f sbci r21, 0xFF ; 255 + 38e: 69 8d ldd r22, Y+25 ; 0x19 + 390: 7a 8d ldd r23, Y+26 ; 0x1a + 392: ce 01 movw r24, r28 + 394: 01 96 adiw r24, 0x01 ; 1 + 396: 19 d0 rcall .+50 ; 0x3ca + 398: 4d 81 ldd r20, Y+5 ; 0x05 + 39a: 5e 81 ldd r21, Y+6 ; 0x06 + 39c: 57 fd sbrc r21, 7 + 39e: 0a c0 rjmp .+20 ; 0x3b4 + 3a0: 2f 81 ldd r18, Y+7 ; 0x07 + 3a2: 38 85 ldd r19, Y+8 ; 0x08 + 3a4: 42 17 cp r20, r18 + 3a6: 53 07 cpc r21, r19 + 3a8: 0c f4 brge .+2 ; 0x3ac + 3aa: 9a 01 movw r18, r20 + 3ac: f8 01 movw r30, r16 + 3ae: e2 0f add r30, r18 + 3b0: f3 1f adc r31, r19 + 3b2: 10 82 st Z, r1 + 3b4: 2e 96 adiw r28, 0x0e ; 14 + 3b6: 0f b6 in r0, 0x3f ; 63 + 3b8: f8 94 cli + 3ba: de bf out 0x3e, r29 ; 62 + 3bc: 0f be out 0x3f, r0 ; 63 + 3be: cd bf out 0x3d, r28 ; 61 + 3c0: df 91 pop r29 + 3c2: cf 91 pop r28 + 3c4: 1f 91 pop r17 + 3c6: 0f 91 pop r16 + 3c8: 08 95 ret -000003d0 : - 3d0: 2f 92 push r2 - 3d2: 3f 92 push r3 - 3d4: 4f 92 push r4 - 3d6: 5f 92 push r5 - 3d8: 6f 92 push r6 - 3da: 7f 92 push r7 - 3dc: 8f 92 push r8 - 3de: 9f 92 push r9 - 3e0: af 92 push r10 - 3e2: bf 92 push r11 - 3e4: cf 92 push r12 - 3e6: df 92 push r13 - 3e8: ef 92 push r14 - 3ea: ff 92 push r15 - 3ec: 0f 93 push r16 - 3ee: 1f 93 push r17 - 3f0: cf 93 push r28 - 3f2: df 93 push r29 - 3f4: cd b7 in r28, 0x3d ; 61 - 3f6: de b7 in r29, 0x3e ; 62 - 3f8: 2b 97 sbiw r28, 0x0b ; 11 - 3fa: 0f b6 in r0, 0x3f ; 63 - 3fc: f8 94 cli - 3fe: de bf out 0x3e, r29 ; 62 - 400: 0f be out 0x3f, r0 ; 63 - 402: cd bf out 0x3d, r28 ; 61 - 404: 6c 01 movw r12, r24 - 406: 7b 01 movw r14, r22 - 408: 8a 01 movw r16, r20 - 40a: fc 01 movw r30, r24 - 40c: 17 82 std Z+7, r1 ; 0x07 - 40e: 16 82 std Z+6, r1 ; 0x06 - 410: 83 81 ldd r24, Z+3 ; 0x03 - 412: 81 ff sbrs r24, 1 - 414: bf c1 rjmp .+894 ; 0x794 <__LOCK_REGION_LENGTH__+0x394> - 416: ce 01 movw r24, r28 - 418: 01 96 adiw r24, 0x01 ; 1 - 41a: 3c 01 movw r6, r24 - 41c: f6 01 movw r30, r12 - 41e: 93 81 ldd r25, Z+3 ; 0x03 - 420: f7 01 movw r30, r14 - 422: 93 fd sbrc r25, 3 - 424: 85 91 lpm r24, Z+ - 426: 93 ff sbrs r25, 3 - 428: 81 91 ld r24, Z+ - 42a: 7f 01 movw r14, r30 - 42c: 88 23 and r24, r24 - 42e: 09 f4 brne .+2 ; 0x432 <__LOCK_REGION_LENGTH__+0x32> - 430: ad c1 rjmp .+858 ; 0x78c <__LOCK_REGION_LENGTH__+0x38c> - 432: 85 32 cpi r24, 0x25 ; 37 - 434: 39 f4 brne .+14 ; 0x444 <__LOCK_REGION_LENGTH__+0x44> - 436: 93 fd sbrc r25, 3 - 438: 85 91 lpm r24, Z+ - 43a: 93 ff sbrs r25, 3 - 43c: 81 91 ld r24, Z+ - 43e: 7f 01 movw r14, r30 - 440: 85 32 cpi r24, 0x25 ; 37 - 442: 21 f4 brne .+8 ; 0x44c <__LOCK_REGION_LENGTH__+0x4c> - 444: b6 01 movw r22, r12 - 446: 90 e0 ldi r25, 0x00 ; 0 - 448: d6 d1 rcall .+940 ; 0x7f6 - 44a: e8 cf rjmp .-48 ; 0x41c <__LOCK_REGION_LENGTH__+0x1c> - 44c: 91 2c mov r9, r1 - 44e: 21 2c mov r2, r1 - 450: 31 2c mov r3, r1 - 452: ff e1 ldi r31, 0x1F ; 31 - 454: f3 15 cp r31, r3 - 456: d8 f0 brcs .+54 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e> - 458: 8b 32 cpi r24, 0x2B ; 43 +000003ca : + 3ca: 2f 92 push r2 + 3cc: 3f 92 push r3 + 3ce: 4f 92 push r4 + 3d0: 5f 92 push r5 + 3d2: 6f 92 push r6 + 3d4: 7f 92 push r7 + 3d6: 8f 92 push r8 + 3d8: 9f 92 push r9 + 3da: af 92 push r10 + 3dc: bf 92 push r11 + 3de: cf 92 push r12 + 3e0: df 92 push r13 + 3e2: ef 92 push r14 + 3e4: ff 92 push r15 + 3e6: 0f 93 push r16 + 3e8: 1f 93 push r17 + 3ea: cf 93 push r28 + 3ec: df 93 push r29 + 3ee: cd b7 in r28, 0x3d ; 61 + 3f0: de b7 in r29, 0x3e ; 62 + 3f2: 2b 97 sbiw r28, 0x0b ; 11 + 3f4: 0f b6 in r0, 0x3f ; 63 + 3f6: f8 94 cli + 3f8: de bf out 0x3e, r29 ; 62 + 3fa: 0f be out 0x3f, r0 ; 63 + 3fc: cd bf out 0x3d, r28 ; 61 + 3fe: 6c 01 movw r12, r24 + 400: 7b 01 movw r14, r22 + 402: 8a 01 movw r16, r20 + 404: fc 01 movw r30, r24 + 406: 17 82 std Z+7, r1 ; 0x07 + 408: 16 82 std Z+6, r1 ; 0x06 + 40a: 83 81 ldd r24, Z+3 ; 0x03 + 40c: 81 ff sbrs r24, 1 + 40e: bf c1 rjmp .+894 ; 0x78e <__LOCK_REGION_LENGTH__+0x38e> + 410: ce 01 movw r24, r28 + 412: 01 96 adiw r24, 0x01 ; 1 + 414: 3c 01 movw r6, r24 + 416: f6 01 movw r30, r12 + 418: 93 81 ldd r25, Z+3 ; 0x03 + 41a: f7 01 movw r30, r14 + 41c: 93 fd sbrc r25, 3 + 41e: 85 91 lpm r24, Z+ + 420: 93 ff sbrs r25, 3 + 422: 81 91 ld r24, Z+ + 424: 7f 01 movw r14, r30 + 426: 88 23 and r24, r24 + 428: 09 f4 brne .+2 ; 0x42c <__LOCK_REGION_LENGTH__+0x2c> + 42a: ad c1 rjmp .+858 ; 0x786 <__LOCK_REGION_LENGTH__+0x386> + 42c: 85 32 cpi r24, 0x25 ; 37 + 42e: 39 f4 brne .+14 ; 0x43e <__LOCK_REGION_LENGTH__+0x3e> + 430: 93 fd sbrc r25, 3 + 432: 85 91 lpm r24, Z+ + 434: 93 ff sbrs r25, 3 + 436: 81 91 ld r24, Z+ + 438: 7f 01 movw r14, r30 + 43a: 85 32 cpi r24, 0x25 ; 37 + 43c: 21 f4 brne .+8 ; 0x446 <__LOCK_REGION_LENGTH__+0x46> + 43e: b6 01 movw r22, r12 + 440: 90 e0 ldi r25, 0x00 ; 0 + 442: d6 d1 rcall .+940 ; 0x7f0 + 444: e8 cf rjmp .-48 ; 0x416 <__LOCK_REGION_LENGTH__+0x16> + 446: 91 2c mov r9, r1 + 448: 21 2c mov r2, r1 + 44a: 31 2c mov r3, r1 + 44c: ff e1 ldi r31, 0x1F ; 31 + 44e: f3 15 cp r31, r3 + 450: d8 f0 brcs .+54 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> + 452: 8b 32 cpi r24, 0x2B ; 43 + 454: 79 f0 breq .+30 ; 0x474 <__LOCK_REGION_LENGTH__+0x74> + 456: 38 f4 brcc .+14 ; 0x466 <__LOCK_REGION_LENGTH__+0x66> + 458: 80 32 cpi r24, 0x20 ; 32 45a: 79 f0 breq .+30 ; 0x47a <__LOCK_REGION_LENGTH__+0x7a> - 45c: 38 f4 brcc .+14 ; 0x46c <__LOCK_REGION_LENGTH__+0x6c> - 45e: 80 32 cpi r24, 0x20 ; 32 - 460: 79 f0 breq .+30 ; 0x480 <__LOCK_REGION_LENGTH__+0x80> - 462: 83 32 cpi r24, 0x23 ; 35 - 464: a1 f4 brne .+40 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e> - 466: 23 2d mov r18, r3 - 468: 20 61 ori r18, 0x10 ; 16 - 46a: 1d c0 rjmp .+58 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> - 46c: 8d 32 cpi r24, 0x2D ; 45 - 46e: 61 f0 breq .+24 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> - 470: 80 33 cpi r24, 0x30 ; 48 - 472: 69 f4 brne .+26 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e> - 474: 23 2d mov r18, r3 - 476: 21 60 ori r18, 0x01 ; 1 - 478: 16 c0 rjmp .+44 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> - 47a: 83 2d mov r24, r3 - 47c: 82 60 ori r24, 0x02 ; 2 - 47e: 38 2e mov r3, r24 - 480: e3 2d mov r30, r3 - 482: e4 60 ori r30, 0x04 ; 4 - 484: 3e 2e mov r3, r30 - 486: 2a c0 rjmp .+84 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> - 488: f3 2d mov r31, r3 - 48a: f8 60 ori r31, 0x08 ; 8 - 48c: 1d c0 rjmp .+58 ; 0x4c8 <__LOCK_REGION_LENGTH__+0xc8> - 48e: 37 fc sbrc r3, 7 - 490: 2d c0 rjmp .+90 ; 0x4ec <__LOCK_REGION_LENGTH__+0xec> - 492: 20 ed ldi r18, 0xD0 ; 208 - 494: 28 0f add r18, r24 - 496: 2a 30 cpi r18, 0x0A ; 10 - 498: 40 f0 brcs .+16 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> - 49a: 8e 32 cpi r24, 0x2E ; 46 - 49c: b9 f4 brne .+46 ; 0x4cc <__LOCK_REGION_LENGTH__+0xcc> - 49e: 36 fc sbrc r3, 6 - 4a0: 75 c1 rjmp .+746 ; 0x78c <__LOCK_REGION_LENGTH__+0x38c> - 4a2: 23 2d mov r18, r3 - 4a4: 20 64 ori r18, 0x40 ; 64 - 4a6: 32 2e mov r3, r18 - 4a8: 19 c0 rjmp .+50 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> - 4aa: 36 fe sbrs r3, 6 - 4ac: 06 c0 rjmp .+12 ; 0x4ba <__LOCK_REGION_LENGTH__+0xba> - 4ae: 8a e0 ldi r24, 0x0A ; 10 - 4b0: 98 9e mul r9, r24 - 4b2: 20 0d add r18, r0 - 4b4: 11 24 eor r1, r1 - 4b6: 92 2e mov r9, r18 - 4b8: 11 c0 rjmp .+34 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> - 4ba: ea e0 ldi r30, 0x0A ; 10 - 4bc: 2e 9e mul r2, r30 - 4be: 20 0d add r18, r0 - 4c0: 11 24 eor r1, r1 - 4c2: 22 2e mov r2, r18 - 4c4: f3 2d mov r31, r3 - 4c6: f0 62 ori r31, 0x20 ; 32 - 4c8: 3f 2e mov r3, r31 - 4ca: 08 c0 rjmp .+16 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> - 4cc: 8c 36 cpi r24, 0x6C ; 108 - 4ce: 21 f4 brne .+8 ; 0x4d8 <__LOCK_REGION_LENGTH__+0xd8> - 4d0: 83 2d mov r24, r3 - 4d2: 80 68 ori r24, 0x80 ; 128 - 4d4: 38 2e mov r3, r24 - 4d6: 02 c0 rjmp .+4 ; 0x4dc <__LOCK_REGION_LENGTH__+0xdc> - 4d8: 88 36 cpi r24, 0x68 ; 104 - 4da: 41 f4 brne .+16 ; 0x4ec <__LOCK_REGION_LENGTH__+0xec> - 4dc: f7 01 movw r30, r14 - 4de: 93 fd sbrc r25, 3 - 4e0: 85 91 lpm r24, Z+ - 4e2: 93 ff sbrs r25, 3 - 4e4: 81 91 ld r24, Z+ - 4e6: 7f 01 movw r14, r30 - 4e8: 81 11 cpse r24, r1 - 4ea: b3 cf rjmp .-154 ; 0x452 <__LOCK_REGION_LENGTH__+0x52> - 4ec: 98 2f mov r25, r24 - 4ee: 9f 7d andi r25, 0xDF ; 223 - 4f0: 95 54 subi r25, 0x45 ; 69 - 4f2: 93 30 cpi r25, 0x03 ; 3 - 4f4: 28 f4 brcc .+10 ; 0x500 <__LOCK_REGION_LENGTH__+0x100> - 4f6: 0c 5f subi r16, 0xFC ; 252 - 4f8: 1f 4f sbci r17, 0xFF ; 255 - 4fa: 9f e3 ldi r25, 0x3F ; 63 - 4fc: 99 83 std Y+1, r25 ; 0x01 - 4fe: 0d c0 rjmp .+26 ; 0x51a <__LOCK_REGION_LENGTH__+0x11a> - 500: 83 36 cpi r24, 0x63 ; 99 - 502: 31 f0 breq .+12 ; 0x510 <__LOCK_REGION_LENGTH__+0x110> - 504: 83 37 cpi r24, 0x73 ; 115 - 506: 71 f0 breq .+28 ; 0x524 <__LOCK_REGION_LENGTH__+0x124> - 508: 83 35 cpi r24, 0x53 ; 83 - 50a: 09 f0 breq .+2 ; 0x50e <__LOCK_REGION_LENGTH__+0x10e> - 50c: 55 c0 rjmp .+170 ; 0x5b8 <__LOCK_REGION_LENGTH__+0x1b8> - 50e: 20 c0 rjmp .+64 ; 0x550 <__LOCK_REGION_LENGTH__+0x150> - 510: f8 01 movw r30, r16 - 512: 80 81 ld r24, Z - 514: 89 83 std Y+1, r24 ; 0x01 - 516: 0e 5f subi r16, 0xFE ; 254 - 518: 1f 4f sbci r17, 0xFF ; 255 - 51a: 88 24 eor r8, r8 - 51c: 83 94 inc r8 - 51e: 91 2c mov r9, r1 - 520: 53 01 movw r10, r6 - 522: 12 c0 rjmp .+36 ; 0x548 <__LOCK_REGION_LENGTH__+0x148> - 524: 28 01 movw r4, r16 - 526: f2 e0 ldi r31, 0x02 ; 2 - 528: 4f 0e add r4, r31 - 52a: 51 1c adc r5, r1 - 52c: f8 01 movw r30, r16 - 52e: a0 80 ld r10, Z - 530: b1 80 ldd r11, Z+1 ; 0x01 - 532: 36 fe sbrs r3, 6 - 534: 03 c0 rjmp .+6 ; 0x53c <__LOCK_REGION_LENGTH__+0x13c> - 536: 69 2d mov r22, r9 - 538: 70 e0 ldi r23, 0x00 ; 0 - 53a: 02 c0 rjmp .+4 ; 0x540 <__LOCK_REGION_LENGTH__+0x140> - 53c: 6f ef ldi r22, 0xFF ; 255 - 53e: 7f ef ldi r23, 0xFF ; 255 - 540: c5 01 movw r24, r10 - 542: 4e d1 rcall .+668 ; 0x7e0 - 544: 4c 01 movw r8, r24 - 546: 82 01 movw r16, r4 - 548: f3 2d mov r31, r3 - 54a: ff 77 andi r31, 0x7F ; 127 - 54c: 3f 2e mov r3, r31 - 54e: 15 c0 rjmp .+42 ; 0x57a <__LOCK_REGION_LENGTH__+0x17a> - 550: 28 01 movw r4, r16 - 552: 22 e0 ldi r18, 0x02 ; 2 - 554: 42 0e add r4, r18 - 556: 51 1c adc r5, r1 - 558: f8 01 movw r30, r16 - 55a: a0 80 ld r10, Z - 55c: b1 80 ldd r11, Z+1 ; 0x01 - 55e: 36 fe sbrs r3, 6 - 560: 03 c0 rjmp .+6 ; 0x568 <__LOCK_REGION_LENGTH__+0x168> - 562: 69 2d mov r22, r9 - 564: 70 e0 ldi r23, 0x00 ; 0 - 566: 02 c0 rjmp .+4 ; 0x56c <__LOCK_REGION_LENGTH__+0x16c> - 568: 6f ef ldi r22, 0xFF ; 255 - 56a: 7f ef ldi r23, 0xFF ; 255 - 56c: c5 01 movw r24, r10 - 56e: 2d d1 rcall .+602 ; 0x7ca - 570: 4c 01 movw r8, r24 - 572: f3 2d mov r31, r3 - 574: f0 68 ori r31, 0x80 ; 128 - 576: 3f 2e mov r3, r31 - 578: 82 01 movw r16, r4 - 57a: 33 fc sbrc r3, 3 - 57c: 19 c0 rjmp .+50 ; 0x5b0 <__LOCK_REGION_LENGTH__+0x1b0> - 57e: 82 2d mov r24, r2 - 580: 90 e0 ldi r25, 0x00 ; 0 - 582: 88 16 cp r8, r24 - 584: 99 06 cpc r9, r25 - 586: a0 f4 brcc .+40 ; 0x5b0 <__LOCK_REGION_LENGTH__+0x1b0> - 588: b6 01 movw r22, r12 - 58a: 80 e2 ldi r24, 0x20 ; 32 - 58c: 90 e0 ldi r25, 0x00 ; 0 - 58e: 33 d1 rcall .+614 ; 0x7f6 - 590: 2a 94 dec r2 - 592: f5 cf rjmp .-22 ; 0x57e <__LOCK_REGION_LENGTH__+0x17e> - 594: f5 01 movw r30, r10 - 596: 37 fc sbrc r3, 7 - 598: 85 91 lpm r24, Z+ - 59a: 37 fe sbrs r3, 7 - 59c: 81 91 ld r24, Z+ - 59e: 5f 01 movw r10, r30 - 5a0: b6 01 movw r22, r12 - 5a2: 90 e0 ldi r25, 0x00 ; 0 - 5a4: 28 d1 rcall .+592 ; 0x7f6 - 5a6: 21 10 cpse r2, r1 - 5a8: 2a 94 dec r2 - 5aa: 21 e0 ldi r18, 0x01 ; 1 - 5ac: 82 1a sub r8, r18 - 5ae: 91 08 sbc r9, r1 - 5b0: 81 14 cp r8, r1 - 5b2: 91 04 cpc r9, r1 - 5b4: 79 f7 brne .-34 ; 0x594 <__LOCK_REGION_LENGTH__+0x194> - 5b6: e1 c0 rjmp .+450 ; 0x77a <__LOCK_REGION_LENGTH__+0x37a> - 5b8: 84 36 cpi r24, 0x64 ; 100 - 5ba: 11 f0 breq .+4 ; 0x5c0 <__LOCK_REGION_LENGTH__+0x1c0> - 5bc: 89 36 cpi r24, 0x69 ; 105 - 5be: 39 f5 brne .+78 ; 0x60e <__LOCK_REGION_LENGTH__+0x20e> - 5c0: f8 01 movw r30, r16 - 5c2: 37 fe sbrs r3, 7 - 5c4: 07 c0 rjmp .+14 ; 0x5d4 <__LOCK_REGION_LENGTH__+0x1d4> - 5c6: 60 81 ld r22, Z - 5c8: 71 81 ldd r23, Z+1 ; 0x01 - 5ca: 82 81 ldd r24, Z+2 ; 0x02 - 5cc: 93 81 ldd r25, Z+3 ; 0x03 - 5ce: 0c 5f subi r16, 0xFC ; 252 - 5d0: 1f 4f sbci r17, 0xFF ; 255 - 5d2: 08 c0 rjmp .+16 ; 0x5e4 <__LOCK_REGION_LENGTH__+0x1e4> - 5d4: 60 81 ld r22, Z - 5d6: 71 81 ldd r23, Z+1 ; 0x01 - 5d8: 07 2e mov r0, r23 - 5da: 00 0c add r0, r0 - 5dc: 88 0b sbc r24, r24 - 5de: 99 0b sbc r25, r25 - 5e0: 0e 5f subi r16, 0xFE ; 254 - 5e2: 1f 4f sbci r17, 0xFF ; 255 - 5e4: f3 2d mov r31, r3 - 5e6: ff 76 andi r31, 0x6F ; 111 - 5e8: 3f 2e mov r3, r31 - 5ea: 97 ff sbrs r25, 7 - 5ec: 09 c0 rjmp .+18 ; 0x600 <__LOCK_REGION_LENGTH__+0x200> - 5ee: 90 95 com r25 - 5f0: 80 95 com r24 - 5f2: 70 95 com r23 - 5f4: 61 95 neg r22 - 5f6: 7f 4f sbci r23, 0xFF ; 255 - 5f8: 8f 4f sbci r24, 0xFF ; 255 - 5fa: 9f 4f sbci r25, 0xFF ; 255 - 5fc: f0 68 ori r31, 0x80 ; 128 - 5fe: 3f 2e mov r3, r31 - 600: 2a e0 ldi r18, 0x0A ; 10 - 602: 30 e0 ldi r19, 0x00 ; 0 - 604: a3 01 movw r20, r6 - 606: 33 d1 rcall .+614 ; 0x86e <__ultoa_invert> - 608: 88 2e mov r8, r24 - 60a: 86 18 sub r8, r6 - 60c: 44 c0 rjmp .+136 ; 0x696 <__LOCK_REGION_LENGTH__+0x296> - 60e: 85 37 cpi r24, 0x75 ; 117 - 610: 31 f4 brne .+12 ; 0x61e <__LOCK_REGION_LENGTH__+0x21e> - 612: 23 2d mov r18, r3 - 614: 2f 7e andi r18, 0xEF ; 239 - 616: b2 2e mov r11, r18 - 618: 2a e0 ldi r18, 0x0A ; 10 - 61a: 30 e0 ldi r19, 0x00 ; 0 - 61c: 25 c0 rjmp .+74 ; 0x668 <__LOCK_REGION_LENGTH__+0x268> - 61e: 93 2d mov r25, r3 - 620: 99 7f andi r25, 0xF9 ; 249 - 622: b9 2e mov r11, r25 - 624: 8f 36 cpi r24, 0x6F ; 111 - 626: c1 f0 breq .+48 ; 0x658 <__LOCK_REGION_LENGTH__+0x258> - 628: 18 f4 brcc .+6 ; 0x630 <__LOCK_REGION_LENGTH__+0x230> - 62a: 88 35 cpi r24, 0x58 ; 88 - 62c: 79 f0 breq .+30 ; 0x64c <__LOCK_REGION_LENGTH__+0x24c> - 62e: ae c0 rjmp .+348 ; 0x78c <__LOCK_REGION_LENGTH__+0x38c> - 630: 80 37 cpi r24, 0x70 ; 112 - 632: 19 f0 breq .+6 ; 0x63a <__LOCK_REGION_LENGTH__+0x23a> - 634: 88 37 cpi r24, 0x78 ; 120 - 636: 21 f0 breq .+8 ; 0x640 <__LOCK_REGION_LENGTH__+0x240> - 638: a9 c0 rjmp .+338 ; 0x78c <__LOCK_REGION_LENGTH__+0x38c> - 63a: e9 2f mov r30, r25 - 63c: e0 61 ori r30, 0x10 ; 16 - 63e: be 2e mov r11, r30 - 640: b4 fe sbrs r11, 4 - 642: 0d c0 rjmp .+26 ; 0x65e <__LOCK_REGION_LENGTH__+0x25e> - 644: fb 2d mov r31, r11 - 646: f4 60 ori r31, 0x04 ; 4 - 648: bf 2e mov r11, r31 - 64a: 09 c0 rjmp .+18 ; 0x65e <__LOCK_REGION_LENGTH__+0x25e> - 64c: 34 fe sbrs r3, 4 - 64e: 0a c0 rjmp .+20 ; 0x664 <__LOCK_REGION_LENGTH__+0x264> - 650: 29 2f mov r18, r25 - 652: 26 60 ori r18, 0x06 ; 6 - 654: b2 2e mov r11, r18 - 656: 06 c0 rjmp .+12 ; 0x664 <__LOCK_REGION_LENGTH__+0x264> - 658: 28 e0 ldi r18, 0x08 ; 8 + 45c: 83 32 cpi r24, 0x23 ; 35 + 45e: a1 f4 brne .+40 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> + 460: 23 2d mov r18, r3 + 462: 20 61 ori r18, 0x10 ; 16 + 464: 1d c0 rjmp .+58 ; 0x4a0 <__LOCK_REGION_LENGTH__+0xa0> + 466: 8d 32 cpi r24, 0x2D ; 45 + 468: 61 f0 breq .+24 ; 0x482 <__LOCK_REGION_LENGTH__+0x82> + 46a: 80 33 cpi r24, 0x30 ; 48 + 46c: 69 f4 brne .+26 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> + 46e: 23 2d mov r18, r3 + 470: 21 60 ori r18, 0x01 ; 1 + 472: 16 c0 rjmp .+44 ; 0x4a0 <__LOCK_REGION_LENGTH__+0xa0> + 474: 83 2d mov r24, r3 + 476: 82 60 ori r24, 0x02 ; 2 + 478: 38 2e mov r3, r24 + 47a: e3 2d mov r30, r3 + 47c: e4 60 ori r30, 0x04 ; 4 + 47e: 3e 2e mov r3, r30 + 480: 2a c0 rjmp .+84 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> + 482: f3 2d mov r31, r3 + 484: f8 60 ori r31, 0x08 ; 8 + 486: 1d c0 rjmp .+58 ; 0x4c2 <__LOCK_REGION_LENGTH__+0xc2> + 488: 37 fc sbrc r3, 7 + 48a: 2d c0 rjmp .+90 ; 0x4e6 <__LOCK_REGION_LENGTH__+0xe6> + 48c: 20 ed ldi r18, 0xD0 ; 208 + 48e: 28 0f add r18, r24 + 490: 2a 30 cpi r18, 0x0A ; 10 + 492: 40 f0 brcs .+16 ; 0x4a4 <__LOCK_REGION_LENGTH__+0xa4> + 494: 8e 32 cpi r24, 0x2E ; 46 + 496: b9 f4 brne .+46 ; 0x4c6 <__LOCK_REGION_LENGTH__+0xc6> + 498: 36 fc sbrc r3, 6 + 49a: 75 c1 rjmp .+746 ; 0x786 <__LOCK_REGION_LENGTH__+0x386> + 49c: 23 2d mov r18, r3 + 49e: 20 64 ori r18, 0x40 ; 64 + 4a0: 32 2e mov r3, r18 + 4a2: 19 c0 rjmp .+50 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> + 4a4: 36 fe sbrs r3, 6 + 4a6: 06 c0 rjmp .+12 ; 0x4b4 <__LOCK_REGION_LENGTH__+0xb4> + 4a8: 8a e0 ldi r24, 0x0A ; 10 + 4aa: 98 9e mul r9, r24 + 4ac: 20 0d add r18, r0 + 4ae: 11 24 eor r1, r1 + 4b0: 92 2e mov r9, r18 + 4b2: 11 c0 rjmp .+34 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> + 4b4: ea e0 ldi r30, 0x0A ; 10 + 4b6: 2e 9e mul r2, r30 + 4b8: 20 0d add r18, r0 + 4ba: 11 24 eor r1, r1 + 4bc: 22 2e mov r2, r18 + 4be: f3 2d mov r31, r3 + 4c0: f0 62 ori r31, 0x20 ; 32 + 4c2: 3f 2e mov r3, r31 + 4c4: 08 c0 rjmp .+16 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> + 4c6: 8c 36 cpi r24, 0x6C ; 108 + 4c8: 21 f4 brne .+8 ; 0x4d2 <__LOCK_REGION_LENGTH__+0xd2> + 4ca: 83 2d mov r24, r3 + 4cc: 80 68 ori r24, 0x80 ; 128 + 4ce: 38 2e mov r3, r24 + 4d0: 02 c0 rjmp .+4 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> + 4d2: 88 36 cpi r24, 0x68 ; 104 + 4d4: 41 f4 brne .+16 ; 0x4e6 <__LOCK_REGION_LENGTH__+0xe6> + 4d6: f7 01 movw r30, r14 + 4d8: 93 fd sbrc r25, 3 + 4da: 85 91 lpm r24, Z+ + 4dc: 93 ff sbrs r25, 3 + 4de: 81 91 ld r24, Z+ + 4e0: 7f 01 movw r14, r30 + 4e2: 81 11 cpse r24, r1 + 4e4: b3 cf rjmp .-154 ; 0x44c <__LOCK_REGION_LENGTH__+0x4c> + 4e6: 98 2f mov r25, r24 + 4e8: 9f 7d andi r25, 0xDF ; 223 + 4ea: 95 54 subi r25, 0x45 ; 69 + 4ec: 93 30 cpi r25, 0x03 ; 3 + 4ee: 28 f4 brcc .+10 ; 0x4fa <__LOCK_REGION_LENGTH__+0xfa> + 4f0: 0c 5f subi r16, 0xFC ; 252 + 4f2: 1f 4f sbci r17, 0xFF ; 255 + 4f4: 9f e3 ldi r25, 0x3F ; 63 + 4f6: 99 83 std Y+1, r25 ; 0x01 + 4f8: 0d c0 rjmp .+26 ; 0x514 <__LOCK_REGION_LENGTH__+0x114> + 4fa: 83 36 cpi r24, 0x63 ; 99 + 4fc: 31 f0 breq .+12 ; 0x50a <__LOCK_REGION_LENGTH__+0x10a> + 4fe: 83 37 cpi r24, 0x73 ; 115 + 500: 71 f0 breq .+28 ; 0x51e <__LOCK_REGION_LENGTH__+0x11e> + 502: 83 35 cpi r24, 0x53 ; 83 + 504: 09 f0 breq .+2 ; 0x508 <__LOCK_REGION_LENGTH__+0x108> + 506: 55 c0 rjmp .+170 ; 0x5b2 <__LOCK_REGION_LENGTH__+0x1b2> + 508: 20 c0 rjmp .+64 ; 0x54a <__LOCK_REGION_LENGTH__+0x14a> + 50a: f8 01 movw r30, r16 + 50c: 80 81 ld r24, Z + 50e: 89 83 std Y+1, r24 ; 0x01 + 510: 0e 5f subi r16, 0xFE ; 254 + 512: 1f 4f sbci r17, 0xFF ; 255 + 514: 88 24 eor r8, r8 + 516: 83 94 inc r8 + 518: 91 2c mov r9, r1 + 51a: 53 01 movw r10, r6 + 51c: 12 c0 rjmp .+36 ; 0x542 <__LOCK_REGION_LENGTH__+0x142> + 51e: 28 01 movw r4, r16 + 520: f2 e0 ldi r31, 0x02 ; 2 + 522: 4f 0e add r4, r31 + 524: 51 1c adc r5, r1 + 526: f8 01 movw r30, r16 + 528: a0 80 ld r10, Z + 52a: b1 80 ldd r11, Z+1 ; 0x01 + 52c: 36 fe sbrs r3, 6 + 52e: 03 c0 rjmp .+6 ; 0x536 <__LOCK_REGION_LENGTH__+0x136> + 530: 69 2d mov r22, r9 + 532: 70 e0 ldi r23, 0x00 ; 0 + 534: 02 c0 rjmp .+4 ; 0x53a <__LOCK_REGION_LENGTH__+0x13a> + 536: 6f ef ldi r22, 0xFF ; 255 + 538: 7f ef ldi r23, 0xFF ; 255 + 53a: c5 01 movw r24, r10 + 53c: 4e d1 rcall .+668 ; 0x7da + 53e: 4c 01 movw r8, r24 + 540: 82 01 movw r16, r4 + 542: f3 2d mov r31, r3 + 544: ff 77 andi r31, 0x7F ; 127 + 546: 3f 2e mov r3, r31 + 548: 15 c0 rjmp .+42 ; 0x574 <__LOCK_REGION_LENGTH__+0x174> + 54a: 28 01 movw r4, r16 + 54c: 22 e0 ldi r18, 0x02 ; 2 + 54e: 42 0e add r4, r18 + 550: 51 1c adc r5, r1 + 552: f8 01 movw r30, r16 + 554: a0 80 ld r10, Z + 556: b1 80 ldd r11, Z+1 ; 0x01 + 558: 36 fe sbrs r3, 6 + 55a: 03 c0 rjmp .+6 ; 0x562 <__LOCK_REGION_LENGTH__+0x162> + 55c: 69 2d mov r22, r9 + 55e: 70 e0 ldi r23, 0x00 ; 0 + 560: 02 c0 rjmp .+4 ; 0x566 <__LOCK_REGION_LENGTH__+0x166> + 562: 6f ef ldi r22, 0xFF ; 255 + 564: 7f ef ldi r23, 0xFF ; 255 + 566: c5 01 movw r24, r10 + 568: 2d d1 rcall .+602 ; 0x7c4 + 56a: 4c 01 movw r8, r24 + 56c: f3 2d mov r31, r3 + 56e: f0 68 ori r31, 0x80 ; 128 + 570: 3f 2e mov r3, r31 + 572: 82 01 movw r16, r4 + 574: 33 fc sbrc r3, 3 + 576: 19 c0 rjmp .+50 ; 0x5aa <__LOCK_REGION_LENGTH__+0x1aa> + 578: 82 2d mov r24, r2 + 57a: 90 e0 ldi r25, 0x00 ; 0 + 57c: 88 16 cp r8, r24 + 57e: 99 06 cpc r9, r25 + 580: a0 f4 brcc .+40 ; 0x5aa <__LOCK_REGION_LENGTH__+0x1aa> + 582: b6 01 movw r22, r12 + 584: 80 e2 ldi r24, 0x20 ; 32 + 586: 90 e0 ldi r25, 0x00 ; 0 + 588: 33 d1 rcall .+614 ; 0x7f0 + 58a: 2a 94 dec r2 + 58c: f5 cf rjmp .-22 ; 0x578 <__LOCK_REGION_LENGTH__+0x178> + 58e: f5 01 movw r30, r10 + 590: 37 fc sbrc r3, 7 + 592: 85 91 lpm r24, Z+ + 594: 37 fe sbrs r3, 7 + 596: 81 91 ld r24, Z+ + 598: 5f 01 movw r10, r30 + 59a: b6 01 movw r22, r12 + 59c: 90 e0 ldi r25, 0x00 ; 0 + 59e: 28 d1 rcall .+592 ; 0x7f0 + 5a0: 21 10 cpse r2, r1 + 5a2: 2a 94 dec r2 + 5a4: 21 e0 ldi r18, 0x01 ; 1 + 5a6: 82 1a sub r8, r18 + 5a8: 91 08 sbc r9, r1 + 5aa: 81 14 cp r8, r1 + 5ac: 91 04 cpc r9, r1 + 5ae: 79 f7 brne .-34 ; 0x58e <__LOCK_REGION_LENGTH__+0x18e> + 5b0: e1 c0 rjmp .+450 ; 0x774 <__LOCK_REGION_LENGTH__+0x374> + 5b2: 84 36 cpi r24, 0x64 ; 100 + 5b4: 11 f0 breq .+4 ; 0x5ba <__LOCK_REGION_LENGTH__+0x1ba> + 5b6: 89 36 cpi r24, 0x69 ; 105 + 5b8: 39 f5 brne .+78 ; 0x608 <__LOCK_REGION_LENGTH__+0x208> + 5ba: f8 01 movw r30, r16 + 5bc: 37 fe sbrs r3, 7 + 5be: 07 c0 rjmp .+14 ; 0x5ce <__LOCK_REGION_LENGTH__+0x1ce> + 5c0: 60 81 ld r22, Z + 5c2: 71 81 ldd r23, Z+1 ; 0x01 + 5c4: 82 81 ldd r24, Z+2 ; 0x02 + 5c6: 93 81 ldd r25, Z+3 ; 0x03 + 5c8: 0c 5f subi r16, 0xFC ; 252 + 5ca: 1f 4f sbci r17, 0xFF ; 255 + 5cc: 08 c0 rjmp .+16 ; 0x5de <__LOCK_REGION_LENGTH__+0x1de> + 5ce: 60 81 ld r22, Z + 5d0: 71 81 ldd r23, Z+1 ; 0x01 + 5d2: 07 2e mov r0, r23 + 5d4: 00 0c add r0, r0 + 5d6: 88 0b sbc r24, r24 + 5d8: 99 0b sbc r25, r25 + 5da: 0e 5f subi r16, 0xFE ; 254 + 5dc: 1f 4f sbci r17, 0xFF ; 255 + 5de: f3 2d mov r31, r3 + 5e0: ff 76 andi r31, 0x6F ; 111 + 5e2: 3f 2e mov r3, r31 + 5e4: 97 ff sbrs r25, 7 + 5e6: 09 c0 rjmp .+18 ; 0x5fa <__LOCK_REGION_LENGTH__+0x1fa> + 5e8: 90 95 com r25 + 5ea: 80 95 com r24 + 5ec: 70 95 com r23 + 5ee: 61 95 neg r22 + 5f0: 7f 4f sbci r23, 0xFF ; 255 + 5f2: 8f 4f sbci r24, 0xFF ; 255 + 5f4: 9f 4f sbci r25, 0xFF ; 255 + 5f6: f0 68 ori r31, 0x80 ; 128 + 5f8: 3f 2e mov r3, r31 + 5fa: 2a e0 ldi r18, 0x0A ; 10 + 5fc: 30 e0 ldi r19, 0x00 ; 0 + 5fe: a3 01 movw r20, r6 + 600: 33 d1 rcall .+614 ; 0x868 <__ultoa_invert> + 602: 88 2e mov r8, r24 + 604: 86 18 sub r8, r6 + 606: 44 c0 rjmp .+136 ; 0x690 <__LOCK_REGION_LENGTH__+0x290> + 608: 85 37 cpi r24, 0x75 ; 117 + 60a: 31 f4 brne .+12 ; 0x618 <__LOCK_REGION_LENGTH__+0x218> + 60c: 23 2d mov r18, r3 + 60e: 2f 7e andi r18, 0xEF ; 239 + 610: b2 2e mov r11, r18 + 612: 2a e0 ldi r18, 0x0A ; 10 + 614: 30 e0 ldi r19, 0x00 ; 0 + 616: 25 c0 rjmp .+74 ; 0x662 <__LOCK_REGION_LENGTH__+0x262> + 618: 93 2d mov r25, r3 + 61a: 99 7f andi r25, 0xF9 ; 249 + 61c: b9 2e mov r11, r25 + 61e: 8f 36 cpi r24, 0x6F ; 111 + 620: c1 f0 breq .+48 ; 0x652 <__LOCK_REGION_LENGTH__+0x252> + 622: 18 f4 brcc .+6 ; 0x62a <__LOCK_REGION_LENGTH__+0x22a> + 624: 88 35 cpi r24, 0x58 ; 88 + 626: 79 f0 breq .+30 ; 0x646 <__LOCK_REGION_LENGTH__+0x246> + 628: ae c0 rjmp .+348 ; 0x786 <__LOCK_REGION_LENGTH__+0x386> + 62a: 80 37 cpi r24, 0x70 ; 112 + 62c: 19 f0 breq .+6 ; 0x634 <__LOCK_REGION_LENGTH__+0x234> + 62e: 88 37 cpi r24, 0x78 ; 120 + 630: 21 f0 breq .+8 ; 0x63a <__LOCK_REGION_LENGTH__+0x23a> + 632: a9 c0 rjmp .+338 ; 0x786 <__LOCK_REGION_LENGTH__+0x386> + 634: e9 2f mov r30, r25 + 636: e0 61 ori r30, 0x10 ; 16 + 638: be 2e mov r11, r30 + 63a: b4 fe sbrs r11, 4 + 63c: 0d c0 rjmp .+26 ; 0x658 <__LOCK_REGION_LENGTH__+0x258> + 63e: fb 2d mov r31, r11 + 640: f4 60 ori r31, 0x04 ; 4 + 642: bf 2e mov r11, r31 + 644: 09 c0 rjmp .+18 ; 0x658 <__LOCK_REGION_LENGTH__+0x258> + 646: 34 fe sbrs r3, 4 + 648: 0a c0 rjmp .+20 ; 0x65e <__LOCK_REGION_LENGTH__+0x25e> + 64a: 29 2f mov r18, r25 + 64c: 26 60 ori r18, 0x06 ; 6 + 64e: b2 2e mov r11, r18 + 650: 06 c0 rjmp .+12 ; 0x65e <__LOCK_REGION_LENGTH__+0x25e> + 652: 28 e0 ldi r18, 0x08 ; 8 + 654: 30 e0 ldi r19, 0x00 ; 0 + 656: 05 c0 rjmp .+10 ; 0x662 <__LOCK_REGION_LENGTH__+0x262> + 658: 20 e1 ldi r18, 0x10 ; 16 65a: 30 e0 ldi r19, 0x00 ; 0 - 65c: 05 c0 rjmp .+10 ; 0x668 <__LOCK_REGION_LENGTH__+0x268> + 65c: 02 c0 rjmp .+4 ; 0x662 <__LOCK_REGION_LENGTH__+0x262> 65e: 20 e1 ldi r18, 0x10 ; 16 - 660: 30 e0 ldi r19, 0x00 ; 0 - 662: 02 c0 rjmp .+4 ; 0x668 <__LOCK_REGION_LENGTH__+0x268> - 664: 20 e1 ldi r18, 0x10 ; 16 - 666: 32 e0 ldi r19, 0x02 ; 2 - 668: f8 01 movw r30, r16 - 66a: b7 fe sbrs r11, 7 - 66c: 07 c0 rjmp .+14 ; 0x67c <__LOCK_REGION_LENGTH__+0x27c> - 66e: 60 81 ld r22, Z - 670: 71 81 ldd r23, Z+1 ; 0x01 - 672: 82 81 ldd r24, Z+2 ; 0x02 - 674: 93 81 ldd r25, Z+3 ; 0x03 - 676: 0c 5f subi r16, 0xFC ; 252 - 678: 1f 4f sbci r17, 0xFF ; 255 - 67a: 06 c0 rjmp .+12 ; 0x688 <__LOCK_REGION_LENGTH__+0x288> - 67c: 60 81 ld r22, Z - 67e: 71 81 ldd r23, Z+1 ; 0x01 - 680: 80 e0 ldi r24, 0x00 ; 0 - 682: 90 e0 ldi r25, 0x00 ; 0 - 684: 0e 5f subi r16, 0xFE ; 254 - 686: 1f 4f sbci r17, 0xFF ; 255 - 688: a3 01 movw r20, r6 - 68a: f1 d0 rcall .+482 ; 0x86e <__ultoa_invert> - 68c: 88 2e mov r8, r24 - 68e: 86 18 sub r8, r6 - 690: fb 2d mov r31, r11 - 692: ff 77 andi r31, 0x7F ; 127 - 694: 3f 2e mov r3, r31 - 696: 36 fe sbrs r3, 6 - 698: 0d c0 rjmp .+26 ; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4> - 69a: 23 2d mov r18, r3 - 69c: 2e 7f andi r18, 0xFE ; 254 - 69e: a2 2e mov r10, r18 - 6a0: 89 14 cp r8, r9 - 6a2: 58 f4 brcc .+22 ; 0x6ba <__LOCK_REGION_LENGTH__+0x2ba> - 6a4: 34 fe sbrs r3, 4 - 6a6: 0b c0 rjmp .+22 ; 0x6be <__LOCK_REGION_LENGTH__+0x2be> - 6a8: 32 fc sbrc r3, 2 - 6aa: 09 c0 rjmp .+18 ; 0x6be <__LOCK_REGION_LENGTH__+0x2be> - 6ac: 83 2d mov r24, r3 - 6ae: 8e 7e andi r24, 0xEE ; 238 - 6b0: a8 2e mov r10, r24 - 6b2: 05 c0 rjmp .+10 ; 0x6be <__LOCK_REGION_LENGTH__+0x2be> + 660: 32 e0 ldi r19, 0x02 ; 2 + 662: f8 01 movw r30, r16 + 664: b7 fe sbrs r11, 7 + 666: 07 c0 rjmp .+14 ; 0x676 <__LOCK_REGION_LENGTH__+0x276> + 668: 60 81 ld r22, Z + 66a: 71 81 ldd r23, Z+1 ; 0x01 + 66c: 82 81 ldd r24, Z+2 ; 0x02 + 66e: 93 81 ldd r25, Z+3 ; 0x03 + 670: 0c 5f subi r16, 0xFC ; 252 + 672: 1f 4f sbci r17, 0xFF ; 255 + 674: 06 c0 rjmp .+12 ; 0x682 <__LOCK_REGION_LENGTH__+0x282> + 676: 60 81 ld r22, Z + 678: 71 81 ldd r23, Z+1 ; 0x01 + 67a: 80 e0 ldi r24, 0x00 ; 0 + 67c: 90 e0 ldi r25, 0x00 ; 0 + 67e: 0e 5f subi r16, 0xFE ; 254 + 680: 1f 4f sbci r17, 0xFF ; 255 + 682: a3 01 movw r20, r6 + 684: f1 d0 rcall .+482 ; 0x868 <__ultoa_invert> + 686: 88 2e mov r8, r24 + 688: 86 18 sub r8, r6 + 68a: fb 2d mov r31, r11 + 68c: ff 77 andi r31, 0x7F ; 127 + 68e: 3f 2e mov r3, r31 + 690: 36 fe sbrs r3, 6 + 692: 0d c0 rjmp .+26 ; 0x6ae <__LOCK_REGION_LENGTH__+0x2ae> + 694: 23 2d mov r18, r3 + 696: 2e 7f andi r18, 0xFE ; 254 + 698: a2 2e mov r10, r18 + 69a: 89 14 cp r8, r9 + 69c: 58 f4 brcc .+22 ; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4> + 69e: 34 fe sbrs r3, 4 + 6a0: 0b c0 rjmp .+22 ; 0x6b8 <__LOCK_REGION_LENGTH__+0x2b8> + 6a2: 32 fc sbrc r3, 2 + 6a4: 09 c0 rjmp .+18 ; 0x6b8 <__LOCK_REGION_LENGTH__+0x2b8> + 6a6: 83 2d mov r24, r3 + 6a8: 8e 7e andi r24, 0xEE ; 238 + 6aa: a8 2e mov r10, r24 + 6ac: 05 c0 rjmp .+10 ; 0x6b8 <__LOCK_REGION_LENGTH__+0x2b8> + 6ae: b8 2c mov r11, r8 + 6b0: a3 2c mov r10, r3 + 6b2: 03 c0 rjmp .+6 ; 0x6ba <__LOCK_REGION_LENGTH__+0x2ba> 6b4: b8 2c mov r11, r8 - 6b6: a3 2c mov r10, r3 - 6b8: 03 c0 rjmp .+6 ; 0x6c0 <__LOCK_REGION_LENGTH__+0x2c0> - 6ba: b8 2c mov r11, r8 - 6bc: 01 c0 rjmp .+2 ; 0x6c0 <__LOCK_REGION_LENGTH__+0x2c0> - 6be: b9 2c mov r11, r9 - 6c0: a4 fe sbrs r10, 4 - 6c2: 0f c0 rjmp .+30 ; 0x6e2 <__LOCK_REGION_LENGTH__+0x2e2> - 6c4: fe 01 movw r30, r28 - 6c6: e8 0d add r30, r8 - 6c8: f1 1d adc r31, r1 - 6ca: 80 81 ld r24, Z - 6cc: 80 33 cpi r24, 0x30 ; 48 - 6ce: 21 f4 brne .+8 ; 0x6d8 <__LOCK_REGION_LENGTH__+0x2d8> - 6d0: 9a 2d mov r25, r10 - 6d2: 99 7e andi r25, 0xE9 ; 233 - 6d4: a9 2e mov r10, r25 - 6d6: 09 c0 rjmp .+18 ; 0x6ea <__LOCK_REGION_LENGTH__+0x2ea> - 6d8: a2 fe sbrs r10, 2 - 6da: 06 c0 rjmp .+12 ; 0x6e8 <__LOCK_REGION_LENGTH__+0x2e8> - 6dc: b3 94 inc r11 - 6de: b3 94 inc r11 - 6e0: 04 c0 rjmp .+8 ; 0x6ea <__LOCK_REGION_LENGTH__+0x2ea> - 6e2: 8a 2d mov r24, r10 - 6e4: 86 78 andi r24, 0x86 ; 134 - 6e6: 09 f0 breq .+2 ; 0x6ea <__LOCK_REGION_LENGTH__+0x2ea> - 6e8: b3 94 inc r11 - 6ea: a3 fc sbrc r10, 3 - 6ec: 10 c0 rjmp .+32 ; 0x70e <__LOCK_REGION_LENGTH__+0x30e> - 6ee: a0 fe sbrs r10, 0 - 6f0: 06 c0 rjmp .+12 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> - 6f2: b2 14 cp r11, r2 - 6f4: 80 f4 brcc .+32 ; 0x716 <__LOCK_REGION_LENGTH__+0x316> - 6f6: 28 0c add r2, r8 - 6f8: 92 2c mov r9, r2 - 6fa: 9b 18 sub r9, r11 - 6fc: 0d c0 rjmp .+26 ; 0x718 <__LOCK_REGION_LENGTH__+0x318> - 6fe: b2 14 cp r11, r2 - 700: 58 f4 brcc .+22 ; 0x718 <__LOCK_REGION_LENGTH__+0x318> - 702: b6 01 movw r22, r12 - 704: 80 e2 ldi r24, 0x20 ; 32 - 706: 90 e0 ldi r25, 0x00 ; 0 - 708: 76 d0 rcall .+236 ; 0x7f6 - 70a: b3 94 inc r11 - 70c: f8 cf rjmp .-16 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> - 70e: b2 14 cp r11, r2 - 710: 18 f4 brcc .+6 ; 0x718 <__LOCK_REGION_LENGTH__+0x318> - 712: 2b 18 sub r2, r11 - 714: 02 c0 rjmp .+4 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> - 716: 98 2c mov r9, r8 - 718: 21 2c mov r2, r1 - 71a: a4 fe sbrs r10, 4 - 71c: 0f c0 rjmp .+30 ; 0x73c <__LOCK_REGION_LENGTH__+0x33c> - 71e: b6 01 movw r22, r12 - 720: 80 e3 ldi r24, 0x30 ; 48 - 722: 90 e0 ldi r25, 0x00 ; 0 - 724: 68 d0 rcall .+208 ; 0x7f6 - 726: a2 fe sbrs r10, 2 - 728: 16 c0 rjmp .+44 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> - 72a: a1 fc sbrc r10, 1 - 72c: 03 c0 rjmp .+6 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> - 72e: 88 e7 ldi r24, 0x78 ; 120 + 6b6: 01 c0 rjmp .+2 ; 0x6ba <__LOCK_REGION_LENGTH__+0x2ba> + 6b8: b9 2c mov r11, r9 + 6ba: a4 fe sbrs r10, 4 + 6bc: 0f c0 rjmp .+30 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> + 6be: fe 01 movw r30, r28 + 6c0: e8 0d add r30, r8 + 6c2: f1 1d adc r31, r1 + 6c4: 80 81 ld r24, Z + 6c6: 80 33 cpi r24, 0x30 ; 48 + 6c8: 21 f4 brne .+8 ; 0x6d2 <__LOCK_REGION_LENGTH__+0x2d2> + 6ca: 9a 2d mov r25, r10 + 6cc: 99 7e andi r25, 0xE9 ; 233 + 6ce: a9 2e mov r10, r25 + 6d0: 09 c0 rjmp .+18 ; 0x6e4 <__LOCK_REGION_LENGTH__+0x2e4> + 6d2: a2 fe sbrs r10, 2 + 6d4: 06 c0 rjmp .+12 ; 0x6e2 <__LOCK_REGION_LENGTH__+0x2e2> + 6d6: b3 94 inc r11 + 6d8: b3 94 inc r11 + 6da: 04 c0 rjmp .+8 ; 0x6e4 <__LOCK_REGION_LENGTH__+0x2e4> + 6dc: 8a 2d mov r24, r10 + 6de: 86 78 andi r24, 0x86 ; 134 + 6e0: 09 f0 breq .+2 ; 0x6e4 <__LOCK_REGION_LENGTH__+0x2e4> + 6e2: b3 94 inc r11 + 6e4: a3 fc sbrc r10, 3 + 6e6: 10 c0 rjmp .+32 ; 0x708 <__LOCK_REGION_LENGTH__+0x308> + 6e8: a0 fe sbrs r10, 0 + 6ea: 06 c0 rjmp .+12 ; 0x6f8 <__LOCK_REGION_LENGTH__+0x2f8> + 6ec: b2 14 cp r11, r2 + 6ee: 80 f4 brcc .+32 ; 0x710 <__LOCK_REGION_LENGTH__+0x310> + 6f0: 28 0c add r2, r8 + 6f2: 92 2c mov r9, r2 + 6f4: 9b 18 sub r9, r11 + 6f6: 0d c0 rjmp .+26 ; 0x712 <__LOCK_REGION_LENGTH__+0x312> + 6f8: b2 14 cp r11, r2 + 6fa: 58 f4 brcc .+22 ; 0x712 <__LOCK_REGION_LENGTH__+0x312> + 6fc: b6 01 movw r22, r12 + 6fe: 80 e2 ldi r24, 0x20 ; 32 + 700: 90 e0 ldi r25, 0x00 ; 0 + 702: 76 d0 rcall .+236 ; 0x7f0 + 704: b3 94 inc r11 + 706: f8 cf rjmp .-16 ; 0x6f8 <__LOCK_REGION_LENGTH__+0x2f8> + 708: b2 14 cp r11, r2 + 70a: 18 f4 brcc .+6 ; 0x712 <__LOCK_REGION_LENGTH__+0x312> + 70c: 2b 18 sub r2, r11 + 70e: 02 c0 rjmp .+4 ; 0x714 <__LOCK_REGION_LENGTH__+0x314> + 710: 98 2c mov r9, r8 + 712: 21 2c mov r2, r1 + 714: a4 fe sbrs r10, 4 + 716: 0f c0 rjmp .+30 ; 0x736 <__LOCK_REGION_LENGTH__+0x336> + 718: b6 01 movw r22, r12 + 71a: 80 e3 ldi r24, 0x30 ; 48 + 71c: 90 e0 ldi r25, 0x00 ; 0 + 71e: 68 d0 rcall .+208 ; 0x7f0 + 720: a2 fe sbrs r10, 2 + 722: 16 c0 rjmp .+44 ; 0x750 <__LOCK_REGION_LENGTH__+0x350> + 724: a1 fc sbrc r10, 1 + 726: 03 c0 rjmp .+6 ; 0x72e <__LOCK_REGION_LENGTH__+0x32e> + 728: 88 e7 ldi r24, 0x78 ; 120 + 72a: 90 e0 ldi r25, 0x00 ; 0 + 72c: 02 c0 rjmp .+4 ; 0x732 <__LOCK_REGION_LENGTH__+0x332> + 72e: 88 e5 ldi r24, 0x58 ; 88 730: 90 e0 ldi r25, 0x00 ; 0 - 732: 02 c0 rjmp .+4 ; 0x738 <__LOCK_REGION_LENGTH__+0x338> - 734: 88 e5 ldi r24, 0x58 ; 88 - 736: 90 e0 ldi r25, 0x00 ; 0 - 738: b6 01 movw r22, r12 - 73a: 0c c0 rjmp .+24 ; 0x754 <__LOCK_REGION_LENGTH__+0x354> - 73c: 8a 2d mov r24, r10 - 73e: 86 78 andi r24, 0x86 ; 134 - 740: 51 f0 breq .+20 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> - 742: a1 fe sbrs r10, 1 - 744: 02 c0 rjmp .+4 ; 0x74a <__LOCK_REGION_LENGTH__+0x34a> - 746: 8b e2 ldi r24, 0x2B ; 43 - 748: 01 c0 rjmp .+2 ; 0x74c <__LOCK_REGION_LENGTH__+0x34c> - 74a: 80 e2 ldi r24, 0x20 ; 32 - 74c: a7 fc sbrc r10, 7 - 74e: 8d e2 ldi r24, 0x2D ; 45 - 750: b6 01 movw r22, r12 - 752: 90 e0 ldi r25, 0x00 ; 0 - 754: 50 d0 rcall .+160 ; 0x7f6 - 756: 89 14 cp r8, r9 - 758: 30 f4 brcc .+12 ; 0x766 <__LOCK_REGION_LENGTH__+0x366> - 75a: b6 01 movw r22, r12 - 75c: 80 e3 ldi r24, 0x30 ; 48 - 75e: 90 e0 ldi r25, 0x00 ; 0 - 760: 4a d0 rcall .+148 ; 0x7f6 - 762: 9a 94 dec r9 - 764: f8 cf rjmp .-16 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> - 766: 8a 94 dec r8 - 768: f3 01 movw r30, r6 - 76a: e8 0d add r30, r8 - 76c: f1 1d adc r31, r1 - 76e: 80 81 ld r24, Z - 770: b6 01 movw r22, r12 - 772: 90 e0 ldi r25, 0x00 ; 0 - 774: 40 d0 rcall .+128 ; 0x7f6 - 776: 81 10 cpse r8, r1 - 778: f6 cf rjmp .-20 ; 0x766 <__LOCK_REGION_LENGTH__+0x366> - 77a: 22 20 and r2, r2 - 77c: 09 f4 brne .+2 ; 0x780 <__LOCK_REGION_LENGTH__+0x380> - 77e: 4e ce rjmp .-868 ; 0x41c <__LOCK_REGION_LENGTH__+0x1c> - 780: b6 01 movw r22, r12 - 782: 80 e2 ldi r24, 0x20 ; 32 - 784: 90 e0 ldi r25, 0x00 ; 0 - 786: 37 d0 rcall .+110 ; 0x7f6 - 788: 2a 94 dec r2 - 78a: f7 cf rjmp .-18 ; 0x77a <__LOCK_REGION_LENGTH__+0x37a> - 78c: f6 01 movw r30, r12 - 78e: 86 81 ldd r24, Z+6 ; 0x06 - 790: 97 81 ldd r25, Z+7 ; 0x07 - 792: 02 c0 rjmp .+4 ; 0x798 <__LOCK_REGION_LENGTH__+0x398> - 794: 8f ef ldi r24, 0xFF ; 255 - 796: 9f ef ldi r25, 0xFF ; 255 - 798: 2b 96 adiw r28, 0x0b ; 11 - 79a: 0f b6 in r0, 0x3f ; 63 - 79c: f8 94 cli - 79e: de bf out 0x3e, r29 ; 62 - 7a0: 0f be out 0x3f, r0 ; 63 - 7a2: cd bf out 0x3d, r28 ; 61 - 7a4: df 91 pop r29 - 7a6: cf 91 pop r28 - 7a8: 1f 91 pop r17 - 7aa: 0f 91 pop r16 - 7ac: ff 90 pop r15 - 7ae: ef 90 pop r14 - 7b0: df 90 pop r13 - 7b2: cf 90 pop r12 - 7b4: bf 90 pop r11 - 7b6: af 90 pop r10 - 7b8: 9f 90 pop r9 - 7ba: 8f 90 pop r8 - 7bc: 7f 90 pop r7 - 7be: 6f 90 pop r6 - 7c0: 5f 90 pop r5 - 7c2: 4f 90 pop r4 - 7c4: 3f 90 pop r3 - 7c6: 2f 90 pop r2 - 7c8: 08 95 ret + 732: b6 01 movw r22, r12 + 734: 0c c0 rjmp .+24 ; 0x74e <__LOCK_REGION_LENGTH__+0x34e> + 736: 8a 2d mov r24, r10 + 738: 86 78 andi r24, 0x86 ; 134 + 73a: 51 f0 breq .+20 ; 0x750 <__LOCK_REGION_LENGTH__+0x350> + 73c: a1 fe sbrs r10, 1 + 73e: 02 c0 rjmp .+4 ; 0x744 <__LOCK_REGION_LENGTH__+0x344> + 740: 8b e2 ldi r24, 0x2B ; 43 + 742: 01 c0 rjmp .+2 ; 0x746 <__LOCK_REGION_LENGTH__+0x346> + 744: 80 e2 ldi r24, 0x20 ; 32 + 746: a7 fc sbrc r10, 7 + 748: 8d e2 ldi r24, 0x2D ; 45 + 74a: b6 01 movw r22, r12 + 74c: 90 e0 ldi r25, 0x00 ; 0 + 74e: 50 d0 rcall .+160 ; 0x7f0 + 750: 89 14 cp r8, r9 + 752: 30 f4 brcc .+12 ; 0x760 <__LOCK_REGION_LENGTH__+0x360> + 754: b6 01 movw r22, r12 + 756: 80 e3 ldi r24, 0x30 ; 48 + 758: 90 e0 ldi r25, 0x00 ; 0 + 75a: 4a d0 rcall .+148 ; 0x7f0 + 75c: 9a 94 dec r9 + 75e: f8 cf rjmp .-16 ; 0x750 <__LOCK_REGION_LENGTH__+0x350> + 760: 8a 94 dec r8 + 762: f3 01 movw r30, r6 + 764: e8 0d add r30, r8 + 766: f1 1d adc r31, r1 + 768: 80 81 ld r24, Z + 76a: b6 01 movw r22, r12 + 76c: 90 e0 ldi r25, 0x00 ; 0 + 76e: 40 d0 rcall .+128 ; 0x7f0 + 770: 81 10 cpse r8, r1 + 772: f6 cf rjmp .-20 ; 0x760 <__LOCK_REGION_LENGTH__+0x360> + 774: 22 20 and r2, r2 + 776: 09 f4 brne .+2 ; 0x77a <__LOCK_REGION_LENGTH__+0x37a> + 778: 4e ce rjmp .-868 ; 0x416 <__LOCK_REGION_LENGTH__+0x16> + 77a: b6 01 movw r22, r12 + 77c: 80 e2 ldi r24, 0x20 ; 32 + 77e: 90 e0 ldi r25, 0x00 ; 0 + 780: 37 d0 rcall .+110 ; 0x7f0 + 782: 2a 94 dec r2 + 784: f7 cf rjmp .-18 ; 0x774 <__LOCK_REGION_LENGTH__+0x374> + 786: f6 01 movw r30, r12 + 788: 86 81 ldd r24, Z+6 ; 0x06 + 78a: 97 81 ldd r25, Z+7 ; 0x07 + 78c: 02 c0 rjmp .+4 ; 0x792 <__LOCK_REGION_LENGTH__+0x392> + 78e: 8f ef ldi r24, 0xFF ; 255 + 790: 9f ef ldi r25, 0xFF ; 255 + 792: 2b 96 adiw r28, 0x0b ; 11 + 794: 0f b6 in r0, 0x3f ; 63 + 796: f8 94 cli + 798: de bf out 0x3e, r29 ; 62 + 79a: 0f be out 0x3f, r0 ; 63 + 79c: cd bf out 0x3d, r28 ; 61 + 79e: df 91 pop r29 + 7a0: cf 91 pop r28 + 7a2: 1f 91 pop r17 + 7a4: 0f 91 pop r16 + 7a6: ff 90 pop r15 + 7a8: ef 90 pop r14 + 7aa: df 90 pop r13 + 7ac: cf 90 pop r12 + 7ae: bf 90 pop r11 + 7b0: af 90 pop r10 + 7b2: 9f 90 pop r9 + 7b4: 8f 90 pop r8 + 7b6: 7f 90 pop r7 + 7b8: 6f 90 pop r6 + 7ba: 5f 90 pop r5 + 7bc: 4f 90 pop r4 + 7be: 3f 90 pop r3 + 7c0: 2f 90 pop r2 + 7c2: 08 95 ret -000007ca : - 7ca: fc 01 movw r30, r24 - 7cc: 05 90 lpm r0, Z+ - 7ce: 61 50 subi r22, 0x01 ; 1 - 7d0: 70 40 sbci r23, 0x00 ; 0 - 7d2: 01 10 cpse r0, r1 - 7d4: d8 f7 brcc .-10 ; 0x7cc - 7d6: 80 95 com r24 - 7d8: 90 95 com r25 - 7da: 8e 0f add r24, r30 - 7dc: 9f 1f adc r25, r31 - 7de: 08 95 ret +000007c4 : + 7c4: fc 01 movw r30, r24 + 7c6: 05 90 lpm r0, Z+ + 7c8: 61 50 subi r22, 0x01 ; 1 + 7ca: 70 40 sbci r23, 0x00 ; 0 + 7cc: 01 10 cpse r0, r1 + 7ce: d8 f7 brcc .-10 ; 0x7c6 + 7d0: 80 95 com r24 + 7d2: 90 95 com r25 + 7d4: 8e 0f add r24, r30 + 7d6: 9f 1f adc r25, r31 + 7d8: 08 95 ret -000007e0 : - 7e0: fc 01 movw r30, r24 - 7e2: 61 50 subi r22, 0x01 ; 1 - 7e4: 70 40 sbci r23, 0x00 ; 0 - 7e6: 01 90 ld r0, Z+ - 7e8: 01 10 cpse r0, r1 - 7ea: d8 f7 brcc .-10 ; 0x7e2 - 7ec: 80 95 com r24 - 7ee: 90 95 com r25 - 7f0: 8e 0f add r24, r30 - 7f2: 9f 1f adc r25, r31 - 7f4: 08 95 ret +000007da : + 7da: fc 01 movw r30, r24 + 7dc: 61 50 subi r22, 0x01 ; 1 + 7de: 70 40 sbci r23, 0x00 ; 0 + 7e0: 01 90 ld r0, Z+ + 7e2: 01 10 cpse r0, r1 + 7e4: d8 f7 brcc .-10 ; 0x7dc + 7e6: 80 95 com r24 + 7e8: 90 95 com r25 + 7ea: 8e 0f add r24, r30 + 7ec: 9f 1f adc r25, r31 + 7ee: 08 95 ret -000007f6 : - 7f6: 0f 93 push r16 - 7f8: 1f 93 push r17 - 7fa: cf 93 push r28 - 7fc: df 93 push r29 - 7fe: fb 01 movw r30, r22 - 800: 23 81 ldd r18, Z+3 ; 0x03 - 802: 21 fd sbrc r18, 1 - 804: 03 c0 rjmp .+6 ; 0x80c - 806: 8f ef ldi r24, 0xFF ; 255 - 808: 9f ef ldi r25, 0xFF ; 255 - 80a: 2c c0 rjmp .+88 ; 0x864 - 80c: 22 ff sbrs r18, 2 - 80e: 16 c0 rjmp .+44 ; 0x83c - 810: 46 81 ldd r20, Z+6 ; 0x06 - 812: 57 81 ldd r21, Z+7 ; 0x07 - 814: 24 81 ldd r18, Z+4 ; 0x04 - 816: 35 81 ldd r19, Z+5 ; 0x05 - 818: 42 17 cp r20, r18 - 81a: 53 07 cpc r21, r19 - 81c: 44 f4 brge .+16 ; 0x82e - 81e: a0 81 ld r26, Z - 820: b1 81 ldd r27, Z+1 ; 0x01 - 822: 9d 01 movw r18, r26 - 824: 2f 5f subi r18, 0xFF ; 255 - 826: 3f 4f sbci r19, 0xFF ; 255 - 828: 31 83 std Z+1, r19 ; 0x01 - 82a: 20 83 st Z, r18 - 82c: 8c 93 st X, r24 - 82e: 26 81 ldd r18, Z+6 ; 0x06 - 830: 37 81 ldd r19, Z+7 ; 0x07 - 832: 2f 5f subi r18, 0xFF ; 255 - 834: 3f 4f sbci r19, 0xFF ; 255 - 836: 37 83 std Z+7, r19 ; 0x07 - 838: 26 83 std Z+6, r18 ; 0x06 - 83a: 14 c0 rjmp .+40 ; 0x864 - 83c: 8b 01 movw r16, r22 - 83e: ec 01 movw r28, r24 - 840: fb 01 movw r30, r22 - 842: 00 84 ldd r0, Z+8 ; 0x08 - 844: f1 85 ldd r31, Z+9 ; 0x09 - 846: e0 2d mov r30, r0 - 848: 09 95 icall - 84a: 89 2b or r24, r25 - 84c: e1 f6 brne .-72 ; 0x806 - 84e: d8 01 movw r26, r16 - 850: 16 96 adiw r26, 0x06 ; 6 - 852: 8d 91 ld r24, X+ - 854: 9c 91 ld r25, X - 856: 17 97 sbiw r26, 0x07 ; 7 - 858: 01 96 adiw r24, 0x01 ; 1 - 85a: 17 96 adiw r26, 0x07 ; 7 - 85c: 9c 93 st X, r25 - 85e: 8e 93 st -X, r24 - 860: 16 97 sbiw r26, 0x06 ; 6 - 862: ce 01 movw r24, r28 - 864: df 91 pop r29 - 866: cf 91 pop r28 - 868: 1f 91 pop r17 - 86a: 0f 91 pop r16 - 86c: 08 95 ret +000007f0 : + 7f0: 0f 93 push r16 + 7f2: 1f 93 push r17 + 7f4: cf 93 push r28 + 7f6: df 93 push r29 + 7f8: fb 01 movw r30, r22 + 7fa: 23 81 ldd r18, Z+3 ; 0x03 + 7fc: 21 fd sbrc r18, 1 + 7fe: 03 c0 rjmp .+6 ; 0x806 + 800: 8f ef ldi r24, 0xFF ; 255 + 802: 9f ef ldi r25, 0xFF ; 255 + 804: 2c c0 rjmp .+88 ; 0x85e + 806: 22 ff sbrs r18, 2 + 808: 16 c0 rjmp .+44 ; 0x836 + 80a: 46 81 ldd r20, Z+6 ; 0x06 + 80c: 57 81 ldd r21, Z+7 ; 0x07 + 80e: 24 81 ldd r18, Z+4 ; 0x04 + 810: 35 81 ldd r19, Z+5 ; 0x05 + 812: 42 17 cp r20, r18 + 814: 53 07 cpc r21, r19 + 816: 44 f4 brge .+16 ; 0x828 + 818: a0 81 ld r26, Z + 81a: b1 81 ldd r27, Z+1 ; 0x01 + 81c: 9d 01 movw r18, r26 + 81e: 2f 5f subi r18, 0xFF ; 255 + 820: 3f 4f sbci r19, 0xFF ; 255 + 822: 31 83 std Z+1, r19 ; 0x01 + 824: 20 83 st Z, r18 + 826: 8c 93 st X, r24 + 828: 26 81 ldd r18, Z+6 ; 0x06 + 82a: 37 81 ldd r19, Z+7 ; 0x07 + 82c: 2f 5f subi r18, 0xFF ; 255 + 82e: 3f 4f sbci r19, 0xFF ; 255 + 830: 37 83 std Z+7, r19 ; 0x07 + 832: 26 83 std Z+6, r18 ; 0x06 + 834: 14 c0 rjmp .+40 ; 0x85e + 836: 8b 01 movw r16, r22 + 838: ec 01 movw r28, r24 + 83a: fb 01 movw r30, r22 + 83c: 00 84 ldd r0, Z+8 ; 0x08 + 83e: f1 85 ldd r31, Z+9 ; 0x09 + 840: e0 2d mov r30, r0 + 842: 09 95 icall + 844: 89 2b or r24, r25 + 846: e1 f6 brne .-72 ; 0x800 + 848: d8 01 movw r26, r16 + 84a: 16 96 adiw r26, 0x06 ; 6 + 84c: 8d 91 ld r24, X+ + 84e: 9c 91 ld r25, X + 850: 17 97 sbiw r26, 0x07 ; 7 + 852: 01 96 adiw r24, 0x01 ; 1 + 854: 17 96 adiw r26, 0x07 ; 7 + 856: 9c 93 st X, r25 + 858: 8e 93 st -X, r24 + 85a: 16 97 sbiw r26, 0x06 ; 6 + 85c: ce 01 movw r24, r28 + 85e: df 91 pop r29 + 860: cf 91 pop r28 + 862: 1f 91 pop r17 + 864: 0f 91 pop r16 + 866: 08 95 ret -0000086e <__ultoa_invert>: - 86e: fa 01 movw r30, r20 - 870: aa 27 eor r26, r26 - 872: 28 30 cpi r18, 0x08 ; 8 - 874: 51 f1 breq .+84 ; 0x8ca <__ultoa_invert+0x5c> - 876: 20 31 cpi r18, 0x10 ; 16 - 878: 81 f1 breq .+96 ; 0x8da <__ultoa_invert+0x6c> - 87a: e8 94 clt - 87c: 6f 93 push r22 - 87e: 6e 7f andi r22, 0xFE ; 254 - 880: 6e 5f subi r22, 0xFE ; 254 - 882: 7f 4f sbci r23, 0xFF ; 255 - 884: 8f 4f sbci r24, 0xFF ; 255 - 886: 9f 4f sbci r25, 0xFF ; 255 - 888: af 4f sbci r26, 0xFF ; 255 - 88a: b1 e0 ldi r27, 0x01 ; 1 - 88c: 3e d0 rcall .+124 ; 0x90a <__ultoa_invert+0x9c> - 88e: b4 e0 ldi r27, 0x04 ; 4 - 890: 3c d0 rcall .+120 ; 0x90a <__ultoa_invert+0x9c> - 892: 67 0f add r22, r23 - 894: 78 1f adc r23, r24 - 896: 89 1f adc r24, r25 - 898: 9a 1f adc r25, r26 - 89a: a1 1d adc r26, r1 - 89c: 68 0f add r22, r24 - 89e: 79 1f adc r23, r25 - 8a0: 8a 1f adc r24, r26 - 8a2: 91 1d adc r25, r1 - 8a4: a1 1d adc r26, r1 - 8a6: 6a 0f add r22, r26 - 8a8: 71 1d adc r23, r1 - 8aa: 81 1d adc r24, r1 - 8ac: 91 1d adc r25, r1 - 8ae: a1 1d adc r26, r1 - 8b0: 20 d0 rcall .+64 ; 0x8f2 <__ultoa_invert+0x84> - 8b2: 09 f4 brne .+2 ; 0x8b6 <__ultoa_invert+0x48> - 8b4: 68 94 set - 8b6: 3f 91 pop r19 - 8b8: 2a e0 ldi r18, 0x0A ; 10 - 8ba: 26 9f mul r18, r22 - 8bc: 11 24 eor r1, r1 - 8be: 30 19 sub r19, r0 - 8c0: 30 5d subi r19, 0xD0 ; 208 - 8c2: 31 93 st Z+, r19 - 8c4: de f6 brtc .-74 ; 0x87c <__ultoa_invert+0xe> - 8c6: cf 01 movw r24, r30 - 8c8: 08 95 ret - 8ca: 46 2f mov r20, r22 - 8cc: 47 70 andi r20, 0x07 ; 7 - 8ce: 40 5d subi r20, 0xD0 ; 208 - 8d0: 41 93 st Z+, r20 - 8d2: b3 e0 ldi r27, 0x03 ; 3 - 8d4: 0f d0 rcall .+30 ; 0x8f4 <__ultoa_invert+0x86> - 8d6: c9 f7 brne .-14 ; 0x8ca <__ultoa_invert+0x5c> - 8d8: f6 cf rjmp .-20 ; 0x8c6 <__ultoa_invert+0x58> - 8da: 46 2f mov r20, r22 - 8dc: 4f 70 andi r20, 0x0F ; 15 - 8de: 40 5d subi r20, 0xD0 ; 208 - 8e0: 4a 33 cpi r20, 0x3A ; 58 - 8e2: 18 f0 brcs .+6 ; 0x8ea <__ultoa_invert+0x7c> - 8e4: 49 5d subi r20, 0xD9 ; 217 - 8e6: 31 fd sbrc r19, 1 - 8e8: 40 52 subi r20, 0x20 ; 32 - 8ea: 41 93 st Z+, r20 - 8ec: 02 d0 rcall .+4 ; 0x8f2 <__ultoa_invert+0x84> - 8ee: a9 f7 brne .-22 ; 0x8da <__ultoa_invert+0x6c> - 8f0: ea cf rjmp .-44 ; 0x8c6 <__ultoa_invert+0x58> - 8f2: b4 e0 ldi r27, 0x04 ; 4 - 8f4: a6 95 lsr r26 - 8f6: 97 95 ror r25 - 8f8: 87 95 ror r24 - 8fa: 77 95 ror r23 - 8fc: 67 95 ror r22 - 8fe: ba 95 dec r27 - 900: c9 f7 brne .-14 ; 0x8f4 <__ultoa_invert+0x86> - 902: 00 97 sbiw r24, 0x00 ; 0 - 904: 61 05 cpc r22, r1 - 906: 71 05 cpc r23, r1 - 908: 08 95 ret - 90a: 9b 01 movw r18, r22 - 90c: ac 01 movw r20, r24 - 90e: 0a 2e mov r0, r26 - 910: 06 94 lsr r0 - 912: 57 95 ror r21 - 914: 47 95 ror r20 - 916: 37 95 ror r19 - 918: 27 95 ror r18 - 91a: ba 95 dec r27 - 91c: c9 f7 brne .-14 ; 0x910 <__ultoa_invert+0xa2> - 91e: 62 0f add r22, r18 - 920: 73 1f adc r23, r19 - 922: 84 1f adc r24, r20 - 924: 95 1f adc r25, r21 - 926: a0 1d adc r26, r0 - 928: 08 95 ret +00000868 <__ultoa_invert>: + 868: fa 01 movw r30, r20 + 86a: aa 27 eor r26, r26 + 86c: 28 30 cpi r18, 0x08 ; 8 + 86e: 51 f1 breq .+84 ; 0x8c4 <__ultoa_invert+0x5c> + 870: 20 31 cpi r18, 0x10 ; 16 + 872: 81 f1 breq .+96 ; 0x8d4 <__ultoa_invert+0x6c> + 874: e8 94 clt + 876: 6f 93 push r22 + 878: 6e 7f andi r22, 0xFE ; 254 + 87a: 6e 5f subi r22, 0xFE ; 254 + 87c: 7f 4f sbci r23, 0xFF ; 255 + 87e: 8f 4f sbci r24, 0xFF ; 255 + 880: 9f 4f sbci r25, 0xFF ; 255 + 882: af 4f sbci r26, 0xFF ; 255 + 884: b1 e0 ldi r27, 0x01 ; 1 + 886: 3e d0 rcall .+124 ; 0x904 <__ultoa_invert+0x9c> + 888: b4 e0 ldi r27, 0x04 ; 4 + 88a: 3c d0 rcall .+120 ; 0x904 <__ultoa_invert+0x9c> + 88c: 67 0f add r22, r23 + 88e: 78 1f adc r23, r24 + 890: 89 1f adc r24, r25 + 892: 9a 1f adc r25, r26 + 894: a1 1d adc r26, r1 + 896: 68 0f add r22, r24 + 898: 79 1f adc r23, r25 + 89a: 8a 1f adc r24, r26 + 89c: 91 1d adc r25, r1 + 89e: a1 1d adc r26, r1 + 8a0: 6a 0f add r22, r26 + 8a2: 71 1d adc r23, r1 + 8a4: 81 1d adc r24, r1 + 8a6: 91 1d adc r25, r1 + 8a8: a1 1d adc r26, r1 + 8aa: 20 d0 rcall .+64 ; 0x8ec <__ultoa_invert+0x84> + 8ac: 09 f4 brne .+2 ; 0x8b0 <__ultoa_invert+0x48> + 8ae: 68 94 set + 8b0: 3f 91 pop r19 + 8b2: 2a e0 ldi r18, 0x0A ; 10 + 8b4: 26 9f mul r18, r22 + 8b6: 11 24 eor r1, r1 + 8b8: 30 19 sub r19, r0 + 8ba: 30 5d subi r19, 0xD0 ; 208 + 8bc: 31 93 st Z+, r19 + 8be: de f6 brtc .-74 ; 0x876 <__ultoa_invert+0xe> + 8c0: cf 01 movw r24, r30 + 8c2: 08 95 ret + 8c4: 46 2f mov r20, r22 + 8c6: 47 70 andi r20, 0x07 ; 7 + 8c8: 40 5d subi r20, 0xD0 ; 208 + 8ca: 41 93 st Z+, r20 + 8cc: b3 e0 ldi r27, 0x03 ; 3 + 8ce: 0f d0 rcall .+30 ; 0x8ee <__ultoa_invert+0x86> + 8d0: c9 f7 brne .-14 ; 0x8c4 <__ultoa_invert+0x5c> + 8d2: f6 cf rjmp .-20 ; 0x8c0 <__ultoa_invert+0x58> + 8d4: 46 2f mov r20, r22 + 8d6: 4f 70 andi r20, 0x0F ; 15 + 8d8: 40 5d subi r20, 0xD0 ; 208 + 8da: 4a 33 cpi r20, 0x3A ; 58 + 8dc: 18 f0 brcs .+6 ; 0x8e4 <__ultoa_invert+0x7c> + 8de: 49 5d subi r20, 0xD9 ; 217 + 8e0: 31 fd sbrc r19, 1 + 8e2: 40 52 subi r20, 0x20 ; 32 + 8e4: 41 93 st Z+, r20 + 8e6: 02 d0 rcall .+4 ; 0x8ec <__ultoa_invert+0x84> + 8e8: a9 f7 brne .-22 ; 0x8d4 <__ultoa_invert+0x6c> + 8ea: ea cf rjmp .-44 ; 0x8c0 <__ultoa_invert+0x58> + 8ec: b4 e0 ldi r27, 0x04 ; 4 + 8ee: a6 95 lsr r26 + 8f0: 97 95 ror r25 + 8f2: 87 95 ror r24 + 8f4: 77 95 ror r23 + 8f6: 67 95 ror r22 + 8f8: ba 95 dec r27 + 8fa: c9 f7 brne .-14 ; 0x8ee <__ultoa_invert+0x86> + 8fc: 00 97 sbiw r24, 0x00 ; 0 + 8fe: 61 05 cpc r22, r1 + 900: 71 05 cpc r23, r1 + 902: 08 95 ret + 904: 9b 01 movw r18, r22 + 906: ac 01 movw r20, r24 + 908: 0a 2e mov r0, r26 + 90a: 06 94 lsr r0 + 90c: 57 95 ror r21 + 90e: 47 95 ror r20 + 910: 37 95 ror r19 + 912: 27 95 ror r18 + 914: ba 95 dec r27 + 916: c9 f7 brne .-14 ; 0x90a <__ultoa_invert+0xa2> + 918: 62 0f add r22, r18 + 91a: 73 1f adc r23, r19 + 91c: 84 1f adc r24, r20 + 91e: 95 1f adc r25, r21 + 920: a0 1d adc r26, r0 + 922: 08 95 ret -0000092a <_exit>: - 92a: f8 94 cli +00000924 <_exit>: + 924: f8 94 cli -0000092c <__stop_program>: - 92c: ff cf rjmp .-2 ; 0x92c <__stop_program> +00000926 <__stop_program>: + 926: ff cf rjmp .-2 ; 0x926 <__stop_program> diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec index 5f4fb68..6bde30f 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec @@ -1,5 +1,5 @@ S0180000756C747261736F6E696353656E736F722E737265634E -S113000045C000005AC1000056C0000054C00000A2 +S113000045C0000059C1000056C0000054C00000A3 S113001052C0000050C000004EC000004CC00000A0 S11300204AC0000048C0000046C0000044C00000B0 S113003042C0000040C000003EC000003CC00000C0 @@ -8,9 +8,9 @@ S113005032C0000030C000002EC000002CC00000E0 S11300602AC0000028C0000026C0000024C00000F0 S113007022C0000020C000001EC000001CC0000000 S11300801AC0000018C0000016C0000011241FBED2 -S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0EEE2F2 +S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E8E2F8 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+S113081035814217530744F4A081B1819D012F5FB4 +S11308203F4F318320838C93268137812F5F3F4F45 +S11308303783268314C08B01EC01FB010084F1850E +S1130840E02D0995892BE1F6D80116968D919C919E +S11308501797019617969C938E931697CE01DF9166 +S1130860CF911F910F910895FA01AA27283051F1D1 +S1130870203181F1E8946F936E7F6E5F7F4F8F4FCD +S11308809F4FAF4FB1E03ED0B4E03CD0670F781F2C +S1130890891F9A1FA11D680F791F8A1F911DA11D11 +S11308A06A0F711D811D911DA11D20D009F468944A +S11308B03F912AE0269F11243019305D3193DEF6F2 +S11308C0CF010895462F4770405D4193B3E00FD0A8 +S11308D0C9F7F6CF462F4F70405D4A3318F0495D93 +S11308E031FD4052419302D0A9F7EACFB4E0A69576 +S11308F09795879577956795BA95C9F70097610598 +S1130900710508959B01AC010A2E069457954795ED +S113091037952795BA95C9F7620F731F841F951FE2 +S10B0920A01D0895F894FFCF17 +S10909287D0001256400BE S9030000FC diff --git a/Microcontrollers/ultrasonicSensor/lcd_control.c b/Microcontrollers/ultrasonicSensor/lcd_control.c index 07fc59c..64bacb3 100644 --- a/Microcontrollers/ultrasonicSensor/lcd_control.c +++ b/Microcontrollers/ultrasonicSensor/lcd_control.c @@ -55,7 +55,6 @@ void init_4bits_mode(void) { DDRC = 0xFF; // PORTD(7) output, PORTD(6:0) input PORTC = 0xFF; - DDRD = 0xFF; DDRA = 0xFF; PORTC = 0x00; PORTA = 0x00; diff --git a/Microcontrollers/ultrasonicSensor/main.c b/Microcontrollers/ultrasonicSensor/main.c index f6882d1..d6df783 100644 --- a/Microcontrollers/ultrasonicSensor/main.c +++ b/Microcontrollers/ultrasonicSensor/main.c @@ -90,7 +90,7 @@ int main(void) DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt - EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge + EICRA = 0x03; // interrupt PORTD on pin 0, rising edge EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) From 366e504bf0f4925a7f3e03e973bf420a0e04d5d2 Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Wed, 24 Mar 2021 13:23:54 +0100 Subject: [PATCH 10/11] [ADD] made driver for ultrasonic sensor --- .../ultrasonicSensor/Debug/Makefile | 22 +- .../ultrasonicSensor/Debug/makedep.mk | 2 + .../Debug/ultrasonicSensor.lss | 2503 +++++++++-------- .../Debug/ultrasonicSensor.srec | 300 +- Microcontrollers/ultrasonicSensor/main.c | 76 +- .../ultrasonicSensor/ultrasonicSensor.cproj | 146 +- 6 files changed, 1536 insertions(+), 1513 deletions(-) diff --git a/Microcontrollers/ultrasonicSensor/Debug/Makefile b/Microcontrollers/ultrasonicSensor/Debug/Makefile index ff7d88c..927b492 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/Makefile +++ b/Microcontrollers/ultrasonicSensor/Debug/Makefile @@ -38,7 +38,8 @@ SUBDIRS := # Add inputs and outputs from these tool invocations to the build variables C_SRCS += \ ../lcd_control.c \ -../main.c +../main.c \ +../ultrasonic_sensor.c PREPROCESSING_SRCS += @@ -49,19 +50,23 @@ ASM_SRCS += OBJS += \ lcd_control.o \ -main.o +main.o \ +ultrasonic_sensor.o OBJS_AS_ARGS += \ lcd_control.o \ -main.o +main.o \ +ultrasonic_sensor.o C_DEPS += \ lcd_control.d \ -main.d +main.d \ +ultrasonic_sensor.d C_DEPS_AS_ARGS += \ lcd_control.d \ -main.d +main.d \ +ultrasonic_sensor.d OUTPUT_FILE_PATH +=ultrasonicSensor.elf @@ -91,6 +96,13 @@ LINKER_SCRIPT_DEP+= @echo Finished building: $< +./ultrasonic_sensor.o: .././ultrasonic_sensor.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include" -Og -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -mrelax -g2 -Wall -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + diff --git a/Microcontrollers/ultrasonicSensor/Debug/makedep.mk b/Microcontrollers/ultrasonicSensor/Debug/makedep.mk index c9e4784..3068bb9 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/makedep.mk +++ b/Microcontrollers/ultrasonicSensor/Debug/makedep.mk @@ -6,3 +6,5 @@ lcd_control.c main.c +ultrasonic_sensor.c + diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss index 7e49b4a..4918262 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss @@ -3,29 +3,31 @@ ultrasonicSensor.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 00000006 00800100 00000928 0000099c 2**0 + 0 .data 00000004 00800100 00000968 000009fc 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 00000928 00000000 00000000 00000074 2**1 + 1 .text 00000968 00000000 00000000 00000094 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .comment 0000005c 00000000 00000000 000009a2 2**0 + 2 .bss 00000002 00800104 00800104 00000a00 2**0 + ALLOC + 3 .comment 0000005c 00000000 00000000 00000a00 2**0 CONTENTS, READONLY - 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000a00 2**2 + 4 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000a5c 2**2 CONTENTS, READONLY - 4 .debug_aranges 000000b8 00000000 00000000 00000a3c 2**0 + 5 .debug_aranges 000000e8 00000000 00000000 00000a98 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_info 00000fc0 00000000 00000000 00000af4 2**0 + 6 .debug_info 00001114 00000000 00000000 00000b80 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_abbrev 00000a99 00000000 00000000 00001ab4 2**0 + 7 .debug_abbrev 00000b68 00000000 00000000 00001c94 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_line 00000710 00000000 00000000 0000254d 2**0 + 8 .debug_line 00000861 00000000 00000000 000027fc 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_frame 000001b4 00000000 00000000 00002c60 2**2 + 9 .debug_frame 0000022c 00000000 00000000 00003060 2**2 CONTENTS, READONLY, DEBUGGING - 9 .debug_str 0000059a 00000000 00000000 00002e14 2**0 + 10 .debug_str 000005e5 00000000 00000000 0000328c 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_loc 0000049c 00000000 00000000 000033ae 2**0 + 11 .debug_loc 000004fe 00000000 00000000 00003871 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_ranges 00000098 00000000 00000000 0000384a 2**0 + 12 .debug_ranges 000000b8 00000000 00000000 00003d6f 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -33,73 +35,73 @@ Disassembly of section .text: 00000000 <__vectors>: 0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end> 2: 00 00 nop - 4: 59 c1 rjmp .+690 ; 0x2b8 <__vector_1> + 4: 38 c1 rjmp .+624 ; 0x276 <__vector_1> 6: 00 00 nop - 8: 56 c0 rjmp .+172 ; 0xb6 <__bad_interrupt> + 8: 5e c0 rjmp .+188 ; 0xc6 <__bad_interrupt> a: 00 00 nop - c: 54 c0 rjmp .+168 ; 0xb6 <__bad_interrupt> + c: 5c c0 rjmp .+184 ; 0xc6 <__bad_interrupt> e: 00 00 nop - 10: 52 c0 rjmp .+164 ; 0xb6 <__bad_interrupt> + 10: 5a c0 rjmp .+180 ; 0xc6 <__bad_interrupt> 12: 00 00 nop - 14: 50 c0 rjmp .+160 ; 0xb6 <__bad_interrupt> + 14: 58 c0 rjmp .+176 ; 0xc6 <__bad_interrupt> 16: 00 00 nop - 18: 4e c0 rjmp .+156 ; 0xb6 <__bad_interrupt> + 18: 56 c0 rjmp .+172 ; 0xc6 <__bad_interrupt> 1a: 00 00 nop - 1c: 4c c0 rjmp .+152 ; 0xb6 <__bad_interrupt> + 1c: 54 c0 rjmp .+168 ; 0xc6 <__bad_interrupt> 1e: 00 00 nop - 20: 4a c0 rjmp .+148 ; 0xb6 <__bad_interrupt> + 20: 52 c0 rjmp .+164 ; 0xc6 <__bad_interrupt> 22: 00 00 nop - 24: 48 c0 rjmp .+144 ; 0xb6 <__bad_interrupt> + 24: 50 c0 rjmp .+160 ; 0xc6 <__bad_interrupt> 26: 00 00 nop - 28: 46 c0 rjmp .+140 ; 0xb6 <__bad_interrupt> + 28: 4e c0 rjmp .+156 ; 0xc6 <__bad_interrupt> 2a: 00 00 nop - 2c: 44 c0 rjmp .+136 ; 0xb6 <__bad_interrupt> + 2c: 4c c0 rjmp .+152 ; 0xc6 <__bad_interrupt> 2e: 00 00 nop - 30: 42 c0 rjmp .+132 ; 0xb6 <__bad_interrupt> + 30: 4a c0 rjmp .+148 ; 0xc6 <__bad_interrupt> 32: 00 00 nop - 34: 40 c0 rjmp .+128 ; 0xb6 <__bad_interrupt> + 34: 48 c0 rjmp .+144 ; 0xc6 <__bad_interrupt> 36: 00 00 nop - 38: 3e c0 rjmp .+124 ; 0xb6 <__bad_interrupt> + 38: 46 c0 rjmp .+140 ; 0xc6 <__bad_interrupt> 3a: 00 00 nop - 3c: 3c c0 rjmp .+120 ; 0xb6 <__bad_interrupt> + 3c: 44 c0 rjmp .+136 ; 0xc6 <__bad_interrupt> 3e: 00 00 nop - 40: 3a c0 rjmp .+116 ; 0xb6 <__bad_interrupt> + 40: 42 c0 rjmp .+132 ; 0xc6 <__bad_interrupt> 42: 00 00 nop - 44: 38 c0 rjmp .+112 ; 0xb6 <__bad_interrupt> + 44: 40 c0 rjmp .+128 ; 0xc6 <__bad_interrupt> 46: 00 00 nop - 48: 36 c0 rjmp .+108 ; 0xb6 <__bad_interrupt> + 48: 3e c0 rjmp .+124 ; 0xc6 <__bad_interrupt> 4a: 00 00 nop - 4c: 34 c0 rjmp .+104 ; 0xb6 <__bad_interrupt> + 4c: 3c c0 rjmp .+120 ; 0xc6 <__bad_interrupt> 4e: 00 00 nop - 50: 32 c0 rjmp .+100 ; 0xb6 <__bad_interrupt> + 50: 3a c0 rjmp .+116 ; 0xc6 <__bad_interrupt> 52: 00 00 nop - 54: 30 c0 rjmp .+96 ; 0xb6 <__bad_interrupt> + 54: 38 c0 rjmp .+112 ; 0xc6 <__bad_interrupt> 56: 00 00 nop - 58: 2e c0 rjmp .+92 ; 0xb6 <__bad_interrupt> + 58: 36 c0 rjmp .+108 ; 0xc6 <__bad_interrupt> 5a: 00 00 nop - 5c: 2c c0 rjmp .+88 ; 0xb6 <__bad_interrupt> + 5c: 34 c0 rjmp .+104 ; 0xc6 <__bad_interrupt> 5e: 00 00 nop - 60: 2a c0 rjmp .+84 ; 0xb6 <__bad_interrupt> + 60: 32 c0 rjmp .+100 ; 0xc6 <__bad_interrupt> 62: 00 00 nop - 64: 28 c0 rjmp .+80 ; 0xb6 <__bad_interrupt> + 64: 30 c0 rjmp .+96 ; 0xc6 <__bad_interrupt> 66: 00 00 nop - 68: 26 c0 rjmp .+76 ; 0xb6 <__bad_interrupt> + 68: 2e c0 rjmp .+92 ; 0xc6 <__bad_interrupt> 6a: 00 00 nop - 6c: 24 c0 rjmp .+72 ; 0xb6 <__bad_interrupt> + 6c: 2c c0 rjmp .+88 ; 0xc6 <__bad_interrupt> 6e: 00 00 nop - 70: 22 c0 rjmp .+68 ; 0xb6 <__bad_interrupt> + 70: 2a c0 rjmp .+84 ; 0xc6 <__bad_interrupt> 72: 00 00 nop - 74: 20 c0 rjmp .+64 ; 0xb6 <__bad_interrupt> + 74: 28 c0 rjmp .+80 ; 0xc6 <__bad_interrupt> 76: 00 00 nop - 78: 1e c0 rjmp .+60 ; 0xb6 <__bad_interrupt> + 78: 26 c0 rjmp .+76 ; 0xc6 <__bad_interrupt> 7a: 00 00 nop - 7c: 1c c0 rjmp .+56 ; 0xb6 <__bad_interrupt> + 7c: 24 c0 rjmp .+72 ; 0xc6 <__bad_interrupt> 7e: 00 00 nop - 80: 1a c0 rjmp .+52 ; 0xb6 <__bad_interrupt> + 80: 22 c0 rjmp .+68 ; 0xc6 <__bad_interrupt> 82: 00 00 nop - 84: 18 c0 rjmp .+48 ; 0xb6 <__bad_interrupt> + 84: 20 c0 rjmp .+64 ; 0xc6 <__bad_interrupt> 86: 00 00 nop - 88: 16 c0 rjmp .+44 ; 0xb6 <__bad_interrupt> + 88: 1e c0 rjmp .+60 ; 0xc6 <__bad_interrupt> ... 0000008c <__ctors_end>: @@ -114,1256 +116,1319 @@ Disassembly of section .text: 98: 11 e0 ldi r17, 0x01 ; 1 9a: a0 e0 ldi r26, 0x00 ; 0 9c: b1 e0 ldi r27, 0x01 ; 1 - 9e: e8 e2 ldi r30, 0x28 ; 40 + 9e: e8 e6 ldi r30, 0x68 ; 104 a0: f9 e0 ldi r31, 0x09 ; 9 a2: 00 e0 ldi r16, 0x00 ; 0 a4: 0b bf out 0x3b, r16 ; 59 a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14> a8: 07 90 elpm r0, Z+ aa: 0d 92 st X+, r0 - ac: a6 30 cpi r26, 0x06 ; 6 + ac: a4 30 cpi r26, 0x04 ; 4 ae: b1 07 cpc r27, r17 b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> - b2: 2e d1 rcall .+604 ; 0x310
- b4: 37 c4 rjmp .+2158 ; 0x924 <_exit> -000000b6 <__bad_interrupt>: - b6: a4 cf rjmp .-184 ; 0x0 <__vectors> +000000b2 <__do_clear_bss>: + b2: 21 e0 ldi r18, 0x01 ; 1 + b4: a4 e0 ldi r26, 0x04 ; 4 + b6: b1 e0 ldi r27, 0x01 ; 1 + b8: 01 c0 rjmp .+2 ; 0xbc <.do_clear_bss_start> -000000b8 : +000000ba <.do_clear_bss_loop>: + ba: 1d 92 st X+, r1 + +000000bc <.do_clear_bss_start>: + bc: a6 30 cpi r26, 0x06 ; 6 + be: b2 07 cpc r27, r18 + c0: e1 f7 brne .-8 ; 0xba <.do_clear_bss_loop> + c2: 00 d1 rcall .+512 ; 0x2c4
+ c4: 4f c4 rjmp .+2206 ; 0x964 <_exit> + +000000c6 <__bad_interrupt>: + c6: 9c cf rjmp .-200 ; 0x0 <__vectors> + +000000c8 : } } void lcd_move_right(void){ lcd_write_command(0x1E); - b8: 9b b3 in r25, 0x1b ; 27 - ba: 21 e0 ldi r18, 0x01 ; 1 - bc: 30 e0 ldi r19, 0x00 ; 0 - be: 02 c0 rjmp .+4 ; 0xc4 - c0: 22 0f add r18, r18 - c2: 33 1f adc r19, r19 - c4: 8a 95 dec r24 - c6: e2 f7 brpl .-8 ; 0xc0 - c8: 29 2b or r18, r25 - ca: 2b bb out 0x1b, r18 ; 27 - cc: 08 95 ret + c8: 9b b3 in r25, 0x1b ; 27 + ca: 21 e0 ldi r18, 0x01 ; 1 + cc: 30 e0 ldi r19, 0x00 ; 0 + ce: 02 c0 rjmp .+4 ; 0xd4 + d0: 22 0f add r18, r18 + d2: 33 1f adc r19, r19 + d4: 8a 95 dec r24 + d6: e2 f7 brpl .-8 ; 0xd0 + d8: 29 2b or r18, r25 + da: 2b bb out 0x1b, r18 ; 27 + dc: 08 95 ret -000000ce : - ce: 9b b3 in r25, 0x1b ; 27 - d0: 21 e0 ldi r18, 0x01 ; 1 - d2: 30 e0 ldi r19, 0x00 ; 0 - d4: 02 c0 rjmp .+4 ; 0xda - d6: 22 0f add r18, r18 - d8: 33 1f adc r19, r19 - da: 8a 95 dec r24 - dc: e2 f7 brpl .-8 ; 0xd6 - de: 20 95 com r18 - e0: 29 23 and r18, r25 - e2: 2b bb out 0x1b, r18 ; 27 - e4: 08 95 ret +000000de : + de: 9b b3 in r25, 0x1b ; 27 + e0: 21 e0 ldi r18, 0x01 ; 1 + e2: 30 e0 ldi r19, 0x00 ; 0 + e4: 02 c0 rjmp .+4 ; 0xea + e6: 22 0f add r18, r18 + e8: 33 1f adc r19, r19 + ea: 8a 95 dec r24 + ec: e2 f7 brpl .-8 ; 0xe6 + ee: 20 95 com r18 + f0: 29 23 and r18, r25 + f2: 2b bb out 0x1b, r18 ; 27 + f4: 08 95 ret -000000e6 : - e6: 86 e0 ldi r24, 0x06 ; 6 - e8: 90 e0 ldi r25, 0x00 ; 0 - ea: e6 df rcall .-52 ; 0xb8 - ec: 83 ec ldi r24, 0xC3 ; 195 - ee: 99 e0 ldi r25, 0x09 ; 9 - f0: 01 97 sbiw r24, 0x01 ; 1 - f2: f1 f7 brne .-4 ; 0xf0 - f4: 00 c0 rjmp .+0 ; 0xf6 - f6: 00 00 nop - f8: 86 e0 ldi r24, 0x06 ; 6 - fa: 90 e0 ldi r25, 0x00 ; 0 - fc: e8 df rcall .-48 ; 0xce - fe: 83 ec ldi r24, 0xC3 ; 195 - 100: 99 e0 ldi r25, 0x09 ; 9 - 102: 01 97 sbiw r24, 0x01 ; 1 - 104: f1 f7 brne .-4 ; 0x102 - 106: 00 c0 rjmp .+0 ; 0x108 - 108: 00 00 nop - 10a: 08 95 ret +000000f6 : + f6: 86 e0 ldi r24, 0x06 ; 6 + f8: 90 e0 ldi r25, 0x00 ; 0 + fa: e6 df rcall .-52 ; 0xc8 + fc: 83 ec ldi r24, 0xC3 ; 195 + fe: 99 e0 ldi r25, 0x09 ; 9 + 100: 01 97 sbiw r24, 0x01 ; 1 + 102: f1 f7 brne .-4 ; 0x100 + 104: 00 c0 rjmp .+0 ; 0x106 + 106: 00 00 nop + 108: 86 e0 ldi r24, 0x06 ; 6 + 10a: 90 e0 ldi r25, 0x00 ; 0 + 10c: e8 df rcall .-48 ; 0xde + 10e: 83 ec ldi r24, 0xC3 ; 195 + 110: 99 e0 ldi r25, 0x09 ; 9 + 112: 01 97 sbiw r24, 0x01 ; 1 + 114: f1 f7 brne .-4 ; 0x112 + 116: 00 c0 rjmp .+0 ; 0x118 + 118: 00 00 nop + 11a: 08 95 ret -0000010c : - 10c: cf 93 push r28 - 10e: c8 2f mov r28, r24 - 110: 85 bb out 0x15, r24 ; 21 - 112: 84 e0 ldi r24, 0x04 ; 4 - 114: 90 e0 ldi r25, 0x00 ; 0 - 116: d0 df rcall .-96 ; 0xb8 - 118: e6 df rcall .-52 ; 0xe6 - 11a: c2 95 swap r28 - 11c: c0 7f andi r28, 0xF0 ; 240 - 11e: c5 bb out 0x15, r28 ; 21 - 120: 84 e0 ldi r24, 0x04 ; 4 - 122: 90 e0 ldi r25, 0x00 ; 0 - 124: c9 df rcall .-110 ; 0xb8 - 126: df df rcall .-66 ; 0xe6 - 128: cf 91 pop r28 - 12a: 08 95 ret +0000011c : + 11c: cf 93 push r28 + 11e: c8 2f mov r28, r24 + 120: 85 bb out 0x15, r24 ; 21 + 122: 84 e0 ldi r24, 0x04 ; 4 + 124: 90 e0 ldi r25, 0x00 ; 0 + 126: d0 df rcall .-96 ; 0xc8 + 128: e6 df rcall .-52 ; 0xf6 + 12a: c2 95 swap r28 + 12c: c0 7f andi r28, 0xF0 ; 240 + 12e: c5 bb out 0x15, r28 ; 21 + 130: 84 e0 ldi r24, 0x04 ; 4 + 132: 90 e0 ldi r25, 0x00 ; 0 + 134: c9 df rcall .-110 ; 0xc8 + 136: df df rcall .-66 ; 0xf6 + 138: cf 91 pop r28 + 13a: 08 95 ret -0000012c : - 12c: cf 93 push r28 - 12e: c8 2f mov r28, r24 - 130: 85 bb out 0x15, r24 ; 21 - 132: 84 e0 ldi r24, 0x04 ; 4 - 134: 90 e0 ldi r25, 0x00 ; 0 - 136: cb df rcall .-106 ; 0xce - 138: d6 df rcall .-84 ; 0xe6 - 13a: c2 95 swap r28 - 13c: c0 7f andi r28, 0xF0 ; 240 - 13e: c5 bb out 0x15, r28 ; 21 - 140: 84 e0 ldi r24, 0x04 ; 4 - 142: 90 e0 ldi r25, 0x00 ; 0 - 144: c4 df rcall .-120 ; 0xce - 146: cf df rcall .-98 ; 0xe6 - 148: cf 91 pop r28 - 14a: 08 95 ret +0000013c : + 13c: cf 93 push r28 + 13e: c8 2f mov r28, r24 + 140: 85 bb out 0x15, r24 ; 21 + 142: 84 e0 ldi r24, 0x04 ; 4 + 144: 90 e0 ldi r25, 0x00 ; 0 + 146: cb df rcall .-106 ; 0xde + 148: d6 df rcall .-84 ; 0xf6 + 14a: c2 95 swap r28 + 14c: c0 7f andi r28, 0xF0 ; 240 + 14e: c5 bb out 0x15, r28 ; 21 + 150: 84 e0 ldi r24, 0x04 ; 4 + 152: 90 e0 ldi r25, 0x00 ; 0 + 154: c4 df rcall .-120 ; 0xde + 156: cf df rcall .-98 ; 0xf6 + 158: cf 91 pop r28 + 15a: 08 95 ret -0000014c : - 14c: 81 e0 ldi r24, 0x01 ; 1 - 14e: ee df rcall .-36 ; 0x12c - 150: 87 e8 ldi r24, 0x87 ; 135 - 152: 93 e1 ldi r25, 0x13 ; 19 - 154: 01 97 sbiw r24, 0x01 ; 1 - 156: f1 f7 brne .-4 ; 0x154 - 158: 00 c0 rjmp .+0 ; 0x15a - 15a: 00 00 nop - 15c: 80 e8 ldi r24, 0x80 ; 128 - 15e: e6 cf rjmp .-52 ; 0x12c - 160: 08 95 ret +0000015c : + 15c: 81 e0 ldi r24, 0x01 ; 1 + 15e: ee df rcall .-36 ; 0x13c + 160: 87 e8 ldi r24, 0x87 ; 135 + 162: 93 e1 ldi r25, 0x13 ; 19 + 164: 01 97 sbiw r24, 0x01 ; 1 + 166: f1 f7 brne .-4 ; 0x164 + 168: 00 c0 rjmp .+0 ; 0x16a + 16a: 00 00 nop + 16c: 80 e8 ldi r24, 0x80 ; 128 + 16e: e6 cf rjmp .-52 ; 0x13c + 170: 08 95 ret -00000162 : - 162: cf 93 push r28 - 164: 8f ef ldi r24, 0xFF ; 255 - 166: 84 bb out 0x14, r24 ; 20 - 168: 85 bb out 0x15, r24 ; 21 - 16a: 8a bb out 0x1a, r24 ; 26 - 16c: 15 ba out 0x15, r1 ; 21 - 16e: 1b ba out 0x1b, r1 ; 27 - 170: c0 e2 ldi r28, 0x20 ; 32 - 172: c5 bb out 0x15, r28 ; 21 - 174: b8 df rcall .-144 ; 0xe6 - 176: c5 bb out 0x15, r28 ; 21 - 178: b6 df rcall .-148 ; 0xe6 - 17a: 80 e8 ldi r24, 0x80 ; 128 - 17c: 85 bb out 0x15, r24 ; 21 - 17e: b3 df rcall .-154 ; 0xe6 - 180: 15 ba out 0x15, r1 ; 21 - 182: b1 df rcall .-158 ; 0xe6 - 184: 80 ef ldi r24, 0xF0 ; 240 - 186: 85 bb out 0x15, r24 ; 21 - 188: ae df rcall .-164 ; 0xe6 - 18a: 15 ba out 0x15, r1 ; 21 - 18c: ac df rcall .-168 ; 0xe6 - 18e: 80 e6 ldi r24, 0x60 ; 96 - 190: 85 bb out 0x15, r24 ; 21 - 192: a9 df rcall .-174 ; 0xe6 - 194: 82 e0 ldi r24, 0x02 ; 2 - 196: ca df rcall .-108 ; 0x12c - 198: a6 df rcall .-180 ; 0xe6 - 19a: cf 91 pop r28 - 19c: 08 95 ret +00000172 : + 172: cf 93 push r28 + 174: 8f ef ldi r24, 0xFF ; 255 + 176: 84 bb out 0x14, r24 ; 20 + 178: 85 bb out 0x15, r24 ; 21 + 17a: 8a bb out 0x1a, r24 ; 26 + 17c: 15 ba out 0x15, r1 ; 21 + 17e: 1b ba out 0x1b, r1 ; 27 + 180: c0 e2 ldi r28, 0x20 ; 32 + 182: c5 bb out 0x15, r28 ; 21 + 184: b8 df rcall .-144 ; 0xf6 + 186: c5 bb out 0x15, r28 ; 21 + 188: b6 df rcall .-148 ; 0xf6 + 18a: 80 e8 ldi r24, 0x80 ; 128 + 18c: 85 bb out 0x15, r24 ; 21 + 18e: b3 df rcall .-154 ; 0xf6 + 190: 15 ba out 0x15, r1 ; 21 + 192: b1 df rcall .-158 ; 0xf6 + 194: 80 ef ldi r24, 0xF0 ; 240 + 196: 85 bb out 0x15, r24 ; 21 + 198: ae df rcall .-164 ; 0xf6 + 19a: 15 ba out 0x15, r1 ; 21 + 19c: ac df rcall .-168 ; 0xf6 + 19e: 80 e6 ldi r24, 0x60 ; 96 + 1a0: 85 bb out 0x15, r24 ; 21 + 1a2: a9 df rcall .-174 ; 0xf6 + 1a4: 82 e0 ldi r24, 0x02 ; 2 + 1a6: ca df rcall .-108 ; 0x13c + 1a8: a6 df rcall .-180 ; 0xf6 + 1aa: cf 91 pop r28 + 1ac: 08 95 ret -0000019e : - 19e: cf 93 push r28 - 1a0: df 93 push r29 - 1a2: ec 01 movw r28, r24 - 1a4: 02 c0 rjmp .+4 ; 0x1aa - 1a6: b2 df rcall .-156 ; 0x10c - 1a8: 21 96 adiw r28, 0x01 ; 1 - 1aa: 88 81 ld r24, Y - 1ac: 81 11 cpse r24, r1 - 1ae: fb cf rjmp .-10 ; 0x1a6 - 1b0: df 91 pop r29 - 1b2: cf 91 pop r28 - 1b4: 08 95 ret +000001ae : + 1ae: cf 93 push r28 + 1b0: df 93 push r29 + 1b2: ec 01 movw r28, r24 + 1b4: 02 c0 rjmp .+4 ; 0x1ba + 1b6: b2 df rcall .-156 ; 0x11c + 1b8: 21 96 adiw r28, 0x01 ; 1 + 1ba: 88 81 ld r24, Y + 1bc: 81 11 cpse r24, r1 + 1be: fb cf rjmp .-10 ; 0x1b6 + 1c0: df 91 pop r29 + 1c2: cf 91 pop r28 + 1c4: 08 95 ret -000001b6 : +000001c6 : } void lcd_write_int(int number) { - 1b6: af 92 push r10 - 1b8: bf 92 push r11 - 1ba: cf 92 push r12 - 1bc: df 92 push r13 - 1be: ef 92 push r14 - 1c0: ff 92 push r15 - 1c2: 0f 93 push r16 - 1c4: 1f 93 push r17 - 1c6: cf 93 push r28 - 1c8: df 93 push r29 - 1ca: cd b7 in r28, 0x3d ; 61 - 1cc: de b7 in r29, 0x3e ; 62 - 1ce: d8 2e mov r13, r24 - 1d0: c9 2e mov r12, r25 + 1c6: af 92 push r10 + 1c8: bf 92 push r11 + 1ca: cf 92 push r12 + 1cc: df 92 push r13 + 1ce: ef 92 push r14 + 1d0: ff 92 push r15 + 1d2: 0f 93 push r16 + 1d4: 1f 93 push r17 + 1d6: cf 93 push r28 + 1d8: df 93 push r29 + 1da: cd b7 in r28, 0x3d ; 61 + 1dc: de b7 in r29, 0x3e ; 62 + 1de: d8 2e mov r13, r24 + 1e0: c9 2e mov r12, r25 int length = snprintf(NULL, 0, "%d", number); char str[length + 1]; snprintf(str, length + 1, "%d", number); lcd_write_string(str); } - 1d2: ad b6 in r10, 0x3d ; 61 - 1d4: be b6 in r11, 0x3e ; 62 + 1e2: ad b6 in r10, 0x3d ; 61 + 1e4: be b6 in r11, 0x3e ; 62 lcd_write_command(0x1E); } void lcd_write_int(int number) { int length = snprintf(NULL, 0, "%d", number); - 1d6: 9f 93 push r25 - 1d8: 8f 93 push r24 - 1da: 0f 2e mov r0, r31 - 1dc: f3 e0 ldi r31, 0x03 ; 3 - 1de: ef 2e mov r14, r31 - 1e0: f1 e0 ldi r31, 0x01 ; 1 - 1e2: ff 2e mov r15, r31 - 1e4: f0 2d mov r31, r0 - 1e6: ff 92 push r15 - 1e8: ef 92 push r14 - 1ea: 1f 92 push r1 - 1ec: 1f 92 push r1 - 1ee: 1f 92 push r1 - 1f0: 1f 92 push r1 - 1f2: af d0 rcall .+350 ; 0x352 + 1e6: 9f 93 push r25 + 1e8: 8f 93 push r24 + 1ea: 0f 2e mov r0, r31 + 1ec: f1 e0 ldi r31, 0x01 ; 1 + 1ee: ef 2e mov r14, r31 + 1f0: f1 e0 ldi r31, 0x01 ; 1 + 1f2: ff 2e mov r15, r31 + 1f4: f0 2d mov r31, r0 + 1f6: ff 92 push r15 + 1f8: ef 92 push r14 + 1fa: 1f 92 push r1 + 1fc: 1f 92 push r1 + 1fe: 1f 92 push r1 + 200: 1f 92 push r1 + 202: c7 d0 rcall .+398 ; 0x392 char str[length + 1]; - 1f4: 01 96 adiw r24, 0x01 ; 1 - 1f6: 2d b7 in r18, 0x3d ; 61 - 1f8: 3e b7 in r19, 0x3e ; 62 - 1fa: 28 5f subi r18, 0xF8 ; 248 - 1fc: 3f 4f sbci r19, 0xFF ; 255 - 1fe: 0f b6 in r0, 0x3f ; 63 - 200: f8 94 cli - 202: 3e bf out 0x3e, r19 ; 62 - 204: 0f be out 0x3f, r0 ; 63 - 206: 2d bf out 0x3d, r18 ; 61 - 208: 28 1b sub r18, r24 - 20a: 39 0b sbc r19, r25 - 20c: 0f b6 in r0, 0x3f ; 63 - 20e: f8 94 cli - 210: 3e bf out 0x3e, r19 ; 62 - 212: 0f be out 0x3f, r0 ; 63 - 214: 2d bf out 0x3d, r18 ; 61 - 216: 0d b7 in r16, 0x3d ; 61 - 218: 1e b7 in r17, 0x3e ; 62 - 21a: 0f 5f subi r16, 0xFF ; 255 - 21c: 1f 4f sbci r17, 0xFF ; 255 + 204: 01 96 adiw r24, 0x01 ; 1 + 206: 2d b7 in r18, 0x3d ; 61 + 208: 3e b7 in r19, 0x3e ; 62 + 20a: 28 5f subi r18, 0xF8 ; 248 + 20c: 3f 4f sbci r19, 0xFF ; 255 + 20e: 0f b6 in r0, 0x3f ; 63 + 210: f8 94 cli + 212: 3e bf out 0x3e, r19 ; 62 + 214: 0f be out 0x3f, r0 ; 63 + 216: 2d bf out 0x3d, r18 ; 61 + 218: 28 1b sub r18, r24 + 21a: 39 0b sbc r19, r25 + 21c: 0f b6 in r0, 0x3f ; 63 + 21e: f8 94 cli + 220: 3e bf out 0x3e, r19 ; 62 + 222: 0f be out 0x3f, r0 ; 63 + 224: 2d bf out 0x3d, r18 ; 61 + 226: 0d b7 in r16, 0x3d ; 61 + 228: 1e b7 in r17, 0x3e ; 62 + 22a: 0f 5f subi r16, 0xFF ; 255 + 22c: 1f 4f sbci r17, 0xFF ; 255 snprintf(str, length + 1, "%d", number); - 21e: cf 92 push r12 - 220: df 92 push r13 - 222: ff 92 push r15 - 224: ef 92 push r14 - 226: 9f 93 push r25 - 228: 8f 93 push r24 - 22a: 1f 93 push r17 - 22c: 0f 93 push r16 - 22e: 91 d0 rcall .+290 ; 0x352 + 22e: cf 92 push r12 + 230: df 92 push r13 + 232: ff 92 push r15 + 234: ef 92 push r14 + 236: 9f 93 push r25 + 238: 8f 93 push r24 + 23a: 1f 93 push r17 + 23c: 0f 93 push r16 + 23e: a9 d0 rcall .+338 ; 0x392 lcd_write_string(str); - 230: 80 2f mov r24, r16 - 232: 91 2f mov r25, r17 - 234: b4 df rcall .-152 ; 0x19e + 240: 80 2f mov r24, r16 + 242: 91 2f mov r25, r17 + 244: b4 df rcall .-152 ; 0x1ae } - 236: 8d b7 in r24, 0x3d ; 61 - 238: 9e b7 in r25, 0x3e ; 62 - 23a: 08 96 adiw r24, 0x08 ; 8 - 23c: 0f b6 in r0, 0x3f ; 63 - 23e: f8 94 cli - 240: 9e bf out 0x3e, r25 ; 62 - 242: 0f be out 0x3f, r0 ; 63 - 244: 8d bf out 0x3d, r24 ; 61 - 246: 0f b6 in r0, 0x3f ; 63 - 248: f8 94 cli - 24a: be be out 0x3e, r11 ; 62 - 24c: 0f be out 0x3f, r0 ; 63 - 24e: ad be out 0x3d, r10 ; 61 - 250: df 91 pop r29 - 252: cf 91 pop r28 - 254: 1f 91 pop r17 - 256: 0f 91 pop r16 - 258: ff 90 pop r15 - 25a: ef 90 pop r14 - 25c: df 90 pop r13 - 25e: cf 90 pop r12 - 260: bf 90 pop r11 - 262: af 90 pop r10 - 264: 08 95 ret + 246: 8d b7 in r24, 0x3d ; 61 + 248: 9e b7 in r25, 0x3e ; 62 + 24a: 08 96 adiw r24, 0x08 ; 8 + 24c: 0f b6 in r0, 0x3f ; 63 + 24e: f8 94 cli + 250: 9e bf out 0x3e, r25 ; 62 + 252: 0f be out 0x3f, r0 ; 63 + 254: 8d bf out 0x3d, r24 ; 61 + 256: 0f b6 in r0, 0x3f ; 63 + 258: f8 94 cli + 25a: be be out 0x3e, r11 ; 62 + 25c: 0f be out 0x3f, r0 ; 63 + 25e: ad be out 0x3d, r10 ; 61 + 260: df 91 pop r29 + 262: cf 91 pop r28 + 264: 1f 91 pop r17 + 266: 0f 91 pop r16 + 268: ff 90 pop r15 + 26a: ef 90 pop r14 + 26c: df 90 pop r13 + 26e: cf 90 pop r12 + 270: bf 90 pop r11 + 272: af 90 pop r10 + 274: 08 95 ret -00000266 : +00000276 <__vector_1>: -uint16_t timer_dist = 125; // time measured by timer; - -void wait_us(unsigned int us) -{ - for(int i = 0; i < us; i++) - 266: 20 e0 ldi r18, 0x00 ; 0 - 268: 30 e0 ldi r19, 0x00 ; 0 - 26a: 06 c0 rjmp .+12 ; 0x278 - #else - //round up by default - __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); - #endif - - __builtin_avr_delay_cycles(__ticks_dc); - 26c: 46 e0 ldi r20, 0x06 ; 6 - 26e: 4a 95 dec r20 - 270: f1 f7 brne .-4 ; 0x26e - 272: 00 c0 rjmp .+0 ; 0x274 - 274: 2f 5f subi r18, 0xFF ; 255 - 276: 3f 4f sbci r19, 0xFF ; 255 - 278: 28 17 cp r18, r24 - 27a: 39 07 cpc r19, r25 - 27c: b8 f3 brcs .-18 ; 0x26c - { - _delay_us(1); - } -} - 27e: 08 95 ret - -00000280 : - -void wait_ms(unsigned int ms) -{ - - for(int i = 0; i < ms; i++) - 280: 20 e0 ldi r18, 0x00 ; 0 - 282: 30 e0 ldi r19, 0x00 ; 0 - 284: 08 c0 rjmp .+16 ; 0x296 - #else - //round up by default - __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); - #endif - - __builtin_avr_delay_cycles(__ticks_dc); - 286: e7 e8 ldi r30, 0x87 ; 135 - 288: f3 e1 ldi r31, 0x13 ; 19 - 28a: 31 97 sbiw r30, 0x01 ; 1 - 28c: f1 f7 brne .-4 ; 0x28a - 28e: 00 c0 rjmp .+0 ; 0x290 - 290: 00 00 nop - 292: 2f 5f subi r18, 0xFF ; 255 - 294: 3f 4f sbci r19, 0xFF ; 255 - 296: 28 17 cp r18, r24 - 298: 39 07 cpc r19, r25 - 29a: a8 f3 brcs .-22 ; 0x286 - { - _delay_ms(1); - } -} - 29c: 08 95 ret - -0000029e : - -void ultrasonic_send_pulse() -{ - 29e: cf 93 push r28 - 2a0: df 93 push r29 - PORTG = 0x00; // 10 us low pulse - 2a2: c5 e6 ldi r28, 0x65 ; 101 - 2a4: d0 e0 ldi r29, 0x00 ; 0 - 2a6: 18 82 st Y, r1 - wait_us(10); - 2a8: 8a e0 ldi r24, 0x0A ; 10 - 2aa: 90 e0 ldi r25, 0x00 ; 0 - 2ac: dc df rcall .-72 ; 0x266 - PORTG = 0x01; - 2ae: 81 e0 ldi r24, 0x01 ; 1 - 2b0: 88 83 st Y, r24 -} - 2b2: df 91 pop r29 - 2b4: cf 91 pop r28 - 2b6: 08 95 ret - -000002b8 <__vector_1>: +#include "lcd_control.h" +#include "ultrasonic_sensor.h" ISR(INT0_vect) { - 2b8: 1f 92 push r1 - 2ba: 0f 92 push r0 - 2bc: 0f b6 in r0, 0x3f ; 63 - 2be: 0f 92 push r0 - 2c0: 11 24 eor r1, r1 - 2c2: 8f 93 push r24 - 2c4: 9f 93 push r25 - - timer_dist = 2009; - 2c6: 89 ed ldi r24, 0xD9 ; 217 - 2c8: 97 e0 ldi r25, 0x07 ; 7 - 2ca: 90 93 01 01 sts 0x0101, r25 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> - 2ce: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> - // if the interrupt was generated on a rising edge (start sending echo) - if (int_stat == INTERRUPT_RISING) - 2d2: 80 91 02 01 lds r24, 0x0102 ; 0x800102 - 2d6: 81 30 cpi r24, 0x01 ; 1 - 2d8: 41 f4 brne .+16 ; 0x2ea <__vector_1+0x32> - { - // set interrupt pin 0 on PORTD to falling edge - EICRA = 0x02; - 2da: 82 e0 ldi r24, 0x02 ; 2 - 2dc: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> - - // reset the time in timer1 - TCNT1 = 0x00; - 2e0: 1d bc out 0x2d, r1 ; 45 - 2e2: 1c bc out 0x2c, r1 ; 44 - - // set interrupt status - int_stat = INTERRUPT_FALLING; - 2e4: 10 92 02 01 sts 0x0102, r1 ; 0x800102 - 2e8: 0c c0 rjmp .+24 ; 0x302 <__vector_1+0x4a> - } else - // else if it was generated on a falling edge (end sending echo) - { - // set interrupt pin 0 on PORTD to rising edge - EICRA = 0x03; - 2ea: 83 e0 ldi r24, 0x03 ; 3 - 2ec: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> - - // read timer1 into time_dist - timer_dist = TCNT1; - 2f0: 8c b5 in r24, 0x2c ; 44 - 2f2: 9d b5 in r25, 0x2d ; 45 - 2f4: 90 93 01 01 sts 0x0101, r25 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> - 2f8: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> - - // set interrupt status - int_stat = INTERRUPT_RISING; - 2fc: 81 e0 ldi r24, 0x01 ; 1 - 2fe: 80 93 02 01 sts 0x0102, r24 ; 0x800102 - } - + 276: 1f 92 push r1 + 278: 0f 92 push r0 + 27a: 0f b6 in r0, 0x3f ; 63 + 27c: 0f 92 push r0 + 27e: 11 24 eor r1, r1 + 280: 0b b6 in r0, 0x3b ; 59 + 282: 0f 92 push r0 + 284: 2f 93 push r18 + 286: 3f 93 push r19 + 288: 4f 93 push r20 + 28a: 5f 93 push r21 + 28c: 6f 93 push r22 + 28e: 7f 93 push r23 + 290: 8f 93 push r24 + 292: 9f 93 push r25 + 294: af 93 push r26 + 296: bf 93 push r27 + 298: ef 93 push r30 + 29a: ff 93 push r31 + ultrasonic_handle_interrupt(); + 29c: 5c d0 rcall .+184 ; 0x356 } - 302: 9f 91 pop r25 - 304: 8f 91 pop r24 - 306: 0f 90 pop r0 - 308: 0f be out 0x3f, r0 ; 63 - 30a: 0f 90 pop r0 - 30c: 1f 90 pop r1 - 30e: 18 95 reti + 29e: ff 91 pop r31 + 2a0: ef 91 pop r30 + 2a2: bf 91 pop r27 + 2a4: af 91 pop r26 + 2a6: 9f 91 pop r25 + 2a8: 8f 91 pop r24 + 2aa: 7f 91 pop r23 + 2ac: 6f 91 pop r22 + 2ae: 5f 91 pop r21 + 2b0: 4f 91 pop r20 + 2b2: 3f 91 pop r19 + 2b4: 2f 91 pop r18 + 2b6: 0f 90 pop r0 + 2b8: 0b be out 0x3b, r0 ; 59 + 2ba: 0f 90 pop r0 + 2bc: 0f be out 0x3f, r0 ; 63 + 2be: 0f 90 pop r0 + 2c0: 1f 90 pop r1 + 2c2: 18 95 reti -00000310
: +000002c4
: int main(void) { - DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug - 310: 8f ef ldi r24, 0xFF ; 255 - 312: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> - DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt - 316: 11 ba out 0x11, r1 ; 17 - - EICRA = 0x03; // interrupt PORTD on pin 0, rising edge - 318: 83 e0 ldi r24, 0x03 ; 3 - 31a: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> - - EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) - 31e: 89 b7 in r24, 0x39 ; 57 - 320: 81 60 ori r24, 0x01 ; 1 - 322: 89 bf out 0x39, r24 ; 57 - - TCCR1A = 0b00000000; // initialize timer1, prescaler=256 - 324: 1f bc out 0x2f, r1 ; 47 - TCCR1B = 0b00001100; // CTC compare A, RUN - 326: 8c e0 ldi r24, 0x0C ; 12 - 328: 8e bd out 0x2e, r24 ; 46 - - - sei(); // turn on interrupt system - 32a: 78 94 sei + ultrasonic_init(); + 2c4: 2c d0 rcall .+88 ; 0x31e init_4bits_mode(); - 32c: 1a df rcall .-460 ; 0x162 - 32e: 8f e4 ldi r24, 0x4F ; 79 - 330: 93 ec ldi r25, 0xC3 ; 195 - 332: 01 97 sbiw r24, 0x01 ; 1 - 334: f1 f7 brne .-4 ; 0x332 - 336: 00 c0 rjmp .+0 ; 0x338 + 2c6: 55 df rcall .-342 ; 0x172 + 2c8: 87 ea ldi r24, 0xA7 ; 167 + #else + //round up by default + __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); + #endif + + __builtin_avr_delay_cycles(__ticks_dc); + 2ca: 91 e6 ldi r25, 0x61 ; 97 + 2cc: 01 97 sbiw r24, 0x01 ; 1 + 2ce: f1 f7 brne .-4 ; 0x2cc + 2d0: 00 c0 rjmp .+0 ; 0x2d2 + 2d2: 00 00 nop _delay_ms(10); lcd_clear(); - 338: 00 00 nop + 2d4: 43 df rcall .-378 ; 0x15c while (1) { ultrasonic_send_pulse(); - 33a: 08 df rcall .-496 ; 0x14c - 33c: b0 df rcall .-160 ; 0x29e + 2d6: 32 d0 rcall .+100 ; 0x33c - int distance = timer_dist * 340 / 2; lcd_clear(); - 33e: 06 df rcall .-500 ; 0x14c - 340: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> - lcd_write_int(timer_dist); - 344: 90 91 01 01 lds r25, 0x0101 ; 0x800101 <__DATA_REGION_ORIGIN__+0x1> - 348: 36 df rcall .-404 ; 0x1b6 + 2d8: 41 df rcall .-382 ; 0x15c + lcd_write_int(ultrasonic_get_timer_dist()); + 2da: 56 d0 rcall .+172 ; 0x388 + 2dc: 74 df rcall .-280 ; 0x1c6 + 2de: 84 e6 ldi r24, 0x64 ; 100 + 2e0: 90 e0 ldi r25, 0x00 ; 0 wait_ms(100); - 34a: 84 e6 ldi r24, 0x64 ; 100 - 34c: 90 e0 ldi r25, 0x00 ; 0 - 34e: 98 df rcall .-208 ; 0x280 - 350: f5 cf rjmp .-22 ; 0x33c + 2e2: 0e d0 rcall .+28 ; 0x300 + 2e4: f8 cf rjmp .-16 ; 0x2d6 -00000352 : - 352: 0f 93 push r16 - 354: 1f 93 push r17 - 356: cf 93 push r28 - 358: df 93 push r29 - 35a: cd b7 in r28, 0x3d ; 61 - 35c: de b7 in r29, 0x3e ; 62 - 35e: 2e 97 sbiw r28, 0x0e ; 14 - 360: 0f b6 in r0, 0x3f ; 63 - 362: f8 94 cli - 364: de bf out 0x3e, r29 ; 62 - 366: 0f be out 0x3f, r0 ; 63 - 368: cd bf out 0x3d, r28 ; 61 - 36a: 0d 89 ldd r16, Y+21 ; 0x15 - 36c: 1e 89 ldd r17, Y+22 ; 0x16 - 36e: 8f 89 ldd r24, Y+23 ; 0x17 - 370: 98 8d ldd r25, Y+24 ; 0x18 - 372: 26 e0 ldi r18, 0x06 ; 6 - 374: 2c 83 std Y+4, r18 ; 0x04 - 376: 1a 83 std Y+2, r17 ; 0x02 - 378: 09 83 std Y+1, r16 ; 0x01 - 37a: 97 ff sbrs r25, 7 - 37c: 02 c0 rjmp .+4 ; 0x382 - 37e: 80 e0 ldi r24, 0x00 ; 0 - 380: 90 e8 ldi r25, 0x80 ; 128 - 382: 01 97 sbiw r24, 0x01 ; 1 - 384: 9e 83 std Y+6, r25 ; 0x06 - 386: 8d 83 std Y+5, r24 ; 0x05 - 388: ae 01 movw r20, r28 - 38a: 45 5e subi r20, 0xE5 ; 229 - 38c: 5f 4f sbci r21, 0xFF ; 255 - 38e: 69 8d ldd r22, Y+25 ; 0x19 - 390: 7a 8d ldd r23, Y+26 ; 0x1a - 392: ce 01 movw r24, r28 - 394: 01 96 adiw r24, 0x01 ; 1 - 396: 19 d0 rcall .+50 ; 0x3ca - 398: 4d 81 ldd r20, Y+5 ; 0x05 - 39a: 5e 81 ldd r21, Y+6 ; 0x06 - 39c: 57 fd sbrc r21, 7 - 39e: 0a c0 rjmp .+20 ; 0x3b4 - 3a0: 2f 81 ldd r18, Y+7 ; 0x07 - 3a2: 38 85 ldd r19, Y+8 ; 0x08 - 3a4: 42 17 cp r20, r18 - 3a6: 53 07 cpc r21, r19 - 3a8: 0c f4 brge .+2 ; 0x3ac - 3aa: 9a 01 movw r18, r20 - 3ac: f8 01 movw r30, r16 - 3ae: e2 0f add r30, r18 - 3b0: f3 1f adc r31, r19 - 3b2: 10 82 st Z, r1 - 3b4: 2e 96 adiw r28, 0x0e ; 14 - 3b6: 0f b6 in r0, 0x3f ; 63 - 3b8: f8 94 cli - 3ba: de bf out 0x3e, r29 ; 62 - 3bc: 0f be out 0x3f, r0 ; 63 - 3be: cd bf out 0x3d, r28 ; 61 - 3c0: df 91 pop r29 - 3c2: cf 91 pop r28 - 3c4: 1f 91 pop r17 - 3c6: 0f 91 pop r16 - 3c8: 08 95 ret +000002e6 : -000003ca : - 3ca: 2f 92 push r2 - 3cc: 3f 92 push r3 - 3ce: 4f 92 push r4 - 3d0: 5f 92 push r5 - 3d2: 6f 92 push r6 - 3d4: 7f 92 push r7 - 3d6: 8f 92 push r8 - 3d8: 9f 92 push r9 - 3da: af 92 push r10 - 3dc: bf 92 push r11 - 3de: cf 92 push r12 - 3e0: df 92 push r13 - 3e2: ef 92 push r14 - 3e4: ff 92 push r15 - 3e6: 0f 93 push r16 - 3e8: 1f 93 push r17 - 3ea: cf 93 push r28 - 3ec: df 93 push r29 - 3ee: cd b7 in r28, 0x3d ; 61 - 3f0: de b7 in r29, 0x3e ; 62 - 3f2: 2b 97 sbiw r28, 0x0b ; 11 - 3f4: 0f b6 in r0, 0x3f ; 63 - 3f6: f8 94 cli - 3f8: de bf out 0x3e, r29 ; 62 - 3fa: 0f be out 0x3f, r0 ; 63 - 3fc: cd bf out 0x3d, r28 ; 61 - 3fe: 6c 01 movw r12, r24 - 400: 7b 01 movw r14, r22 - 402: 8a 01 movw r16, r20 - 404: fc 01 movw r30, r24 - 406: 17 82 std Z+7, r1 ; 0x07 - 408: 16 82 std Z+6, r1 ; 0x06 - 40a: 83 81 ldd r24, Z+3 ; 0x03 - 40c: 81 ff sbrs r24, 1 - 40e: bf c1 rjmp .+894 ; 0x78e <__LOCK_REGION_LENGTH__+0x38e> - 410: ce 01 movw r24, r28 - 412: 01 96 adiw r24, 0x01 ; 1 - 414: 3c 01 movw r6, r24 - 416: f6 01 movw r30, r12 - 418: 93 81 ldd r25, Z+3 ; 0x03 - 41a: f7 01 movw r30, r14 - 41c: 93 fd sbrc r25, 3 - 41e: 85 91 lpm r24, Z+ - 420: 93 ff sbrs r25, 3 - 422: 81 91 ld r24, Z+ - 424: 7f 01 movw r14, r30 - 426: 88 23 and r24, r24 - 428: 09 f4 brne .+2 ; 0x42c <__LOCK_REGION_LENGTH__+0x2c> - 42a: ad c1 rjmp .+858 ; 0x786 <__LOCK_REGION_LENGTH__+0x386> - 42c: 85 32 cpi r24, 0x25 ; 37 - 42e: 39 f4 brne .+14 ; 0x43e <__LOCK_REGION_LENGTH__+0x3e> - 430: 93 fd sbrc r25, 3 - 432: 85 91 lpm r24, Z+ - 434: 93 ff sbrs r25, 3 - 436: 81 91 ld r24, Z+ - 438: 7f 01 movw r14, r30 - 43a: 85 32 cpi r24, 0x25 ; 37 - 43c: 21 f4 brne .+8 ; 0x446 <__LOCK_REGION_LENGTH__+0x46> - 43e: b6 01 movw r22, r12 - 440: 90 e0 ldi r25, 0x00 ; 0 - 442: d6 d1 rcall .+940 ; 0x7f0 - 444: e8 cf rjmp .-48 ; 0x416 <__LOCK_REGION_LENGTH__+0x16> - 446: 91 2c mov r9, r1 - 448: 21 2c mov r2, r1 - 44a: 31 2c mov r3, r1 - 44c: ff e1 ldi r31, 0x1F ; 31 - 44e: f3 15 cp r31, r3 - 450: d8 f0 brcs .+54 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> - 452: 8b 32 cpi r24, 0x2B ; 43 - 454: 79 f0 breq .+30 ; 0x474 <__LOCK_REGION_LENGTH__+0x74> - 456: 38 f4 brcc .+14 ; 0x466 <__LOCK_REGION_LENGTH__+0x66> - 458: 80 32 cpi r24, 0x20 ; 32 - 45a: 79 f0 breq .+30 ; 0x47a <__LOCK_REGION_LENGTH__+0x7a> - 45c: 83 32 cpi r24, 0x23 ; 35 - 45e: a1 f4 brne .+40 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> - 460: 23 2d mov r18, r3 - 462: 20 61 ori r18, 0x10 ; 16 - 464: 1d c0 rjmp .+58 ; 0x4a0 <__LOCK_REGION_LENGTH__+0xa0> - 466: 8d 32 cpi r24, 0x2D ; 45 - 468: 61 f0 breq .+24 ; 0x482 <__LOCK_REGION_LENGTH__+0x82> - 46a: 80 33 cpi r24, 0x30 ; 48 - 46c: 69 f4 brne .+26 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> - 46e: 23 2d mov r18, r3 - 470: 21 60 ori r18, 0x01 ; 1 - 472: 16 c0 rjmp .+44 ; 0x4a0 <__LOCK_REGION_LENGTH__+0xa0> - 474: 83 2d mov r24, r3 - 476: 82 60 ori r24, 0x02 ; 2 - 478: 38 2e mov r3, r24 - 47a: e3 2d mov r30, r3 - 47c: e4 60 ori r30, 0x04 ; 4 - 47e: 3e 2e mov r3, r30 - 480: 2a c0 rjmp .+84 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> - 482: f3 2d mov r31, r3 - 484: f8 60 ori r31, 0x08 ; 8 - 486: 1d c0 rjmp .+58 ; 0x4c2 <__LOCK_REGION_LENGTH__+0xc2> - 488: 37 fc sbrc r3, 7 - 48a: 2d c0 rjmp .+90 ; 0x4e6 <__LOCK_REGION_LENGTH__+0xe6> - 48c: 20 ed ldi r18, 0xD0 ; 208 - 48e: 28 0f add r18, r24 - 490: 2a 30 cpi r18, 0x0A ; 10 - 492: 40 f0 brcs .+16 ; 0x4a4 <__LOCK_REGION_LENGTH__+0xa4> - 494: 8e 32 cpi r24, 0x2E ; 46 - 496: b9 f4 brne .+46 ; 0x4c6 <__LOCK_REGION_LENGTH__+0xc6> - 498: 36 fc sbrc r3, 6 - 49a: 75 c1 rjmp .+746 ; 0x786 <__LOCK_REGION_LENGTH__+0x386> - 49c: 23 2d mov r18, r3 - 49e: 20 64 ori r18, 0x40 ; 64 - 4a0: 32 2e mov r3, r18 - 4a2: 19 c0 rjmp .+50 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> - 4a4: 36 fe sbrs r3, 6 - 4a6: 06 c0 rjmp .+12 ; 0x4b4 <__LOCK_REGION_LENGTH__+0xb4> - 4a8: 8a e0 ldi r24, 0x0A ; 10 - 4aa: 98 9e mul r9, r24 - 4ac: 20 0d add r18, r0 - 4ae: 11 24 eor r1, r1 - 4b0: 92 2e mov r9, r18 - 4b2: 11 c0 rjmp .+34 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> - 4b4: ea e0 ldi r30, 0x0A ; 10 - 4b6: 2e 9e mul r2, r30 - 4b8: 20 0d add r18, r0 - 4ba: 11 24 eor r1, r1 - 4bc: 22 2e mov r2, r18 - 4be: f3 2d mov r31, r3 - 4c0: f0 62 ori r31, 0x20 ; 32 - 4c2: 3f 2e mov r3, r31 - 4c4: 08 c0 rjmp .+16 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> - 4c6: 8c 36 cpi r24, 0x6C ; 108 - 4c8: 21 f4 brne .+8 ; 0x4d2 <__LOCK_REGION_LENGTH__+0xd2> - 4ca: 83 2d mov r24, r3 - 4cc: 80 68 ori r24, 0x80 ; 128 - 4ce: 38 2e mov r3, r24 - 4d0: 02 c0 rjmp .+4 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> - 4d2: 88 36 cpi r24, 0x68 ; 104 - 4d4: 41 f4 brne .+16 ; 0x4e6 <__LOCK_REGION_LENGTH__+0xe6> - 4d6: f7 01 movw r30, r14 - 4d8: 93 fd sbrc r25, 3 - 4da: 85 91 lpm r24, Z+ - 4dc: 93 ff sbrs r25, 3 - 4de: 81 91 ld r24, Z+ - 4e0: 7f 01 movw r14, r30 - 4e2: 81 11 cpse r24, r1 - 4e4: b3 cf rjmp .-154 ; 0x44c <__LOCK_REGION_LENGTH__+0x4c> - 4e6: 98 2f mov r25, r24 - 4e8: 9f 7d andi r25, 0xDF ; 223 - 4ea: 95 54 subi r25, 0x45 ; 69 - 4ec: 93 30 cpi r25, 0x03 ; 3 - 4ee: 28 f4 brcc .+10 ; 0x4fa <__LOCK_REGION_LENGTH__+0xfa> - 4f0: 0c 5f subi r16, 0xFC ; 252 - 4f2: 1f 4f sbci r17, 0xFF ; 255 - 4f4: 9f e3 ldi r25, 0x3F ; 63 - 4f6: 99 83 std Y+1, r25 ; 0x01 - 4f8: 0d c0 rjmp .+26 ; 0x514 <__LOCK_REGION_LENGTH__+0x114> - 4fa: 83 36 cpi r24, 0x63 ; 99 - 4fc: 31 f0 breq .+12 ; 0x50a <__LOCK_REGION_LENGTH__+0x10a> - 4fe: 83 37 cpi r24, 0x73 ; 115 - 500: 71 f0 breq .+28 ; 0x51e <__LOCK_REGION_LENGTH__+0x11e> - 502: 83 35 cpi r24, 0x53 ; 83 - 504: 09 f0 breq .+2 ; 0x508 <__LOCK_REGION_LENGTH__+0x108> - 506: 55 c0 rjmp .+170 ; 0x5b2 <__LOCK_REGION_LENGTH__+0x1b2> - 508: 20 c0 rjmp .+64 ; 0x54a <__LOCK_REGION_LENGTH__+0x14a> - 50a: f8 01 movw r30, r16 - 50c: 80 81 ld r24, Z - 50e: 89 83 std Y+1, r24 ; 0x01 - 510: 0e 5f subi r16, 0xFE ; 254 - 512: 1f 4f sbci r17, 0xFF ; 255 - 514: 88 24 eor r8, r8 - 516: 83 94 inc r8 - 518: 91 2c mov r9, r1 - 51a: 53 01 movw r10, r6 - 51c: 12 c0 rjmp .+36 ; 0x542 <__LOCK_REGION_LENGTH__+0x142> - 51e: 28 01 movw r4, r16 - 520: f2 e0 ldi r31, 0x02 ; 2 - 522: 4f 0e add r4, r31 - 524: 51 1c adc r5, r1 - 526: f8 01 movw r30, r16 - 528: a0 80 ld r10, Z - 52a: b1 80 ldd r11, Z+1 ; 0x01 - 52c: 36 fe sbrs r3, 6 - 52e: 03 c0 rjmp .+6 ; 0x536 <__LOCK_REGION_LENGTH__+0x136> - 530: 69 2d mov r22, r9 - 532: 70 e0 ldi r23, 0x00 ; 0 - 534: 02 c0 rjmp .+4 ; 0x53a <__LOCK_REGION_LENGTH__+0x13a> - 536: 6f ef ldi r22, 0xFF ; 255 - 538: 7f ef ldi r23, 0xFF ; 255 - 53a: c5 01 movw r24, r10 - 53c: 4e d1 rcall .+668 ; 0x7da - 53e: 4c 01 movw r8, r24 - 540: 82 01 movw r16, r4 - 542: f3 2d mov r31, r3 - 544: ff 77 andi r31, 0x7F ; 127 - 546: 3f 2e mov r3, r31 - 548: 15 c0 rjmp .+42 ; 0x574 <__LOCK_REGION_LENGTH__+0x174> - 54a: 28 01 movw r4, r16 - 54c: 22 e0 ldi r18, 0x02 ; 2 - 54e: 42 0e add r4, r18 - 550: 51 1c adc r5, r1 - 552: f8 01 movw r30, r16 - 554: a0 80 ld r10, Z - 556: b1 80 ldd r11, Z+1 ; 0x01 - 558: 36 fe sbrs r3, 6 - 55a: 03 c0 rjmp .+6 ; 0x562 <__LOCK_REGION_LENGTH__+0x162> - 55c: 69 2d mov r22, r9 - 55e: 70 e0 ldi r23, 0x00 ; 0 - 560: 02 c0 rjmp .+4 ; 0x566 <__LOCK_REGION_LENGTH__+0x166> - 562: 6f ef ldi r22, 0xFF ; 255 - 564: 7f ef ldi r23, 0xFF ; 255 - 566: c5 01 movw r24, r10 - 568: 2d d1 rcall .+602 ; 0x7c4 - 56a: 4c 01 movw r8, r24 - 56c: f3 2d mov r31, r3 - 56e: f0 68 ori r31, 0x80 ; 128 - 570: 3f 2e mov r3, r31 - 572: 82 01 movw r16, r4 - 574: 33 fc sbrc r3, 3 - 576: 19 c0 rjmp .+50 ; 0x5aa <__LOCK_REGION_LENGTH__+0x1aa> - 578: 82 2d mov r24, r2 - 57a: 90 e0 ldi r25, 0x00 ; 0 - 57c: 88 16 cp r8, r24 - 57e: 99 06 cpc r9, r25 - 580: a0 f4 brcc .+40 ; 0x5aa <__LOCK_REGION_LENGTH__+0x1aa> - 582: b6 01 movw r22, r12 - 584: 80 e2 ldi r24, 0x20 ; 32 - 586: 90 e0 ldi r25, 0x00 ; 0 - 588: 33 d1 rcall .+614 ; 0x7f0 - 58a: 2a 94 dec r2 - 58c: f5 cf rjmp .-22 ; 0x578 <__LOCK_REGION_LENGTH__+0x178> - 58e: f5 01 movw r30, r10 - 590: 37 fc sbrc r3, 7 - 592: 85 91 lpm r24, Z+ - 594: 37 fe sbrs r3, 7 - 596: 81 91 ld r24, Z+ - 598: 5f 01 movw r10, r30 - 59a: b6 01 movw r22, r12 - 59c: 90 e0 ldi r25, 0x00 ; 0 - 59e: 28 d1 rcall .+592 ; 0x7f0 - 5a0: 21 10 cpse r2, r1 - 5a2: 2a 94 dec r2 - 5a4: 21 e0 ldi r18, 0x01 ; 1 - 5a6: 82 1a sub r8, r18 - 5a8: 91 08 sbc r9, r1 - 5aa: 81 14 cp r8, r1 - 5ac: 91 04 cpc r9, r1 - 5ae: 79 f7 brne .-34 ; 0x58e <__LOCK_REGION_LENGTH__+0x18e> - 5b0: e1 c0 rjmp .+450 ; 0x774 <__LOCK_REGION_LENGTH__+0x374> - 5b2: 84 36 cpi r24, 0x64 ; 100 - 5b4: 11 f0 breq .+4 ; 0x5ba <__LOCK_REGION_LENGTH__+0x1ba> - 5b6: 89 36 cpi r24, 0x69 ; 105 - 5b8: 39 f5 brne .+78 ; 0x608 <__LOCK_REGION_LENGTH__+0x208> - 5ba: f8 01 movw r30, r16 - 5bc: 37 fe sbrs r3, 7 - 5be: 07 c0 rjmp .+14 ; 0x5ce <__LOCK_REGION_LENGTH__+0x1ce> - 5c0: 60 81 ld r22, Z - 5c2: 71 81 ldd r23, Z+1 ; 0x01 - 5c4: 82 81 ldd r24, Z+2 ; 0x02 - 5c6: 93 81 ldd r25, Z+3 ; 0x03 - 5c8: 0c 5f subi r16, 0xFC ; 252 - 5ca: 1f 4f sbci r17, 0xFF ; 255 - 5cc: 08 c0 rjmp .+16 ; 0x5de <__LOCK_REGION_LENGTH__+0x1de> - 5ce: 60 81 ld r22, Z - 5d0: 71 81 ldd r23, Z+1 ; 0x01 - 5d2: 07 2e mov r0, r23 - 5d4: 00 0c add r0, r0 - 5d6: 88 0b sbc r24, r24 - 5d8: 99 0b sbc r25, r25 - 5da: 0e 5f subi r16, 0xFE ; 254 - 5dc: 1f 4f sbci r17, 0xFF ; 255 - 5de: f3 2d mov r31, r3 - 5e0: ff 76 andi r31, 0x6F ; 111 - 5e2: 3f 2e mov r3, r31 - 5e4: 97 ff sbrs r25, 7 - 5e6: 09 c0 rjmp .+18 ; 0x5fa <__LOCK_REGION_LENGTH__+0x1fa> - 5e8: 90 95 com r25 - 5ea: 80 95 com r24 - 5ec: 70 95 com r23 - 5ee: 61 95 neg r22 - 5f0: 7f 4f sbci r23, 0xFF ; 255 - 5f2: 8f 4f sbci r24, 0xFF ; 255 - 5f4: 9f 4f sbci r25, 0xFF ; 255 - 5f6: f0 68 ori r31, 0x80 ; 128 - 5f8: 3f 2e mov r3, r31 - 5fa: 2a e0 ldi r18, 0x0A ; 10 - 5fc: 30 e0 ldi r19, 0x00 ; 0 - 5fe: a3 01 movw r20, r6 - 600: 33 d1 rcall .+614 ; 0x868 <__ultoa_invert> - 602: 88 2e mov r8, r24 - 604: 86 18 sub r8, r6 - 606: 44 c0 rjmp .+136 ; 0x690 <__LOCK_REGION_LENGTH__+0x290> - 608: 85 37 cpi r24, 0x75 ; 117 - 60a: 31 f4 brne .+12 ; 0x618 <__LOCK_REGION_LENGTH__+0x218> - 60c: 23 2d mov r18, r3 - 60e: 2f 7e andi r18, 0xEF ; 239 - 610: b2 2e mov r11, r18 - 612: 2a e0 ldi r18, 0x0A ; 10 - 614: 30 e0 ldi r19, 0x00 ; 0 - 616: 25 c0 rjmp .+74 ; 0x662 <__LOCK_REGION_LENGTH__+0x262> - 618: 93 2d mov r25, r3 - 61a: 99 7f andi r25, 0xF9 ; 249 - 61c: b9 2e mov r11, r25 - 61e: 8f 36 cpi r24, 0x6F ; 111 - 620: c1 f0 breq .+48 ; 0x652 <__LOCK_REGION_LENGTH__+0x252> - 622: 18 f4 brcc .+6 ; 0x62a <__LOCK_REGION_LENGTH__+0x22a> - 624: 88 35 cpi r24, 0x58 ; 88 - 626: 79 f0 breq .+30 ; 0x646 <__LOCK_REGION_LENGTH__+0x246> - 628: ae c0 rjmp .+348 ; 0x786 <__LOCK_REGION_LENGTH__+0x386> - 62a: 80 37 cpi r24, 0x70 ; 112 - 62c: 19 f0 breq .+6 ; 0x634 <__LOCK_REGION_LENGTH__+0x234> - 62e: 88 37 cpi r24, 0x78 ; 120 - 630: 21 f0 breq .+8 ; 0x63a <__LOCK_REGION_LENGTH__+0x23a> - 632: a9 c0 rjmp .+338 ; 0x786 <__LOCK_REGION_LENGTH__+0x386> - 634: e9 2f mov r30, r25 - 636: e0 61 ori r30, 0x10 ; 16 - 638: be 2e mov r11, r30 - 63a: b4 fe sbrs r11, 4 - 63c: 0d c0 rjmp .+26 ; 0x658 <__LOCK_REGION_LENGTH__+0x258> - 63e: fb 2d mov r31, r11 - 640: f4 60 ori r31, 0x04 ; 4 - 642: bf 2e mov r11, r31 - 644: 09 c0 rjmp .+18 ; 0x658 <__LOCK_REGION_LENGTH__+0x258> - 646: 34 fe sbrs r3, 4 - 648: 0a c0 rjmp .+20 ; 0x65e <__LOCK_REGION_LENGTH__+0x25e> - 64a: 29 2f mov r18, r25 - 64c: 26 60 ori r18, 0x06 ; 6 - 64e: b2 2e mov r11, r18 - 650: 06 c0 rjmp .+12 ; 0x65e <__LOCK_REGION_LENGTH__+0x25e> - 652: 28 e0 ldi r18, 0x08 ; 8 +static enum interrupt_status int_stat = INTERRUPT_RISING; + +void wait_us(unsigned int us) +{ + for(int i = 0; i < us; i++) + 2e6: 20 e0 ldi r18, 0x00 ; 0 + 2e8: 30 e0 ldi r19, 0x00 ; 0 + 2ea: 06 c0 rjmp .+12 ; 0x2f8 + #else + //round up by default + __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); + #endif + + __builtin_avr_delay_cycles(__ticks_dc); + 2ec: 43 e0 ldi r20, 0x03 ; 3 + 2ee: 4a 95 dec r20 + 2f0: f1 f7 brne .-4 ; 0x2ee + 2f2: 00 00 nop + 2f4: 2f 5f subi r18, 0xFF ; 255 + 2f6: 3f 4f sbci r19, 0xFF ; 255 + 2f8: 28 17 cp r18, r24 + 2fa: 39 07 cpc r19, r25 + 2fc: b8 f3 brcs .-18 ; 0x2ec + { + _delay_us(1); + } +} + 2fe: 08 95 ret + +00000300 : + +void wait_ms(unsigned int ms) +{ + + for(int i = 0; i < ms; i++) + 300: 20 e0 ldi r18, 0x00 ; 0 + 302: 30 e0 ldi r19, 0x00 ; 0 + 304: 08 c0 rjmp .+16 ; 0x316 + #else + //round up by default + __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); + #endif + + __builtin_avr_delay_cycles(__ticks_dc); + 306: e3 ec ldi r30, 0xC3 ; 195 + 308: f9 e0 ldi r31, 0x09 ; 9 + 30a: 31 97 sbiw r30, 0x01 ; 1 + 30c: f1 f7 brne .-4 ; 0x30a + 30e: 00 c0 rjmp .+0 ; 0x310 + 310: 00 00 nop + 312: 2f 5f subi r18, 0xFF ; 255 + 314: 3f 4f sbci r19, 0xFF ; 255 + 316: 28 17 cp r18, r24 + 318: 39 07 cpc r19, r25 + 31a: a8 f3 brcs .-22 ; 0x306 + { + _delay_ms(1); + } +} + 31c: 08 95 ret + +0000031e : +void ultrasonic_init() +{ + DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug + 31e: 8f ef ldi r24, 0xFF ; 255 + 320: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> + DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt + 324: 11 ba out 0x11, r1 ; 17 + + EICRA = 0x03; // interrupt PORTD on pin 0, rising edge + 326: 83 e0 ldi r24, 0x03 ; 3 + 328: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + + EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) + 32c: 89 b7 in r24, 0x39 ; 57 + 32e: 81 60 ori r24, 0x01 ; 1 + 330: 89 bf out 0x39, r24 ; 57 + + TCCR1A = 0b00000000; // initialize timer1, prescaler=256 + 332: 1f bc out 0x2f, r1 ; 47 + TCCR1B = 0b00001100; // CTC compare A, RUN + 334: 8c e0 ldi r24, 0x0C ; 12 + 336: 8e bd out 0x2e, r24 ; 46 + + sei(); // turn on interrupt system + 338: 78 94 sei + 33a: 08 95 ret + +0000033c : +} + +void ultrasonic_send_pulse() +{ + 33c: cf 93 push r28 + 33e: df 93 push r29 + PORTG = 0x00; // 10 us low pulse + 340: c5 e6 ldi r28, 0x65 ; 101 + 342: d0 e0 ldi r29, 0x00 ; 0 + 344: 18 82 st Y, r1 + wait_us(10); + 346: 8a e0 ldi r24, 0x0A ; 10 + 348: 90 e0 ldi r25, 0x00 ; 0 + 34a: cd df rcall .-102 ; 0x2e6 + PORTG = 0x01; + 34c: 81 e0 ldi r24, 0x01 ; 1 + 34e: 88 83 st Y, r24 +} + 350: df 91 pop r29 + 352: cf 91 pop r28 + 354: 08 95 ret + +00000356 : + +void ultrasonic_handle_interrupt() +{ + // if the interrupt was generated on a rising edge (start sending echo) + if (int_stat == INTERRUPT_RISING) + 356: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> + 35a: 81 30 cpi r24, 0x01 ; 1 + 35c: 41 f4 brne .+16 ; 0x36e + { + // set interrupt pin 0 on PORTD to falling edge + EICRA = 0x02; + 35e: 82 e0 ldi r24, 0x02 ; 2 + 360: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + + // reset the time in timer1 + TCNT1 = 0x00; + 364: 1d bc out 0x2d, r1 ; 45 + 366: 1c bc out 0x2c, r1 ; 44 + + // set interrupt status + int_stat = INTERRUPT_FALLING; + 368: 10 92 00 01 sts 0x0100, r1 ; 0x800100 <__DATA_REGION_ORIGIN__> + 36c: 08 95 ret + } else + // else if it was generated on a falling edge (end sending echo) + { + // set interrupt pin 0 on PORTD to rising edge + EICRA = 0x03; + 36e: 83 e0 ldi r24, 0x03 ; 3 + 370: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + + // read timer1 into time_dist + timer_dist = TCNT1; + 374: 8c b5 in r24, 0x2c ; 44 + 376: 9d b5 in r25, 0x2d ; 45 + 378: 90 93 05 01 sts 0x0105, r25 ; 0x800105 <__data_end+0x1> + 37c: 80 93 04 01 sts 0x0104, r24 ; 0x800104 <__data_end> + + // set interrupt status + int_stat = INTERRUPT_RISING; + 380: 81 e0 ldi r24, 0x01 ; 1 + 382: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> + 386: 08 95 ret + +00000388 : +} + +uint16_t ultrasonic_get_timer_dist() +{ + return timer_dist; +} + 388: 80 91 04 01 lds r24, 0x0104 ; 0x800104 <__data_end> + 38c: 90 91 05 01 lds r25, 0x0105 ; 0x800105 <__data_end+0x1> + 390: 08 95 ret + +00000392 : + 392: 0f 93 push r16 + 394: 1f 93 push r17 + 396: cf 93 push r28 + 398: df 93 push r29 + 39a: cd b7 in r28, 0x3d ; 61 + 39c: de b7 in r29, 0x3e ; 62 + 39e: 2e 97 sbiw r28, 0x0e ; 14 + 3a0: 0f b6 in r0, 0x3f ; 63 + 3a2: f8 94 cli + 3a4: de bf out 0x3e, r29 ; 62 + 3a6: 0f be out 0x3f, r0 ; 63 + 3a8: cd bf out 0x3d, r28 ; 61 + 3aa: 0d 89 ldd r16, Y+21 ; 0x15 + 3ac: 1e 89 ldd r17, Y+22 ; 0x16 + 3ae: 8f 89 ldd r24, Y+23 ; 0x17 + 3b0: 98 8d ldd r25, Y+24 ; 0x18 + 3b2: 26 e0 ldi r18, 0x06 ; 6 + 3b4: 2c 83 std Y+4, r18 ; 0x04 + 3b6: 1a 83 std Y+2, r17 ; 0x02 + 3b8: 09 83 std Y+1, r16 ; 0x01 + 3ba: 97 ff sbrs r25, 7 + 3bc: 02 c0 rjmp .+4 ; 0x3c2 + 3be: 80 e0 ldi r24, 0x00 ; 0 + 3c0: 90 e8 ldi r25, 0x80 ; 128 + 3c2: 01 97 sbiw r24, 0x01 ; 1 + 3c4: 9e 83 std Y+6, r25 ; 0x06 + 3c6: 8d 83 std Y+5, r24 ; 0x05 + 3c8: ae 01 movw r20, r28 + 3ca: 45 5e subi r20, 0xE5 ; 229 + 3cc: 5f 4f sbci r21, 0xFF ; 255 + 3ce: 69 8d ldd r22, Y+25 ; 0x19 + 3d0: 7a 8d ldd r23, Y+26 ; 0x1a + 3d2: ce 01 movw r24, r28 + 3d4: 01 96 adiw r24, 0x01 ; 1 + 3d6: 19 d0 rcall .+50 ; 0x40a + 3d8: 4d 81 ldd r20, Y+5 ; 0x05 + 3da: 5e 81 ldd r21, Y+6 ; 0x06 + 3dc: 57 fd sbrc r21, 7 + 3de: 0a c0 rjmp .+20 ; 0x3f4 + 3e0: 2f 81 ldd r18, Y+7 ; 0x07 + 3e2: 38 85 ldd r19, Y+8 ; 0x08 + 3e4: 42 17 cp r20, r18 + 3e6: 53 07 cpc r21, r19 + 3e8: 0c f4 brge .+2 ; 0x3ec + 3ea: 9a 01 movw r18, r20 + 3ec: f8 01 movw r30, r16 + 3ee: e2 0f add r30, r18 + 3f0: f3 1f adc r31, r19 + 3f2: 10 82 st Z, r1 + 3f4: 2e 96 adiw r28, 0x0e ; 14 + 3f6: 0f b6 in r0, 0x3f ; 63 + 3f8: f8 94 cli + 3fa: de bf out 0x3e, r29 ; 62 + 3fc: 0f be out 0x3f, r0 ; 63 + 3fe: cd bf out 0x3d, r28 ; 61 + 400: df 91 pop r29 + 402: cf 91 pop r28 + 404: 1f 91 pop r17 + 406: 0f 91 pop r16 + 408: 08 95 ret + +0000040a : + 40a: 2f 92 push r2 + 40c: 3f 92 push r3 + 40e: 4f 92 push r4 + 410: 5f 92 push r5 + 412: 6f 92 push r6 + 414: 7f 92 push r7 + 416: 8f 92 push r8 + 418: 9f 92 push r9 + 41a: af 92 push r10 + 41c: bf 92 push r11 + 41e: cf 92 push r12 + 420: df 92 push r13 + 422: ef 92 push r14 + 424: ff 92 push r15 + 426: 0f 93 push r16 + 428: 1f 93 push r17 + 42a: cf 93 push r28 + 42c: df 93 push r29 + 42e: cd b7 in r28, 0x3d ; 61 + 430: de b7 in r29, 0x3e ; 62 + 432: 2b 97 sbiw r28, 0x0b ; 11 + 434: 0f b6 in r0, 0x3f ; 63 + 436: f8 94 cli + 438: de bf out 0x3e, r29 ; 62 + 43a: 0f be out 0x3f, r0 ; 63 + 43c: cd bf out 0x3d, r28 ; 61 + 43e: 6c 01 movw r12, r24 + 440: 7b 01 movw r14, r22 + 442: 8a 01 movw r16, r20 + 444: fc 01 movw r30, r24 + 446: 17 82 std Z+7, r1 ; 0x07 + 448: 16 82 std Z+6, r1 ; 0x06 + 44a: 83 81 ldd r24, Z+3 ; 0x03 + 44c: 81 ff sbrs r24, 1 + 44e: bf c1 rjmp .+894 ; 0x7ce + 450: ce 01 movw r24, r28 + 452: 01 96 adiw r24, 0x01 ; 1 + 454: 3c 01 movw r6, r24 + 456: f6 01 movw r30, r12 + 458: 93 81 ldd r25, Z+3 ; 0x03 + 45a: f7 01 movw r30, r14 + 45c: 93 fd sbrc r25, 3 + 45e: 85 91 lpm r24, Z+ + 460: 93 ff sbrs r25, 3 + 462: 81 91 ld r24, Z+ + 464: 7f 01 movw r14, r30 + 466: 88 23 and r24, r24 + 468: 09 f4 brne .+2 ; 0x46c + 46a: ad c1 rjmp .+858 ; 0x7c6 + 46c: 85 32 cpi r24, 0x25 ; 37 + 46e: 39 f4 brne .+14 ; 0x47e + 470: 93 fd sbrc r25, 3 + 472: 85 91 lpm r24, Z+ + 474: 93 ff sbrs r25, 3 + 476: 81 91 ld r24, Z+ + 478: 7f 01 movw r14, r30 + 47a: 85 32 cpi r24, 0x25 ; 37 + 47c: 21 f4 brne .+8 ; 0x486 + 47e: b6 01 movw r22, r12 + 480: 90 e0 ldi r25, 0x00 ; 0 + 482: d6 d1 rcall .+940 ; 0x830 + 484: e8 cf rjmp .-48 ; 0x456 + 486: 91 2c mov r9, r1 + 488: 21 2c mov r2, r1 + 48a: 31 2c mov r3, r1 + 48c: ff e1 ldi r31, 0x1F ; 31 + 48e: f3 15 cp r31, r3 + 490: d8 f0 brcs .+54 ; 0x4c8 + 492: 8b 32 cpi r24, 0x2B ; 43 + 494: 79 f0 breq .+30 ; 0x4b4 + 496: 38 f4 brcc .+14 ; 0x4a6 + 498: 80 32 cpi r24, 0x20 ; 32 + 49a: 79 f0 breq .+30 ; 0x4ba + 49c: 83 32 cpi r24, 0x23 ; 35 + 49e: a1 f4 brne .+40 ; 0x4c8 + 4a0: 23 2d mov r18, r3 + 4a2: 20 61 ori r18, 0x10 ; 16 + 4a4: 1d c0 rjmp .+58 ; 0x4e0 + 4a6: 8d 32 cpi r24, 0x2D ; 45 + 4a8: 61 f0 breq .+24 ; 0x4c2 + 4aa: 80 33 cpi r24, 0x30 ; 48 + 4ac: 69 f4 brne .+26 ; 0x4c8 + 4ae: 23 2d mov r18, r3 + 4b0: 21 60 ori r18, 0x01 ; 1 + 4b2: 16 c0 rjmp .+44 ; 0x4e0 + 4b4: 83 2d mov r24, r3 + 4b6: 82 60 ori r24, 0x02 ; 2 + 4b8: 38 2e mov r3, r24 + 4ba: e3 2d mov r30, r3 + 4bc: e4 60 ori r30, 0x04 ; 4 + 4be: 3e 2e mov r3, r30 + 4c0: 2a c0 rjmp .+84 ; 0x516 + 4c2: f3 2d mov r31, r3 + 4c4: f8 60 ori r31, 0x08 ; 8 + 4c6: 1d c0 rjmp .+58 ; 0x502 + 4c8: 37 fc sbrc r3, 7 + 4ca: 2d c0 rjmp .+90 ; 0x526 + 4cc: 20 ed ldi r18, 0xD0 ; 208 + 4ce: 28 0f add r18, r24 + 4d0: 2a 30 cpi r18, 0x0A ; 10 + 4d2: 40 f0 brcs .+16 ; 0x4e4 + 4d4: 8e 32 cpi r24, 0x2E ; 46 + 4d6: b9 f4 brne .+46 ; 0x506 + 4d8: 36 fc sbrc r3, 6 + 4da: 75 c1 rjmp .+746 ; 0x7c6 + 4dc: 23 2d mov r18, r3 + 4de: 20 64 ori r18, 0x40 ; 64 + 4e0: 32 2e mov r3, r18 + 4e2: 19 c0 rjmp .+50 ; 0x516 + 4e4: 36 fe sbrs r3, 6 + 4e6: 06 c0 rjmp .+12 ; 0x4f4 + 4e8: 8a e0 ldi r24, 0x0A ; 10 + 4ea: 98 9e mul r9, r24 + 4ec: 20 0d add r18, r0 + 4ee: 11 24 eor r1, r1 + 4f0: 92 2e mov r9, r18 + 4f2: 11 c0 rjmp .+34 ; 0x516 + 4f4: ea e0 ldi r30, 0x0A ; 10 + 4f6: 2e 9e mul r2, r30 + 4f8: 20 0d add r18, r0 + 4fa: 11 24 eor r1, r1 + 4fc: 22 2e mov r2, r18 + 4fe: f3 2d mov r31, r3 + 500: f0 62 ori r31, 0x20 ; 32 + 502: 3f 2e mov r3, r31 + 504: 08 c0 rjmp .+16 ; 0x516 + 506: 8c 36 cpi r24, 0x6C ; 108 + 508: 21 f4 brne .+8 ; 0x512 + 50a: 83 2d mov r24, r3 + 50c: 80 68 ori r24, 0x80 ; 128 + 50e: 38 2e mov r3, r24 + 510: 02 c0 rjmp .+4 ; 0x516 + 512: 88 36 cpi r24, 0x68 ; 104 + 514: 41 f4 brne .+16 ; 0x526 + 516: f7 01 movw r30, r14 + 518: 93 fd sbrc r25, 3 + 51a: 85 91 lpm r24, Z+ + 51c: 93 ff sbrs r25, 3 + 51e: 81 91 ld r24, Z+ + 520: 7f 01 movw r14, r30 + 522: 81 11 cpse r24, r1 + 524: b3 cf rjmp .-154 ; 0x48c + 526: 98 2f mov r25, r24 + 528: 9f 7d andi r25, 0xDF ; 223 + 52a: 95 54 subi r25, 0x45 ; 69 + 52c: 93 30 cpi r25, 0x03 ; 3 + 52e: 28 f4 brcc .+10 ; 0x53a + 530: 0c 5f subi r16, 0xFC ; 252 + 532: 1f 4f sbci r17, 0xFF ; 255 + 534: 9f e3 ldi r25, 0x3F ; 63 + 536: 99 83 std Y+1, r25 ; 0x01 + 538: 0d c0 rjmp .+26 ; 0x554 + 53a: 83 36 cpi r24, 0x63 ; 99 + 53c: 31 f0 breq .+12 ; 0x54a + 53e: 83 37 cpi r24, 0x73 ; 115 + 540: 71 f0 breq .+28 ; 0x55e + 542: 83 35 cpi r24, 0x53 ; 83 + 544: 09 f0 breq .+2 ; 0x548 + 546: 55 c0 rjmp .+170 ; 0x5f2 + 548: 20 c0 rjmp .+64 ; 0x58a + 54a: f8 01 movw r30, r16 + 54c: 80 81 ld r24, Z + 54e: 89 83 std Y+1, r24 ; 0x01 + 550: 0e 5f subi r16, 0xFE ; 254 + 552: 1f 4f sbci r17, 0xFF ; 255 + 554: 88 24 eor r8, r8 + 556: 83 94 inc r8 + 558: 91 2c mov r9, r1 + 55a: 53 01 movw r10, r6 + 55c: 12 c0 rjmp .+36 ; 0x582 + 55e: 28 01 movw r4, r16 + 560: f2 e0 ldi r31, 0x02 ; 2 + 562: 4f 0e add r4, r31 + 564: 51 1c adc r5, r1 + 566: f8 01 movw r30, r16 + 568: a0 80 ld r10, Z + 56a: b1 80 ldd r11, Z+1 ; 0x01 + 56c: 36 fe sbrs r3, 6 + 56e: 03 c0 rjmp .+6 ; 0x576 + 570: 69 2d mov r22, r9 + 572: 70 e0 ldi r23, 0x00 ; 0 + 574: 02 c0 rjmp .+4 ; 0x57a + 576: 6f ef ldi r22, 0xFF ; 255 + 578: 7f ef ldi r23, 0xFF ; 255 + 57a: c5 01 movw r24, r10 + 57c: 4e d1 rcall .+668 ; 0x81a + 57e: 4c 01 movw r8, r24 + 580: 82 01 movw r16, r4 + 582: f3 2d mov r31, r3 + 584: ff 77 andi r31, 0x7F ; 127 + 586: 3f 2e mov r3, r31 + 588: 15 c0 rjmp .+42 ; 0x5b4 + 58a: 28 01 movw r4, r16 + 58c: 22 e0 ldi r18, 0x02 ; 2 + 58e: 42 0e add r4, r18 + 590: 51 1c adc r5, r1 + 592: f8 01 movw r30, r16 + 594: a0 80 ld r10, Z + 596: b1 80 ldd r11, Z+1 ; 0x01 + 598: 36 fe sbrs r3, 6 + 59a: 03 c0 rjmp .+6 ; 0x5a2 + 59c: 69 2d mov r22, r9 + 59e: 70 e0 ldi r23, 0x00 ; 0 + 5a0: 02 c0 rjmp .+4 ; 0x5a6 + 5a2: 6f ef ldi r22, 0xFF ; 255 + 5a4: 7f ef ldi r23, 0xFF ; 255 + 5a6: c5 01 movw r24, r10 + 5a8: 2d d1 rcall .+602 ; 0x804 + 5aa: 4c 01 movw r8, r24 + 5ac: f3 2d mov r31, r3 + 5ae: f0 68 ori r31, 0x80 ; 128 + 5b0: 3f 2e mov r3, r31 + 5b2: 82 01 movw r16, r4 + 5b4: 33 fc sbrc r3, 3 + 5b6: 19 c0 rjmp .+50 ; 0x5ea + 5b8: 82 2d mov r24, r2 + 5ba: 90 e0 ldi r25, 0x00 ; 0 + 5bc: 88 16 cp r8, r24 + 5be: 99 06 cpc r9, r25 + 5c0: a0 f4 brcc .+40 ; 0x5ea + 5c2: b6 01 movw r22, r12 + 5c4: 80 e2 ldi r24, 0x20 ; 32 + 5c6: 90 e0 ldi r25, 0x00 ; 0 + 5c8: 33 d1 rcall .+614 ; 0x830 + 5ca: 2a 94 dec r2 + 5cc: f5 cf rjmp .-22 ; 0x5b8 + 5ce: f5 01 movw r30, r10 + 5d0: 37 fc sbrc r3, 7 + 5d2: 85 91 lpm r24, Z+ + 5d4: 37 fe sbrs r3, 7 + 5d6: 81 91 ld r24, Z+ + 5d8: 5f 01 movw r10, r30 + 5da: b6 01 movw r22, r12 + 5dc: 90 e0 ldi r25, 0x00 ; 0 + 5de: 28 d1 rcall .+592 ; 0x830 + 5e0: 21 10 cpse r2, r1 + 5e2: 2a 94 dec r2 + 5e4: 21 e0 ldi r18, 0x01 ; 1 + 5e6: 82 1a sub r8, r18 + 5e8: 91 08 sbc r9, r1 + 5ea: 81 14 cp r8, r1 + 5ec: 91 04 cpc r9, r1 + 5ee: 79 f7 brne .-34 ; 0x5ce + 5f0: e1 c0 rjmp .+450 ; 0x7b4 + 5f2: 84 36 cpi r24, 0x64 ; 100 + 5f4: 11 f0 breq .+4 ; 0x5fa + 5f6: 89 36 cpi r24, 0x69 ; 105 + 5f8: 39 f5 brne .+78 ; 0x648 + 5fa: f8 01 movw r30, r16 + 5fc: 37 fe sbrs r3, 7 + 5fe: 07 c0 rjmp .+14 ; 0x60e + 600: 60 81 ld r22, Z + 602: 71 81 ldd r23, Z+1 ; 0x01 + 604: 82 81 ldd r24, Z+2 ; 0x02 + 606: 93 81 ldd r25, Z+3 ; 0x03 + 608: 0c 5f subi r16, 0xFC ; 252 + 60a: 1f 4f sbci r17, 0xFF ; 255 + 60c: 08 c0 rjmp .+16 ; 0x61e + 60e: 60 81 ld r22, Z + 610: 71 81 ldd r23, Z+1 ; 0x01 + 612: 07 2e mov r0, r23 + 614: 00 0c add r0, r0 + 616: 88 0b sbc r24, r24 + 618: 99 0b sbc r25, r25 + 61a: 0e 5f subi r16, 0xFE ; 254 + 61c: 1f 4f sbci r17, 0xFF ; 255 + 61e: f3 2d mov r31, r3 + 620: ff 76 andi r31, 0x6F ; 111 + 622: 3f 2e mov r3, r31 + 624: 97 ff sbrs r25, 7 + 626: 09 c0 rjmp .+18 ; 0x63a + 628: 90 95 com r25 + 62a: 80 95 com r24 + 62c: 70 95 com r23 + 62e: 61 95 neg r22 + 630: 7f 4f sbci r23, 0xFF ; 255 + 632: 8f 4f sbci r24, 0xFF ; 255 + 634: 9f 4f sbci r25, 0xFF ; 255 + 636: f0 68 ori r31, 0x80 ; 128 + 638: 3f 2e mov r3, r31 + 63a: 2a e0 ldi r18, 0x0A ; 10 + 63c: 30 e0 ldi r19, 0x00 ; 0 + 63e: a3 01 movw r20, r6 + 640: 33 d1 rcall .+614 ; 0x8a8 <__ultoa_invert> + 642: 88 2e mov r8, r24 + 644: 86 18 sub r8, r6 + 646: 44 c0 rjmp .+136 ; 0x6d0 + 648: 85 37 cpi r24, 0x75 ; 117 + 64a: 31 f4 brne .+12 ; 0x658 + 64c: 23 2d mov r18, r3 + 64e: 2f 7e andi r18, 0xEF ; 239 + 650: b2 2e mov r11, r18 + 652: 2a e0 ldi r18, 0x0A ; 10 654: 30 e0 ldi r19, 0x00 ; 0 - 656: 05 c0 rjmp .+10 ; 0x662 <__LOCK_REGION_LENGTH__+0x262> - 658: 20 e1 ldi r18, 0x10 ; 16 - 65a: 30 e0 ldi r19, 0x00 ; 0 - 65c: 02 c0 rjmp .+4 ; 0x662 <__LOCK_REGION_LENGTH__+0x262> - 65e: 20 e1 ldi r18, 0x10 ; 16 - 660: 32 e0 ldi r19, 0x02 ; 2 - 662: f8 01 movw r30, r16 - 664: b7 fe sbrs r11, 7 - 666: 07 c0 rjmp .+14 ; 0x676 <__LOCK_REGION_LENGTH__+0x276> - 668: 60 81 ld r22, Z - 66a: 71 81 ldd r23, Z+1 ; 0x01 - 66c: 82 81 ldd r24, Z+2 ; 0x02 - 66e: 93 81 ldd r25, Z+3 ; 0x03 - 670: 0c 5f subi r16, 0xFC ; 252 - 672: 1f 4f sbci r17, 0xFF ; 255 - 674: 06 c0 rjmp .+12 ; 0x682 <__LOCK_REGION_LENGTH__+0x282> - 676: 60 81 ld r22, Z - 678: 71 81 ldd r23, Z+1 ; 0x01 - 67a: 80 e0 ldi r24, 0x00 ; 0 - 67c: 90 e0 ldi r25, 0x00 ; 0 - 67e: 0e 5f subi r16, 0xFE ; 254 - 680: 1f 4f sbci r17, 0xFF ; 255 - 682: a3 01 movw r20, r6 - 684: f1 d0 rcall .+482 ; 0x868 <__ultoa_invert> - 686: 88 2e mov r8, r24 - 688: 86 18 sub r8, r6 - 68a: fb 2d mov r31, r11 - 68c: ff 77 andi r31, 0x7F ; 127 - 68e: 3f 2e mov r3, r31 - 690: 36 fe sbrs r3, 6 - 692: 0d c0 rjmp .+26 ; 0x6ae <__LOCK_REGION_LENGTH__+0x2ae> - 694: 23 2d mov r18, r3 - 696: 2e 7f andi r18, 0xFE ; 254 - 698: a2 2e mov r10, r18 - 69a: 89 14 cp r8, r9 - 69c: 58 f4 brcc .+22 ; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4> - 69e: 34 fe sbrs r3, 4 - 6a0: 0b c0 rjmp .+22 ; 0x6b8 <__LOCK_REGION_LENGTH__+0x2b8> - 6a2: 32 fc sbrc r3, 2 - 6a4: 09 c0 rjmp .+18 ; 0x6b8 <__LOCK_REGION_LENGTH__+0x2b8> - 6a6: 83 2d mov r24, r3 - 6a8: 8e 7e andi r24, 0xEE ; 238 - 6aa: a8 2e mov r10, r24 - 6ac: 05 c0 rjmp .+10 ; 0x6b8 <__LOCK_REGION_LENGTH__+0x2b8> - 6ae: b8 2c mov r11, r8 - 6b0: a3 2c mov r10, r3 - 6b2: 03 c0 rjmp .+6 ; 0x6ba <__LOCK_REGION_LENGTH__+0x2ba> - 6b4: b8 2c mov r11, r8 - 6b6: 01 c0 rjmp .+2 ; 0x6ba <__LOCK_REGION_LENGTH__+0x2ba> - 6b8: b9 2c mov r11, r9 - 6ba: a4 fe sbrs r10, 4 - 6bc: 0f c0 rjmp .+30 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> - 6be: fe 01 movw r30, r28 - 6c0: e8 0d add r30, r8 - 6c2: f1 1d adc r31, r1 - 6c4: 80 81 ld r24, Z - 6c6: 80 33 cpi r24, 0x30 ; 48 - 6c8: 21 f4 brne .+8 ; 0x6d2 <__LOCK_REGION_LENGTH__+0x2d2> - 6ca: 9a 2d mov r25, r10 - 6cc: 99 7e andi r25, 0xE9 ; 233 - 6ce: a9 2e mov r10, r25 - 6d0: 09 c0 rjmp .+18 ; 0x6e4 <__LOCK_REGION_LENGTH__+0x2e4> - 6d2: a2 fe sbrs r10, 2 - 6d4: 06 c0 rjmp .+12 ; 0x6e2 <__LOCK_REGION_LENGTH__+0x2e2> - 6d6: b3 94 inc r11 - 6d8: b3 94 inc r11 - 6da: 04 c0 rjmp .+8 ; 0x6e4 <__LOCK_REGION_LENGTH__+0x2e4> - 6dc: 8a 2d mov r24, r10 - 6de: 86 78 andi r24, 0x86 ; 134 - 6e0: 09 f0 breq .+2 ; 0x6e4 <__LOCK_REGION_LENGTH__+0x2e4> - 6e2: b3 94 inc r11 - 6e4: a3 fc sbrc r10, 3 - 6e6: 10 c0 rjmp .+32 ; 0x708 <__LOCK_REGION_LENGTH__+0x308> - 6e8: a0 fe sbrs r10, 0 - 6ea: 06 c0 rjmp .+12 ; 0x6f8 <__LOCK_REGION_LENGTH__+0x2f8> - 6ec: b2 14 cp r11, r2 - 6ee: 80 f4 brcc .+32 ; 0x710 <__LOCK_REGION_LENGTH__+0x310> - 6f0: 28 0c add r2, r8 - 6f2: 92 2c mov r9, r2 - 6f4: 9b 18 sub r9, r11 - 6f6: 0d c0 rjmp .+26 ; 0x712 <__LOCK_REGION_LENGTH__+0x312> - 6f8: b2 14 cp r11, r2 - 6fa: 58 f4 brcc .+22 ; 0x712 <__LOCK_REGION_LENGTH__+0x312> - 6fc: b6 01 movw r22, r12 - 6fe: 80 e2 ldi r24, 0x20 ; 32 - 700: 90 e0 ldi r25, 0x00 ; 0 - 702: 76 d0 rcall .+236 ; 0x7f0 - 704: b3 94 inc r11 - 706: f8 cf rjmp .-16 ; 0x6f8 <__LOCK_REGION_LENGTH__+0x2f8> - 708: b2 14 cp r11, r2 - 70a: 18 f4 brcc .+6 ; 0x712 <__LOCK_REGION_LENGTH__+0x312> - 70c: 2b 18 sub r2, r11 - 70e: 02 c0 rjmp .+4 ; 0x714 <__LOCK_REGION_LENGTH__+0x314> - 710: 98 2c mov r9, r8 - 712: 21 2c mov r2, r1 - 714: a4 fe sbrs r10, 4 - 716: 0f c0 rjmp .+30 ; 0x736 <__LOCK_REGION_LENGTH__+0x336> - 718: b6 01 movw r22, r12 - 71a: 80 e3 ldi r24, 0x30 ; 48 - 71c: 90 e0 ldi r25, 0x00 ; 0 - 71e: 68 d0 rcall .+208 ; 0x7f0 - 720: a2 fe sbrs r10, 2 - 722: 16 c0 rjmp .+44 ; 0x750 <__LOCK_REGION_LENGTH__+0x350> - 724: a1 fc sbrc r10, 1 - 726: 03 c0 rjmp .+6 ; 0x72e <__LOCK_REGION_LENGTH__+0x32e> - 728: 88 e7 ldi r24, 0x78 ; 120 - 72a: 90 e0 ldi r25, 0x00 ; 0 - 72c: 02 c0 rjmp .+4 ; 0x732 <__LOCK_REGION_LENGTH__+0x332> - 72e: 88 e5 ldi r24, 0x58 ; 88 - 730: 90 e0 ldi r25, 0x00 ; 0 - 732: b6 01 movw r22, r12 - 734: 0c c0 rjmp .+24 ; 0x74e <__LOCK_REGION_LENGTH__+0x34e> - 736: 8a 2d mov r24, r10 - 738: 86 78 andi r24, 0x86 ; 134 - 73a: 51 f0 breq .+20 ; 0x750 <__LOCK_REGION_LENGTH__+0x350> - 73c: a1 fe sbrs r10, 1 - 73e: 02 c0 rjmp .+4 ; 0x744 <__LOCK_REGION_LENGTH__+0x344> - 740: 8b e2 ldi r24, 0x2B ; 43 - 742: 01 c0 rjmp .+2 ; 0x746 <__LOCK_REGION_LENGTH__+0x346> - 744: 80 e2 ldi r24, 0x20 ; 32 - 746: a7 fc sbrc r10, 7 - 748: 8d e2 ldi r24, 0x2D ; 45 - 74a: b6 01 movw r22, r12 - 74c: 90 e0 ldi r25, 0x00 ; 0 - 74e: 50 d0 rcall .+160 ; 0x7f0 - 750: 89 14 cp r8, r9 - 752: 30 f4 brcc .+12 ; 0x760 <__LOCK_REGION_LENGTH__+0x360> - 754: b6 01 movw r22, r12 - 756: 80 e3 ldi r24, 0x30 ; 48 - 758: 90 e0 ldi r25, 0x00 ; 0 - 75a: 4a d0 rcall .+148 ; 0x7f0 - 75c: 9a 94 dec r9 - 75e: f8 cf rjmp .-16 ; 0x750 <__LOCK_REGION_LENGTH__+0x350> - 760: 8a 94 dec r8 - 762: f3 01 movw r30, r6 - 764: e8 0d add r30, r8 - 766: f1 1d adc r31, r1 - 768: 80 81 ld r24, Z - 76a: b6 01 movw r22, r12 - 76c: 90 e0 ldi r25, 0x00 ; 0 - 76e: 40 d0 rcall .+128 ; 0x7f0 - 770: 81 10 cpse r8, r1 - 772: f6 cf rjmp .-20 ; 0x760 <__LOCK_REGION_LENGTH__+0x360> - 774: 22 20 and r2, r2 - 776: 09 f4 brne .+2 ; 0x77a <__LOCK_REGION_LENGTH__+0x37a> - 778: 4e ce rjmp .-868 ; 0x416 <__LOCK_REGION_LENGTH__+0x16> - 77a: b6 01 movw r22, r12 - 77c: 80 e2 ldi r24, 0x20 ; 32 - 77e: 90 e0 ldi r25, 0x00 ; 0 - 780: 37 d0 rcall .+110 ; 0x7f0 - 782: 2a 94 dec r2 - 784: f7 cf rjmp .-18 ; 0x774 <__LOCK_REGION_LENGTH__+0x374> - 786: f6 01 movw r30, r12 - 788: 86 81 ldd r24, Z+6 ; 0x06 - 78a: 97 81 ldd r25, Z+7 ; 0x07 - 78c: 02 c0 rjmp .+4 ; 0x792 <__LOCK_REGION_LENGTH__+0x392> - 78e: 8f ef ldi r24, 0xFF ; 255 - 790: 9f ef ldi r25, 0xFF ; 255 - 792: 2b 96 adiw r28, 0x0b ; 11 - 794: 0f b6 in r0, 0x3f ; 63 - 796: f8 94 cli - 798: de bf out 0x3e, r29 ; 62 - 79a: 0f be out 0x3f, r0 ; 63 - 79c: cd bf out 0x3d, r28 ; 61 - 79e: df 91 pop r29 - 7a0: cf 91 pop r28 - 7a2: 1f 91 pop r17 - 7a4: 0f 91 pop r16 - 7a6: ff 90 pop r15 - 7a8: ef 90 pop r14 - 7aa: df 90 pop r13 - 7ac: cf 90 pop r12 - 7ae: bf 90 pop r11 - 7b0: af 90 pop r10 - 7b2: 9f 90 pop r9 - 7b4: 8f 90 pop r8 - 7b6: 7f 90 pop r7 - 7b8: 6f 90 pop r6 - 7ba: 5f 90 pop r5 - 7bc: 4f 90 pop r4 - 7be: 3f 90 pop r3 - 7c0: 2f 90 pop r2 - 7c2: 08 95 ret + 656: 25 c0 rjmp .+74 ; 0x6a2 + 658: 93 2d mov r25, r3 + 65a: 99 7f andi r25, 0xF9 ; 249 + 65c: b9 2e mov r11, r25 + 65e: 8f 36 cpi r24, 0x6F ; 111 + 660: c1 f0 breq .+48 ; 0x692 + 662: 18 f4 brcc .+6 ; 0x66a + 664: 88 35 cpi r24, 0x58 ; 88 + 666: 79 f0 breq .+30 ; 0x686 + 668: ae c0 rjmp .+348 ; 0x7c6 + 66a: 80 37 cpi r24, 0x70 ; 112 + 66c: 19 f0 breq .+6 ; 0x674 + 66e: 88 37 cpi r24, 0x78 ; 120 + 670: 21 f0 breq .+8 ; 0x67a + 672: a9 c0 rjmp .+338 ; 0x7c6 + 674: e9 2f mov r30, r25 + 676: e0 61 ori r30, 0x10 ; 16 + 678: be 2e mov r11, r30 + 67a: b4 fe sbrs r11, 4 + 67c: 0d c0 rjmp .+26 ; 0x698 + 67e: fb 2d mov r31, r11 + 680: f4 60 ori r31, 0x04 ; 4 + 682: bf 2e mov r11, r31 + 684: 09 c0 rjmp .+18 ; 0x698 + 686: 34 fe sbrs r3, 4 + 688: 0a c0 rjmp .+20 ; 0x69e + 68a: 29 2f mov r18, r25 + 68c: 26 60 ori r18, 0x06 ; 6 + 68e: b2 2e mov r11, r18 + 690: 06 c0 rjmp .+12 ; 0x69e + 692: 28 e0 ldi r18, 0x08 ; 8 + 694: 30 e0 ldi r19, 0x00 ; 0 + 696: 05 c0 rjmp .+10 ; 0x6a2 + 698: 20 e1 ldi r18, 0x10 ; 16 + 69a: 30 e0 ldi r19, 0x00 ; 0 + 69c: 02 c0 rjmp .+4 ; 0x6a2 + 69e: 20 e1 ldi r18, 0x10 ; 16 + 6a0: 32 e0 ldi r19, 0x02 ; 2 + 6a2: f8 01 movw r30, r16 + 6a4: b7 fe sbrs r11, 7 + 6a6: 07 c0 rjmp .+14 ; 0x6b6 + 6a8: 60 81 ld r22, Z + 6aa: 71 81 ldd r23, Z+1 ; 0x01 + 6ac: 82 81 ldd r24, Z+2 ; 0x02 + 6ae: 93 81 ldd r25, Z+3 ; 0x03 + 6b0: 0c 5f subi r16, 0xFC ; 252 + 6b2: 1f 4f sbci r17, 0xFF ; 255 + 6b4: 06 c0 rjmp .+12 ; 0x6c2 + 6b6: 60 81 ld r22, Z + 6b8: 71 81 ldd r23, Z+1 ; 0x01 + 6ba: 80 e0 ldi r24, 0x00 ; 0 + 6bc: 90 e0 ldi r25, 0x00 ; 0 + 6be: 0e 5f subi r16, 0xFE ; 254 + 6c0: 1f 4f sbci r17, 0xFF ; 255 + 6c2: a3 01 movw r20, r6 + 6c4: f1 d0 rcall .+482 ; 0x8a8 <__ultoa_invert> + 6c6: 88 2e mov r8, r24 + 6c8: 86 18 sub r8, r6 + 6ca: fb 2d mov r31, r11 + 6cc: ff 77 andi r31, 0x7F ; 127 + 6ce: 3f 2e mov r3, r31 + 6d0: 36 fe sbrs r3, 6 + 6d2: 0d c0 rjmp .+26 ; 0x6ee + 6d4: 23 2d mov r18, r3 + 6d6: 2e 7f andi r18, 0xFE ; 254 + 6d8: a2 2e mov r10, r18 + 6da: 89 14 cp r8, r9 + 6dc: 58 f4 brcc .+22 ; 0x6f4 + 6de: 34 fe sbrs r3, 4 + 6e0: 0b c0 rjmp .+22 ; 0x6f8 + 6e2: 32 fc sbrc r3, 2 + 6e4: 09 c0 rjmp .+18 ; 0x6f8 + 6e6: 83 2d mov r24, r3 + 6e8: 8e 7e andi r24, 0xEE ; 238 + 6ea: a8 2e mov r10, r24 + 6ec: 05 c0 rjmp .+10 ; 0x6f8 + 6ee: b8 2c mov r11, r8 + 6f0: a3 2c mov r10, r3 + 6f2: 03 c0 rjmp .+6 ; 0x6fa + 6f4: b8 2c mov r11, r8 + 6f6: 01 c0 rjmp .+2 ; 0x6fa + 6f8: b9 2c mov r11, r9 + 6fa: a4 fe sbrs r10, 4 + 6fc: 0f c0 rjmp .+30 ; 0x71c + 6fe: fe 01 movw r30, r28 + 700: e8 0d add r30, r8 + 702: f1 1d adc r31, r1 + 704: 80 81 ld r24, Z + 706: 80 33 cpi r24, 0x30 ; 48 + 708: 21 f4 brne .+8 ; 0x712 + 70a: 9a 2d mov r25, r10 + 70c: 99 7e andi r25, 0xE9 ; 233 + 70e: a9 2e mov r10, r25 + 710: 09 c0 rjmp .+18 ; 0x724 + 712: a2 fe sbrs r10, 2 + 714: 06 c0 rjmp .+12 ; 0x722 + 716: b3 94 inc r11 + 718: b3 94 inc r11 + 71a: 04 c0 rjmp .+8 ; 0x724 + 71c: 8a 2d mov r24, r10 + 71e: 86 78 andi r24, 0x86 ; 134 + 720: 09 f0 breq .+2 ; 0x724 + 722: b3 94 inc r11 + 724: a3 fc sbrc r10, 3 + 726: 10 c0 rjmp .+32 ; 0x748 + 728: a0 fe sbrs r10, 0 + 72a: 06 c0 rjmp .+12 ; 0x738 + 72c: b2 14 cp r11, r2 + 72e: 80 f4 brcc .+32 ; 0x750 + 730: 28 0c add r2, r8 + 732: 92 2c mov r9, r2 + 734: 9b 18 sub r9, r11 + 736: 0d c0 rjmp .+26 ; 0x752 + 738: b2 14 cp r11, r2 + 73a: 58 f4 brcc .+22 ; 0x752 + 73c: b6 01 movw r22, r12 + 73e: 80 e2 ldi r24, 0x20 ; 32 + 740: 90 e0 ldi r25, 0x00 ; 0 + 742: 76 d0 rcall .+236 ; 0x830 + 744: b3 94 inc r11 + 746: f8 cf rjmp .-16 ; 0x738 + 748: b2 14 cp r11, r2 + 74a: 18 f4 brcc .+6 ; 0x752 + 74c: 2b 18 sub r2, r11 + 74e: 02 c0 rjmp .+4 ; 0x754 + 750: 98 2c mov r9, r8 + 752: 21 2c mov r2, r1 + 754: a4 fe sbrs r10, 4 + 756: 0f c0 rjmp .+30 ; 0x776 + 758: b6 01 movw r22, r12 + 75a: 80 e3 ldi r24, 0x30 ; 48 + 75c: 90 e0 ldi r25, 0x00 ; 0 + 75e: 68 d0 rcall .+208 ; 0x830 + 760: a2 fe sbrs r10, 2 + 762: 16 c0 rjmp .+44 ; 0x790 + 764: a1 fc sbrc r10, 1 + 766: 03 c0 rjmp .+6 ; 0x76e + 768: 88 e7 ldi r24, 0x78 ; 120 + 76a: 90 e0 ldi r25, 0x00 ; 0 + 76c: 02 c0 rjmp .+4 ; 0x772 + 76e: 88 e5 ldi r24, 0x58 ; 88 + 770: 90 e0 ldi r25, 0x00 ; 0 + 772: b6 01 movw r22, r12 + 774: 0c c0 rjmp .+24 ; 0x78e + 776: 8a 2d mov r24, r10 + 778: 86 78 andi r24, 0x86 ; 134 + 77a: 51 f0 breq .+20 ; 0x790 + 77c: a1 fe sbrs r10, 1 + 77e: 02 c0 rjmp .+4 ; 0x784 + 780: 8b e2 ldi r24, 0x2B ; 43 + 782: 01 c0 rjmp .+2 ; 0x786 + 784: 80 e2 ldi r24, 0x20 ; 32 + 786: a7 fc sbrc r10, 7 + 788: 8d e2 ldi r24, 0x2D ; 45 + 78a: b6 01 movw r22, r12 + 78c: 90 e0 ldi r25, 0x00 ; 0 + 78e: 50 d0 rcall .+160 ; 0x830 + 790: 89 14 cp r8, r9 + 792: 30 f4 brcc .+12 ; 0x7a0 + 794: b6 01 movw r22, r12 + 796: 80 e3 ldi r24, 0x30 ; 48 + 798: 90 e0 ldi r25, 0x00 ; 0 + 79a: 4a d0 rcall .+148 ; 0x830 + 79c: 9a 94 dec r9 + 79e: f8 cf rjmp .-16 ; 0x790 + 7a0: 8a 94 dec r8 + 7a2: f3 01 movw r30, r6 + 7a4: e8 0d add r30, r8 + 7a6: f1 1d adc r31, r1 + 7a8: 80 81 ld r24, Z + 7aa: b6 01 movw r22, r12 + 7ac: 90 e0 ldi r25, 0x00 ; 0 + 7ae: 40 d0 rcall .+128 ; 0x830 + 7b0: 81 10 cpse r8, r1 + 7b2: f6 cf rjmp .-20 ; 0x7a0 + 7b4: 22 20 and r2, r2 + 7b6: 09 f4 brne .+2 ; 0x7ba + 7b8: 4e ce rjmp .-868 ; 0x456 + 7ba: b6 01 movw r22, r12 + 7bc: 80 e2 ldi r24, 0x20 ; 32 + 7be: 90 e0 ldi r25, 0x00 ; 0 + 7c0: 37 d0 rcall .+110 ; 0x830 + 7c2: 2a 94 dec r2 + 7c4: f7 cf rjmp .-18 ; 0x7b4 + 7c6: f6 01 movw r30, r12 + 7c8: 86 81 ldd r24, Z+6 ; 0x06 + 7ca: 97 81 ldd r25, Z+7 ; 0x07 + 7cc: 02 c0 rjmp .+4 ; 0x7d2 + 7ce: 8f ef ldi r24, 0xFF ; 255 + 7d0: 9f ef ldi r25, 0xFF ; 255 + 7d2: 2b 96 adiw r28, 0x0b ; 11 + 7d4: 0f b6 in r0, 0x3f ; 63 + 7d6: f8 94 cli + 7d8: de bf out 0x3e, r29 ; 62 + 7da: 0f be out 0x3f, r0 ; 63 + 7dc: cd bf out 0x3d, r28 ; 61 + 7de: df 91 pop r29 + 7e0: cf 91 pop r28 + 7e2: 1f 91 pop r17 + 7e4: 0f 91 pop r16 + 7e6: ff 90 pop r15 + 7e8: ef 90 pop r14 + 7ea: df 90 pop r13 + 7ec: cf 90 pop r12 + 7ee: bf 90 pop r11 + 7f0: af 90 pop r10 + 7f2: 9f 90 pop r9 + 7f4: 8f 90 pop r8 + 7f6: 7f 90 pop r7 + 7f8: 6f 90 pop r6 + 7fa: 5f 90 pop r5 + 7fc: 4f 90 pop r4 + 7fe: 3f 90 pop r3 + 800: 2f 90 pop r2 + 802: 08 95 ret -000007c4 : - 7c4: fc 01 movw r30, r24 - 7c6: 05 90 lpm r0, Z+ - 7c8: 61 50 subi r22, 0x01 ; 1 - 7ca: 70 40 sbci r23, 0x00 ; 0 - 7cc: 01 10 cpse r0, r1 - 7ce: d8 f7 brcc .-10 ; 0x7c6 - 7d0: 80 95 com r24 - 7d2: 90 95 com r25 - 7d4: 8e 0f add r24, r30 - 7d6: 9f 1f adc r25, r31 - 7d8: 08 95 ret +00000804 : + 804: fc 01 movw r30, r24 + 806: 05 90 lpm r0, Z+ + 808: 61 50 subi r22, 0x01 ; 1 + 80a: 70 40 sbci r23, 0x00 ; 0 + 80c: 01 10 cpse r0, r1 + 80e: d8 f7 brcc .-10 ; 0x806 + 810: 80 95 com r24 + 812: 90 95 com r25 + 814: 8e 0f add r24, r30 + 816: 9f 1f adc r25, r31 + 818: 08 95 ret -000007da : - 7da: fc 01 movw r30, r24 - 7dc: 61 50 subi r22, 0x01 ; 1 - 7de: 70 40 sbci r23, 0x00 ; 0 - 7e0: 01 90 ld r0, Z+ - 7e2: 01 10 cpse r0, r1 - 7e4: d8 f7 brcc .-10 ; 0x7dc - 7e6: 80 95 com r24 - 7e8: 90 95 com r25 - 7ea: 8e 0f add r24, r30 - 7ec: 9f 1f adc r25, r31 - 7ee: 08 95 ret +0000081a : + 81a: fc 01 movw r30, r24 + 81c: 61 50 subi r22, 0x01 ; 1 + 81e: 70 40 sbci r23, 0x00 ; 0 + 820: 01 90 ld r0, Z+ + 822: 01 10 cpse r0, r1 + 824: d8 f7 brcc .-10 ; 0x81c + 826: 80 95 com r24 + 828: 90 95 com r25 + 82a: 8e 0f add r24, r30 + 82c: 9f 1f adc r25, r31 + 82e: 08 95 ret -000007f0 : - 7f0: 0f 93 push r16 - 7f2: 1f 93 push r17 - 7f4: cf 93 push r28 - 7f6: df 93 push r29 - 7f8: fb 01 movw r30, r22 - 7fa: 23 81 ldd r18, Z+3 ; 0x03 - 7fc: 21 fd sbrc r18, 1 - 7fe: 03 c0 rjmp .+6 ; 0x806 - 800: 8f ef ldi r24, 0xFF ; 255 - 802: 9f ef ldi r25, 0xFF ; 255 - 804: 2c c0 rjmp .+88 ; 0x85e - 806: 22 ff sbrs r18, 2 - 808: 16 c0 rjmp .+44 ; 0x836 - 80a: 46 81 ldd r20, Z+6 ; 0x06 - 80c: 57 81 ldd r21, Z+7 ; 0x07 - 80e: 24 81 ldd r18, Z+4 ; 0x04 - 810: 35 81 ldd r19, Z+5 ; 0x05 - 812: 42 17 cp r20, r18 - 814: 53 07 cpc r21, r19 - 816: 44 f4 brge .+16 ; 0x828 - 818: a0 81 ld r26, Z - 81a: b1 81 ldd r27, Z+1 ; 0x01 - 81c: 9d 01 movw r18, r26 - 81e: 2f 5f subi r18, 0xFF ; 255 - 820: 3f 4f sbci r19, 0xFF ; 255 - 822: 31 83 std Z+1, r19 ; 0x01 - 824: 20 83 st Z, r18 - 826: 8c 93 st X, r24 - 828: 26 81 ldd r18, Z+6 ; 0x06 - 82a: 37 81 ldd r19, Z+7 ; 0x07 - 82c: 2f 5f subi r18, 0xFF ; 255 - 82e: 3f 4f sbci r19, 0xFF ; 255 - 830: 37 83 std Z+7, r19 ; 0x07 - 832: 26 83 std Z+6, r18 ; 0x06 - 834: 14 c0 rjmp .+40 ; 0x85e - 836: 8b 01 movw r16, r22 - 838: ec 01 movw r28, r24 - 83a: fb 01 movw r30, r22 - 83c: 00 84 ldd r0, Z+8 ; 0x08 - 83e: f1 85 ldd r31, Z+9 ; 0x09 - 840: e0 2d mov r30, r0 - 842: 09 95 icall - 844: 89 2b or r24, r25 - 846: e1 f6 brne .-72 ; 0x800 - 848: d8 01 movw r26, r16 - 84a: 16 96 adiw r26, 0x06 ; 6 - 84c: 8d 91 ld r24, X+ - 84e: 9c 91 ld r25, X - 850: 17 97 sbiw r26, 0x07 ; 7 - 852: 01 96 adiw r24, 0x01 ; 1 - 854: 17 96 adiw r26, 0x07 ; 7 - 856: 9c 93 st X, r25 - 858: 8e 93 st -X, r24 - 85a: 16 97 sbiw r26, 0x06 ; 6 - 85c: ce 01 movw r24, r28 - 85e: df 91 pop r29 - 860: cf 91 pop r28 - 862: 1f 91 pop r17 - 864: 0f 91 pop r16 - 866: 08 95 ret +00000830 : + 830: 0f 93 push r16 + 832: 1f 93 push r17 + 834: cf 93 push r28 + 836: df 93 push r29 + 838: fb 01 movw r30, r22 + 83a: 23 81 ldd r18, Z+3 ; 0x03 + 83c: 21 fd sbrc r18, 1 + 83e: 03 c0 rjmp .+6 ; 0x846 + 840: 8f ef ldi r24, 0xFF ; 255 + 842: 9f ef ldi r25, 0xFF ; 255 + 844: 2c c0 rjmp .+88 ; 0x89e + 846: 22 ff sbrs r18, 2 + 848: 16 c0 rjmp .+44 ; 0x876 + 84a: 46 81 ldd r20, Z+6 ; 0x06 + 84c: 57 81 ldd r21, Z+7 ; 0x07 + 84e: 24 81 ldd r18, Z+4 ; 0x04 + 850: 35 81 ldd r19, Z+5 ; 0x05 + 852: 42 17 cp r20, r18 + 854: 53 07 cpc r21, r19 + 856: 44 f4 brge .+16 ; 0x868 + 858: a0 81 ld r26, Z + 85a: b1 81 ldd r27, Z+1 ; 0x01 + 85c: 9d 01 movw r18, r26 + 85e: 2f 5f subi r18, 0xFF ; 255 + 860: 3f 4f sbci r19, 0xFF ; 255 + 862: 31 83 std Z+1, r19 ; 0x01 + 864: 20 83 st Z, r18 + 866: 8c 93 st X, r24 + 868: 26 81 ldd r18, Z+6 ; 0x06 + 86a: 37 81 ldd r19, Z+7 ; 0x07 + 86c: 2f 5f subi r18, 0xFF ; 255 + 86e: 3f 4f sbci r19, 0xFF ; 255 + 870: 37 83 std Z+7, r19 ; 0x07 + 872: 26 83 std Z+6, r18 ; 0x06 + 874: 14 c0 rjmp .+40 ; 0x89e + 876: 8b 01 movw r16, r22 + 878: ec 01 movw r28, r24 + 87a: fb 01 movw r30, r22 + 87c: 00 84 ldd r0, Z+8 ; 0x08 + 87e: f1 85 ldd r31, Z+9 ; 0x09 + 880: e0 2d mov r30, r0 + 882: 09 95 icall + 884: 89 2b or r24, r25 + 886: e1 f6 brne .-72 ; 0x840 + 888: d8 01 movw r26, r16 + 88a: 16 96 adiw r26, 0x06 ; 6 + 88c: 8d 91 ld r24, X+ + 88e: 9c 91 ld r25, X + 890: 17 97 sbiw r26, 0x07 ; 7 + 892: 01 96 adiw r24, 0x01 ; 1 + 894: 17 96 adiw r26, 0x07 ; 7 + 896: 9c 93 st X, r25 + 898: 8e 93 st -X, r24 + 89a: 16 97 sbiw r26, 0x06 ; 6 + 89c: ce 01 movw r24, r28 + 89e: df 91 pop r29 + 8a0: cf 91 pop r28 + 8a2: 1f 91 pop r17 + 8a4: 0f 91 pop r16 + 8a6: 08 95 ret -00000868 <__ultoa_invert>: - 868: fa 01 movw r30, r20 - 86a: aa 27 eor r26, r26 - 86c: 28 30 cpi r18, 0x08 ; 8 - 86e: 51 f1 breq .+84 ; 0x8c4 <__ultoa_invert+0x5c> - 870: 20 31 cpi r18, 0x10 ; 16 - 872: 81 f1 breq .+96 ; 0x8d4 <__ultoa_invert+0x6c> - 874: e8 94 clt - 876: 6f 93 push r22 - 878: 6e 7f andi r22, 0xFE ; 254 - 87a: 6e 5f subi r22, 0xFE ; 254 - 87c: 7f 4f sbci r23, 0xFF ; 255 - 87e: 8f 4f sbci r24, 0xFF ; 255 - 880: 9f 4f sbci r25, 0xFF ; 255 - 882: af 4f sbci r26, 0xFF ; 255 - 884: b1 e0 ldi r27, 0x01 ; 1 - 886: 3e d0 rcall .+124 ; 0x904 <__ultoa_invert+0x9c> - 888: b4 e0 ldi r27, 0x04 ; 4 - 88a: 3c d0 rcall .+120 ; 0x904 <__ultoa_invert+0x9c> - 88c: 67 0f add r22, r23 - 88e: 78 1f adc r23, r24 - 890: 89 1f adc r24, r25 - 892: 9a 1f adc r25, r26 - 894: a1 1d adc r26, r1 - 896: 68 0f add r22, r24 - 898: 79 1f adc r23, r25 - 89a: 8a 1f adc r24, r26 - 89c: 91 1d adc r25, r1 - 89e: a1 1d adc r26, r1 - 8a0: 6a 0f add r22, r26 - 8a2: 71 1d adc r23, r1 - 8a4: 81 1d adc r24, r1 - 8a6: 91 1d adc r25, r1 - 8a8: a1 1d adc r26, r1 - 8aa: 20 d0 rcall .+64 ; 0x8ec <__ultoa_invert+0x84> - 8ac: 09 f4 brne .+2 ; 0x8b0 <__ultoa_invert+0x48> - 8ae: 68 94 set - 8b0: 3f 91 pop r19 - 8b2: 2a e0 ldi r18, 0x0A ; 10 - 8b4: 26 9f mul r18, r22 - 8b6: 11 24 eor r1, r1 - 8b8: 30 19 sub r19, r0 - 8ba: 30 5d subi r19, 0xD0 ; 208 - 8bc: 31 93 st Z+, r19 - 8be: de f6 brtc .-74 ; 0x876 <__ultoa_invert+0xe> - 8c0: cf 01 movw r24, r30 - 8c2: 08 95 ret - 8c4: 46 2f mov r20, r22 - 8c6: 47 70 andi r20, 0x07 ; 7 - 8c8: 40 5d subi r20, 0xD0 ; 208 - 8ca: 41 93 st Z+, r20 - 8cc: b3 e0 ldi r27, 0x03 ; 3 - 8ce: 0f d0 rcall .+30 ; 0x8ee <__ultoa_invert+0x86> - 8d0: c9 f7 brne .-14 ; 0x8c4 <__ultoa_invert+0x5c> - 8d2: f6 cf rjmp .-20 ; 0x8c0 <__ultoa_invert+0x58> - 8d4: 46 2f mov r20, r22 - 8d6: 4f 70 andi r20, 0x0F ; 15 - 8d8: 40 5d subi r20, 0xD0 ; 208 - 8da: 4a 33 cpi r20, 0x3A ; 58 - 8dc: 18 f0 brcs .+6 ; 0x8e4 <__ultoa_invert+0x7c> - 8de: 49 5d subi r20, 0xD9 ; 217 - 8e0: 31 fd sbrc r19, 1 - 8e2: 40 52 subi r20, 0x20 ; 32 - 8e4: 41 93 st Z+, r20 - 8e6: 02 d0 rcall .+4 ; 0x8ec <__ultoa_invert+0x84> - 8e8: a9 f7 brne .-22 ; 0x8d4 <__ultoa_invert+0x6c> - 8ea: ea cf rjmp .-44 ; 0x8c0 <__ultoa_invert+0x58> - 8ec: b4 e0 ldi r27, 0x04 ; 4 - 8ee: a6 95 lsr r26 - 8f0: 97 95 ror r25 - 8f2: 87 95 ror r24 - 8f4: 77 95 ror r23 - 8f6: 67 95 ror r22 - 8f8: ba 95 dec r27 - 8fa: c9 f7 brne .-14 ; 0x8ee <__ultoa_invert+0x86> - 8fc: 00 97 sbiw r24, 0x00 ; 0 - 8fe: 61 05 cpc r22, r1 - 900: 71 05 cpc r23, r1 +000008a8 <__ultoa_invert>: + 8a8: fa 01 movw r30, r20 + 8aa: aa 27 eor r26, r26 + 8ac: 28 30 cpi r18, 0x08 ; 8 + 8ae: 51 f1 breq .+84 ; 0x904 <__ultoa_invert+0x5c> + 8b0: 20 31 cpi r18, 0x10 ; 16 + 8b2: 81 f1 breq .+96 ; 0x914 <__ultoa_invert+0x6c> + 8b4: e8 94 clt + 8b6: 6f 93 push r22 + 8b8: 6e 7f andi r22, 0xFE ; 254 + 8ba: 6e 5f subi r22, 0xFE ; 254 + 8bc: 7f 4f sbci r23, 0xFF ; 255 + 8be: 8f 4f sbci r24, 0xFF ; 255 + 8c0: 9f 4f sbci r25, 0xFF ; 255 + 8c2: af 4f sbci r26, 0xFF ; 255 + 8c4: b1 e0 ldi r27, 0x01 ; 1 + 8c6: 3e d0 rcall .+124 ; 0x944 <__ultoa_invert+0x9c> + 8c8: b4 e0 ldi r27, 0x04 ; 4 + 8ca: 3c d0 rcall .+120 ; 0x944 <__ultoa_invert+0x9c> + 8cc: 67 0f add r22, r23 + 8ce: 78 1f adc r23, r24 + 8d0: 89 1f adc r24, r25 + 8d2: 9a 1f adc r25, r26 + 8d4: a1 1d adc r26, r1 + 8d6: 68 0f add r22, r24 + 8d8: 79 1f adc r23, r25 + 8da: 8a 1f adc r24, r26 + 8dc: 91 1d adc r25, r1 + 8de: a1 1d adc r26, r1 + 8e0: 6a 0f add r22, r26 + 8e2: 71 1d adc r23, r1 + 8e4: 81 1d adc r24, r1 + 8e6: 91 1d adc r25, r1 + 8e8: a1 1d adc r26, r1 + 8ea: 20 d0 rcall .+64 ; 0x92c <__ultoa_invert+0x84> + 8ec: 09 f4 brne .+2 ; 0x8f0 <__ultoa_invert+0x48> + 8ee: 68 94 set + 8f0: 3f 91 pop r19 + 8f2: 2a e0 ldi r18, 0x0A ; 10 + 8f4: 26 9f mul r18, r22 + 8f6: 11 24 eor r1, r1 + 8f8: 30 19 sub r19, r0 + 8fa: 30 5d subi r19, 0xD0 ; 208 + 8fc: 31 93 st Z+, r19 + 8fe: de f6 brtc .-74 ; 0x8b6 <__ultoa_invert+0xe> + 900: cf 01 movw r24, r30 902: 08 95 ret - 904: 9b 01 movw r18, r22 - 906: ac 01 movw r20, r24 - 908: 0a 2e mov r0, r26 - 90a: 06 94 lsr r0 - 90c: 57 95 ror r21 - 90e: 47 95 ror r20 - 910: 37 95 ror r19 - 912: 27 95 ror r18 - 914: ba 95 dec r27 - 916: c9 f7 brne .-14 ; 0x90a <__ultoa_invert+0xa2> - 918: 62 0f add r22, r18 - 91a: 73 1f adc r23, r19 - 91c: 84 1f adc r24, r20 - 91e: 95 1f adc r25, r21 - 920: a0 1d adc r26, r0 - 922: 08 95 ret + 904: 46 2f mov r20, r22 + 906: 47 70 andi r20, 0x07 ; 7 + 908: 40 5d subi r20, 0xD0 ; 208 + 90a: 41 93 st Z+, r20 + 90c: b3 e0 ldi r27, 0x03 ; 3 + 90e: 0f d0 rcall .+30 ; 0x92e <__ultoa_invert+0x86> + 910: c9 f7 brne .-14 ; 0x904 <__ultoa_invert+0x5c> + 912: f6 cf rjmp .-20 ; 0x900 <__ultoa_invert+0x58> + 914: 46 2f mov r20, r22 + 916: 4f 70 andi r20, 0x0F ; 15 + 918: 40 5d subi r20, 0xD0 ; 208 + 91a: 4a 33 cpi r20, 0x3A ; 58 + 91c: 18 f0 brcs .+6 ; 0x924 <__ultoa_invert+0x7c> + 91e: 49 5d subi r20, 0xD9 ; 217 + 920: 31 fd sbrc r19, 1 + 922: 40 52 subi r20, 0x20 ; 32 + 924: 41 93 st Z+, r20 + 926: 02 d0 rcall .+4 ; 0x92c <__ultoa_invert+0x84> + 928: a9 f7 brne .-22 ; 0x914 <__ultoa_invert+0x6c> + 92a: ea cf rjmp .-44 ; 0x900 <__ultoa_invert+0x58> + 92c: b4 e0 ldi r27, 0x04 ; 4 + 92e: a6 95 lsr r26 + 930: 97 95 ror r25 + 932: 87 95 ror r24 + 934: 77 95 ror r23 + 936: 67 95 ror r22 + 938: ba 95 dec r27 + 93a: c9 f7 brne .-14 ; 0x92e <__ultoa_invert+0x86> + 93c: 00 97 sbiw r24, 0x00 ; 0 + 93e: 61 05 cpc r22, r1 + 940: 71 05 cpc r23, r1 + 942: 08 95 ret + 944: 9b 01 movw r18, r22 + 946: ac 01 movw r20, r24 + 948: 0a 2e mov r0, r26 + 94a: 06 94 lsr r0 + 94c: 57 95 ror r21 + 94e: 47 95 ror r20 + 950: 37 95 ror r19 + 952: 27 95 ror r18 + 954: ba 95 dec r27 + 956: c9 f7 brne .-14 ; 0x94a <__ultoa_invert+0xa2> + 958: 62 0f add r22, r18 + 95a: 73 1f adc r23, r19 + 95c: 84 1f adc r24, r20 + 95e: 95 1f adc r25, r21 + 960: a0 1d adc r26, r0 + 962: 08 95 ret -00000924 <_exit>: - 924: f8 94 cli +00000964 <_exit>: + 964: f8 94 cli -00000926 <__stop_program>: - 926: ff cf rjmp .-2 ; 0x926 <__stop_program> +00000966 <__stop_program>: + 966: ff cf rjmp .-2 ; 0x966 <__stop_program> diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec index 6bde30f..bd2d5d1 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec @@ -1,150 +1,154 @@ S0180000756C747261736F6E696353656E736F722E737265634E -S113000045C0000059C1000056C0000054C00000A3 -S113001052C0000050C000004EC000004CC00000A0 -S11300204AC0000048C0000046C0000044C00000B0 -S113003042C0000040C000003EC000003CC00000C0 -S11300403AC0000038C0000036C0000034C00000D0 -S113005032C0000030C000002EC000002CC00000E0 -S11300602AC0000028C0000026C0000024C00000F0 -S113007022C0000020C000001EC000001CC0000000 -S11300801AC0000018C0000016C0000011241FBED2 -S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E8E2F8 -S11300A0F9E000E00BBF02C007900D92A630B10743 -S11300B0D9F72ED137C4A4CF9BB321E030E002C0DE -S11300C0220F331F8A95E2F7292B2BBB08959BB38C -S11300D021E030E002C0220F331F8A95E2F7209519 -S11300E029232BBB089586E090E0E6DF83EC99E0BA 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a/Microcontrollers/ultrasonicSensor/main.c +++ b/Microcontrollers/ultrasonicSensor/main.c @@ -16,90 +16,25 @@ */ -#define F_CPU 20e6 +#define F_CPU 10e6 #include #include #include #include "lcd_control.h" - -enum interrupt_status {INTERRUPT_FALLING, INTERRUPT_RISING}; - -static enum interrupt_status int_stat = INTERRUPT_RISING; - -uint16_t timer_dist = 125; // time measured by timer; - -void wait_us(unsigned int us) -{ - for(int i = 0; i < us; i++) - { - _delay_us(1); - } -} - -void wait_ms(unsigned int ms) -{ - - for(int i = 0; i < ms; i++) - { - _delay_ms(1); - } -} - -void ultrasonic_send_pulse() -{ - PORTG = 0x00; // 10 us low pulse - wait_us(10); - PORTG = 0x01; -} +#include "ultrasonic_sensor.h" ISR(INT0_vect) { - - timer_dist = 2009; - // if the interrupt was generated on a rising edge (start sending echo) - if (int_stat == INTERRUPT_RISING) - { - // set interrupt pin 0 on PORTD to falling edge - EICRA = 0x02; - - // reset the time in timer1 - TCNT1 = 0x00; - - // set interrupt status - int_stat = INTERRUPT_FALLING; - } else - // else if it was generated on a falling edge (end sending echo) - { - // set interrupt pin 0 on PORTD to rising edge - EICRA = 0x03; - - // read timer1 into time_dist - timer_dist = TCNT1; - - // set interrupt status - int_stat = INTERRUPT_RISING; - } - + ultrasonic_handle_interrupt(); } int main(void) { - DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug - DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt - - EICRA = 0x03; // interrupt PORTD on pin 0, rising edge - - EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) - - TCCR1A = 0b00000000; // initialize timer1, prescaler=256 - TCCR1B = 0b00001100; // CTC compare A, RUN - - - sei(); // turn on interrupt system + ultrasonic_init(); init_4bits_mode(); _delay_ms(10); @@ -111,9 +46,8 @@ int main(void) { ultrasonic_send_pulse(); - int distance = timer_dist * 340 / 2; lcd_clear(); - lcd_write_int(timer_dist); + lcd_write_int(ultrasonic_get_timer_dist()); wait_ms(100); diff --git a/Microcontrollers/ultrasonicSensor/ultrasonicSensor.cproj b/Microcontrollers/ultrasonicSensor/ultrasonicSensor.cproj index 2a8122a..9d6d7c2 100644 --- a/Microcontrollers/ultrasonicSensor/ultrasonicSensor.cproj +++ b/Microcontrollers/ultrasonicSensor/ultrasonicSensor.cproj @@ -32,81 +32,81 @@ - -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" - True - True - True - True - True - False - True - True - - - NDEBUG - - - - - %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ - - - Optimize for size (-Os) - True - True - True - - - libm - - - - - %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ - - - + -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + True + True + True + True + True + False + True + True + + + NDEBUG + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Optimize for size (-Os) + True + True + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + - -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" - True - True - True - True - True - False - True - True - - - DEBUG - - - - - %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ - - - Optimize debugging experience (-Og) - True - True - Default (-g2) - True - - - libm - - - - - %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ - - - Default (-Wa,-g) - + -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + True + True + True + True + True + False + True + True + + + DEBUG + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Optimize debugging experience (-Og) + True + True + Default (-g2) + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Default (-Wa,-g) + @@ -119,6 +119,12 @@ compile + + compile + + + compile + \ No newline at end of file From 26f0fff87a85970c61618240710a65a57e682d0e Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Wed, 24 Mar 2021 13:24:13 +0100 Subject: [PATCH 11/11] [ADD] ultrasonic sensor c and h file --- .../ultrasonicSensor/ultrasonic_sensor.c | 91 +++++++++++++++++++ .../ultrasonicSensor/ultrasonic_sensor.h | 12 +++ 2 files changed, 103 insertions(+) create mode 100644 Microcontrollers/ultrasonicSensor/ultrasonic_sensor.c create mode 100644 Microcontrollers/ultrasonicSensor/ultrasonic_sensor.h diff --git a/Microcontrollers/ultrasonicSensor/ultrasonic_sensor.c b/Microcontrollers/ultrasonicSensor/ultrasonic_sensor.c new file mode 100644 index 0000000..430a118 --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/ultrasonic_sensor.c @@ -0,0 +1,91 @@ +/* + * ultrasonic_sensor.c + * + * Created: 24-3-2021 13:04:52 + * Author: Sem + */ + +#define F_CPU 10e6 + +#include +#include +#include + +#include "lcd_control.h" + +static uint16_t timer_dist = 0; + +enum interrupt_status {INTERRUPT_FALLING, INTERRUPT_RISING}; + +static enum interrupt_status int_stat = INTERRUPT_RISING; + +void wait_us(unsigned int us) +{ + for(int i = 0; i < us; i++) + { + _delay_us(1); + } +} + +void wait_ms(unsigned int ms) +{ + + for(int i = 0; i < ms; i++) + { + _delay_ms(1); + } +} +void ultrasonic_init() +{ + DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug + DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt + + EICRA = 0x03; // interrupt PORTD on pin 0, rising edge + + EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) + + TCCR1A = 0b00000000; // initialize timer1, prescaler=256 + TCCR1B = 0b00001100; // CTC compare A, RUN + + sei(); // turn on interrupt system +} + +void ultrasonic_send_pulse() +{ + PORTG = 0x00; // 10 us low pulse + wait_us(10); + PORTG = 0x01; +} + +void ultrasonic_handle_interrupt() +{ + // if the interrupt was generated on a rising edge (start sending echo) + if (int_stat == INTERRUPT_RISING) + { + // set interrupt pin 0 on PORTD to falling edge + EICRA = 0x02; + + // reset the time in timer1 + TCNT1 = 0x00; + + // set interrupt status + int_stat = INTERRUPT_FALLING; + } else + // else if it was generated on a falling edge (end sending echo) + { + // set interrupt pin 0 on PORTD to rising edge + EICRA = 0x03; + + // read timer1 into time_dist + timer_dist = TCNT1; + + // set interrupt status + int_stat = INTERRUPT_RISING; + } +} + +uint16_t ultrasonic_get_timer_dist() +{ + return timer_dist; +} + diff --git a/Microcontrollers/ultrasonicSensor/ultrasonic_sensor.h b/Microcontrollers/ultrasonicSensor/ultrasonic_sensor.h new file mode 100644 index 0000000..0981c46 --- /dev/null +++ b/Microcontrollers/ultrasonicSensor/ultrasonic_sensor.h @@ -0,0 +1,12 @@ +/* + * ultrasonic_sensor.h + * + * Created: 24-3-2021 13:14:50 + * Author: Sem + */ + + +void ultrasonic_init(); +void ultrasonic_send_pulse(); +uint16_t ultrasonic_get_timer_dist(); +void ultrasonic_handle_interrupt();