From ef42dae5a0fa83301def124aba669799c10cbff4 Mon Sep 17 00:00:00 2001 From: stijn Date: Wed, 31 Mar 2021 09:32:16 +0200 Subject: [PATCH] Auto stash before merge of "main" and "origin/main" --- Microcontrollers/GLCDdriver/Debug/Makefile | 139 ++ .../GLCDdriver/Debug/Servo_driver.eep | 1 + .../GLCDdriver/Debug/Servo_driver.lss | 395 ++++ .../GLCDdriver/Debug/Servo_driver.srec | 37 + Microcontrollers/GLCDdriver/Debug/makedep.mk | 8 + .../GLCDdriver/Servo_driver.componentinfo.xml | 86 + .../GLCDdriver/Servo_driver.cproj | 136 ++ Microcontrollers/GLCDdriver/main.c | 49 + Microcontrollers/GLCDdriver/stepper_driver.c | 101 + Microcontrollers/GLCDdriver/stepper_driver.h | 17 + Microcontrollers/Microcontrollers.atsln | 21 + Microcontrollers/opdracht 1.5/main.c | 2 +- .../opdracht 2.4/Debug/opdracht 2.4.lss | 26 +- .../opdracht 3.2/Debug/opdracht 3.2.lss | 9 +- .../opdracht 4.1/Debug/opdracht 4.1.lss | 1713 ++++++++--------- .../opdracht 4.1/Debug/opdracht 4.1.srec | 219 ++- Microcontrollers/opdracht 4.1/main.c | 4 +- Microcontrollers/opdracht 4.3/Debug/Makefile | 139 ++ .../opdracht 4.3/Debug/makedep.mk | 8 + .../opdracht 4.3/Debug/opdracht 4.3.eep | 1 + .../opdracht 4.3/Debug/opdracht 4.3.lss | 1459 ++++++++++++++ .../opdracht 4.3/Debug/opdracht 4.3.srec | 147 ++ Microcontrollers/opdracht 4.3/lcd_control.c | 130 ++ Microcontrollers/opdracht 4.3/lcd_control.h | 31 + Microcontrollers/opdracht 4.3/main.c | 83 + .../opdracht 4.3.componentinfo.xml | 86 + .../opdracht 4.3/opdracht 4.3.cproj | 136 ++ Microcontrollers/opdracht 4.b1/Debug/Makefile | 115 ++ .../opdracht 4.b1/opdracht 4.b1.cproj | 19 + 29 files changed, 4322 insertions(+), 995 deletions(-) create mode 100644 Microcontrollers/GLCDdriver/Debug/Makefile create mode 100644 Microcontrollers/GLCDdriver/Debug/Servo_driver.eep create mode 100644 Microcontrollers/GLCDdriver/Debug/Servo_driver.lss create mode 100644 Microcontrollers/GLCDdriver/Debug/Servo_driver.srec create mode 100644 Microcontrollers/GLCDdriver/Debug/makedep.mk create mode 100644 Microcontrollers/GLCDdriver/Servo_driver.componentinfo.xml create mode 100644 Microcontrollers/GLCDdriver/Servo_driver.cproj create mode 100644 Microcontrollers/GLCDdriver/main.c create mode 100644 Microcontrollers/GLCDdriver/stepper_driver.c create mode 100644 Microcontrollers/GLCDdriver/stepper_driver.h create mode 100644 Microcontrollers/opdracht 4.3/Debug/Makefile create mode 100644 Microcontrollers/opdracht 4.3/Debug/makedep.mk create mode 100644 Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.eep create mode 100644 Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.lss create mode 100644 Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.srec create mode 100644 Microcontrollers/opdracht 4.3/lcd_control.c create mode 100644 Microcontrollers/opdracht 4.3/lcd_control.h create mode 100644 Microcontrollers/opdracht 4.3/main.c create mode 100644 Microcontrollers/opdracht 4.3/opdracht 4.3.componentinfo.xml create mode 100644 Microcontrollers/opdracht 4.3/opdracht 4.3.cproj create mode 100644 Microcontrollers/opdracht 4.b1/Debug/Makefile diff --git a/Microcontrollers/GLCDdriver/Debug/Makefile b/Microcontrollers/GLCDdriver/Debug/Makefile new file mode 100644 index 0000000..9d3e21c --- /dev/null +++ b/Microcontrollers/GLCDdriver/Debug/Makefile @@ -0,0 +1,139 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +SHELL := cmd.exe +RM := rm -rf + +USER_OBJS := + +LIBS := +PROJ := + +O_SRCS := +C_SRCS := +S_SRCS := +S_UPPER_SRCS := +OBJ_SRCS := +ASM_SRCS := +PREPROCESSING_SRCS := +OBJS := +OBJS_AS_ARGS := +C_DEPS := +C_DEPS_AS_ARGS := +EXECUTABLES := +OUTPUT_FILE_PATH := +OUTPUT_FILE_PATH_AS_ARGS := +AVR_APP_PATH :=$$$AVR_APP_PATH$$$ +QUOTE := " +ADDITIONAL_DEPENDENCIES:= +OUTPUT_FILE_DEP:= +LIB_DEP:= +LINKER_SCRIPT_DEP:= + +# Every subdirectory with source files must be described here +SUBDIRS := + + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../main.c \ +../stepper_driver.c + + +PREPROCESSING_SRCS += + + +ASM_SRCS += + + +OBJS += \ +main.o \ +stepper_driver.o + +OBJS_AS_ARGS += \ +main.o \ +stepper_driver.o + +C_DEPS += \ +main.d \ +stepper_driver.d + +C_DEPS_AS_ARGS += \ +main.d \ +stepper_driver.d + +OUTPUT_FILE_PATH +=Servo_driver.elf + +OUTPUT_FILE_PATH_AS_ARGS +=Servo_driver.elf + +ADDITIONAL_DEPENDENCIES:= + +OUTPUT_FILE_DEP:= ./makedep.mk + +LIB_DEP+= + +LINKER_SCRIPT_DEP+= + + +# AVR32/GNU C Compiler +./main.o: .././main.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include" -Og -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -mrelax -g2 -Wall -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +./stepper_driver.o: .././stepper_driver.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include" -Og -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -mrelax -g2 -Wall -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + + + + +# AVR32/GNU Preprocessing Assembler + + + +# AVR32/GNU Assembler + + + + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +# Add inputs and outputs from these tool invocations to the build variables + +# All Target +all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES) + +$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP) + @echo Building target: $@ + @echo Invoking: AVR/GNU Linker : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="Servo_driver.map" -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mrelax -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + @echo Finished building target: $@ + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "Servo_driver.elf" "Servo_driver.hex" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "Servo_driver.elf" "Servo_driver.eep" || exit 0 + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "Servo_driver.elf" > "Servo_driver.lss" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "Servo_driver.elf" "Servo_driver.srec" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "Servo_driver.elf" + + + + + + + +# Other Targets +clean: + -$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES) + -$(RM) $(C_DEPS_AS_ARGS) + rm -rf "Servo_driver.elf" "Servo_driver.a" "Servo_driver.hex" "Servo_driver.lss" "Servo_driver.eep" "Servo_driver.map" "Servo_driver.srec" "Servo_driver.usersignatures" + \ No newline at end of file diff --git a/Microcontrollers/GLCDdriver/Debug/Servo_driver.eep b/Microcontrollers/GLCDdriver/Debug/Servo_driver.eep new file mode 100644 index 0000000..7c166a1 --- /dev/null +++ b/Microcontrollers/GLCDdriver/Debug/Servo_driver.eep @@ -0,0 +1 @@ +:00000001FF diff --git a/Microcontrollers/GLCDdriver/Debug/Servo_driver.lss b/Microcontrollers/GLCDdriver/Debug/Servo_driver.lss new file mode 100644 index 0000000..597ade8 --- /dev/null +++ b/Microcontrollers/GLCDdriver/Debug/Servo_driver.lss @@ -0,0 +1,395 @@ + +Servo_driver.elf: file format elf32-avr + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .data 00000008 00800100 00000216 000002aa 2**0 + CONTENTS, ALLOC, LOAD, DATA + 1 .text 00000216 00000000 00000000 00000094 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .bss 00000005 00800108 00800108 000002b2 2**0 + ALLOC + 3 .comment 00000030 00000000 00000000 000002b2 2**0 + CONTENTS, READONLY + 4 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 000002e4 2**2 + CONTENTS, READONLY + 5 .debug_aranges 00000080 00000000 00000000 00000320 2**0 + CONTENTS, READONLY, DEBUGGING + 6 .debug_info 00000b4f 00000000 00000000 000003a0 2**0 + CONTENTS, READONLY, DEBUGGING + 7 .debug_abbrev 00000987 00000000 00000000 00000eef 2**0 + CONTENTS, READONLY, DEBUGGING + 8 .debug_line 000004cb 00000000 00000000 00001876 2**0 + CONTENTS, READONLY, DEBUGGING + 9 .debug_frame 00000110 00000000 00000000 00001d44 2**2 + CONTENTS, READONLY, DEBUGGING + 10 .debug_str 00000514 00000000 00000000 00001e54 2**0 + CONTENTS, READONLY, DEBUGGING + 11 .debug_loc 000001d2 00000000 00000000 00002368 2**0 + CONTENTS, READONLY, DEBUGGING + 12 .debug_ranges 00000060 00000000 00000000 0000253a 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +00000000 <__vectors>: + 0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end> + 2: 00 00 nop + 4: 60 c0 rjmp .+192 ; 0xc6 <__bad_interrupt> + 6: 00 00 nop + 8: 5e c0 rjmp .+188 ; 0xc6 <__bad_interrupt> + a: 00 00 nop + c: 5c c0 rjmp .+184 ; 0xc6 <__bad_interrupt> + e: 00 00 nop + 10: 5a c0 rjmp .+180 ; 0xc6 <__bad_interrupt> + 12: 00 00 nop + 14: 58 c0 rjmp .+176 ; 0xc6 <__bad_interrupt> + 16: 00 00 nop + 18: 56 c0 rjmp .+172 ; 0xc6 <__bad_interrupt> + 1a: 00 00 nop + 1c: 54 c0 rjmp .+168 ; 0xc6 <__bad_interrupt> + 1e: 00 00 nop + 20: 52 c0 rjmp .+164 ; 0xc6 <__bad_interrupt> + 22: 00 00 nop + 24: 80 c0 rjmp .+256 ; 0x126 <__vector_9> + 26: 00 00 nop + 28: 4e c0 rjmp .+156 ; 0xc6 <__bad_interrupt> + 2a: 00 00 nop + 2c: 4c c0 rjmp .+152 ; 0xc6 <__bad_interrupt> + 2e: 00 00 nop + 30: 4a c0 rjmp .+148 ; 0xc6 <__bad_interrupt> + 32: 00 00 nop + 34: 48 c0 rjmp .+144 ; 0xc6 <__bad_interrupt> + 36: 00 00 nop + 38: 46 c0 rjmp .+140 ; 0xc6 <__bad_interrupt> + 3a: 00 00 nop + 3c: 44 c0 rjmp .+136 ; 0xc6 <__bad_interrupt> + 3e: 00 00 nop + 40: 42 c0 rjmp .+132 ; 0xc6 <__bad_interrupt> + 42: 00 00 nop + 44: 40 c0 rjmp .+128 ; 0xc6 <__bad_interrupt> + 46: 00 00 nop + 48: 3e c0 rjmp .+124 ; 0xc6 <__bad_interrupt> + 4a: 00 00 nop + 4c: 3c c0 rjmp .+120 ; 0xc6 <__bad_interrupt> + 4e: 00 00 nop + 50: 3a c0 rjmp .+116 ; 0xc6 <__bad_interrupt> + 52: 00 00 nop + 54: 38 c0 rjmp .+112 ; 0xc6 <__bad_interrupt> + 56: 00 00 nop + 58: 36 c0 rjmp .+108 ; 0xc6 <__bad_interrupt> + 5a: 00 00 nop + 5c: 34 c0 rjmp .+104 ; 0xc6 <__bad_interrupt> + 5e: 00 00 nop + 60: 32 c0 rjmp .+100 ; 0xc6 <__bad_interrupt> + 62: 00 00 nop + 64: 30 c0 rjmp .+96 ; 0xc6 <__bad_interrupt> + 66: 00 00 nop + 68: 2e c0 rjmp .+92 ; 0xc6 <__bad_interrupt> + 6a: 00 00 nop + 6c: 2c c0 rjmp .+88 ; 0xc6 <__bad_interrupt> + 6e: 00 00 nop + 70: 2a c0 rjmp .+84 ; 0xc6 <__bad_interrupt> + 72: 00 00 nop + 74: 28 c0 rjmp .+80 ; 0xc6 <__bad_interrupt> + 76: 00 00 nop + 78: 26 c0 rjmp .+76 ; 0xc6 <__bad_interrupt> + 7a: 00 00 nop + 7c: 24 c0 rjmp .+72 ; 0xc6 <__bad_interrupt> + 7e: 00 00 nop + 80: 22 c0 rjmp .+68 ; 0xc6 <__bad_interrupt> + 82: 00 00 nop + 84: 20 c0 rjmp .+64 ; 0xc6 <__bad_interrupt> + 86: 00 00 nop + 88: 1e c0 rjmp .+60 ; 0xc6 <__bad_interrupt> + ... + +0000008c <__ctors_end>: + 8c: 11 24 eor r1, r1 + 8e: 1f be out 0x3f, r1 ; 63 + 90: cf ef ldi r28, 0xFF ; 255 + 92: d0 e1 ldi r29, 0x10 ; 16 + 94: de bf out 0x3e, r29 ; 62 + 96: cd bf out 0x3d, r28 ; 61 + +00000098 <__do_copy_data>: + 98: 11 e0 ldi r17, 0x01 ; 1 + 9a: a0 e0 ldi r26, 0x00 ; 0 + 9c: b1 e0 ldi r27, 0x01 ; 1 + 9e: e6 e1 ldi r30, 0x16 ; 22 + a0: f2 e0 ldi r31, 0x02 ; 2 + a2: 00 e0 ldi r16, 0x00 ; 0 + a4: 0b bf out 0x3b, r16 ; 59 + a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14> + a8: 07 90 elpm r0, Z+ + aa: 0d 92 st X+, r0 + ac: a8 30 cpi r26, 0x08 ; 8 + ae: b1 07 cpc r27, r17 + b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> + +000000b2 <__do_clear_bss>: + b2: 21 e0 ldi r18, 0x01 ; 1 + b4: a8 e0 ldi r26, 0x08 ; 8 + b6: b1 e0 ldi r27, 0x01 ; 1 + b8: 01 c0 rjmp .+2 ; 0xbc <.do_clear_bss_start> + +000000ba <.do_clear_bss_loop>: + ba: 1d 92 st X+, r1 + +000000bc <.do_clear_bss_start>: + bc: ad 30 cpi r26, 0x0D ; 13 + be: b2 07 cpc r27, r18 + c0: e1 f7 brne .-8 ; 0xba <.do_clear_bss_loop> + c2: 16 d0 rcall .+44 ; 0xf0
+ c4: a6 c0 rjmp .+332 ; 0x212 <_exit> + +000000c6 <__bad_interrupt>: + c6: 9c cf rjmp .-200 ; 0x0 <__vectors> + +000000c8 : + int value = 0; + value = ADCH; + value <<= 2; + value += (ADCL >> 6); + return value; +} + c8: 20 e0 ldi r18, 0x00 ; 0 + ca: 30 e0 ldi r19, 0x00 ; 0 + cc: 08 c0 rjmp .+16 ; 0xde + ce: e3 ec ldi r30, 0xC3 ; 195 + d0: f9 e0 ldi r31, 0x09 ; 9 + d2: 31 97 sbiw r30, 0x01 ; 1 + d4: f1 f7 brne .-4 ; 0xd2 + d6: 00 c0 rjmp .+0 ; 0xd8 + d8: 00 00 nop + da: 2f 5f subi r18, 0xFF ; 255 + dc: 3f 4f sbci r19, 0xFF ; 255 + de: 28 17 cp r18, r24 + e0: 39 07 cpc r19, r25 + e2: ac f3 brlt .-22 ; 0xce + e4: 08 95 ret + +000000e6 : + e6: 80 ee ldi r24, 0xE0 ; 224 + e8: 87 b9 out 0x07, r24 ; 7 + ea: 86 e8 ldi r24, 0x86 ; 134 + ec: 86 b9 out 0x06, r24 ; 6 + ee: 08 95 ret + +000000f0
: + +int main(void) +{ + /* Replace with your application code */ + DDRF = 0x00; + f0: 10 92 61 00 sts 0x0061, r1 ; 0x800061 <__TEXT_REGION_LENGTH__+0x7e0061> + adcInit(); + f4: f8 df rcall .-16 ; 0xe6 + init_stepper_driver(); + f6: 7f d0 rcall .+254 ; 0x1f6 + f8: 80 e0 ldi r24, 0x00 ; 0 + + stepper_rotate(512); + fa: 92 e0 ldi r25, 0x02 ; 2 + fc: 75 d0 rcall .+234 ; 0x1e8 + fe: 84 e6 ldi r24, 0x64 ; 100 + while (1) + { + wait(100); + 100: 90 e0 ldi r25, 0x00 ; 0 + 102: e2 df rcall .-60 ; 0xc8 + 104: fc cf rjmp .-8 ; 0xfe + +00000106 : + 106: e8 2f mov r30, r24 + 108: f0 e0 ldi r31, 0x00 ; 0 +} + +void (*snap_event)(uint8_t); + +void set_snap_event(void (*snap_event_p)(uint8_t)){ + snap_event = snap_event_p; + 10a: e0 50 subi r30, 0x00 ; 0 + 10c: ff 4f sbci r31, 0xFF ; 255 + 10e: 80 81 ld r24, Z + 110: 83 b9 out 0x03, r24 ; 3 + 112: 08 95 ret + +00000114 : + } + } +} + +void stepper_rotate_full_rotation(){ + steps_to_do = 512; + 114: 80 e0 ldi r24, 0x00 ; 0 + 116: 92 e0 ldi r25, 0x02 ; 2 + 118: 90 93 0a 01 sts 0x010A, r25 ; 0x80010a + 11c: 80 93 09 01 sts 0x0109, r24 ; 0x800109 + TCCR2 = 0b00001100; + 120: 8c e0 ldi r24, 0x0C ; 12 + 122: 85 bd out 0x25, r24 ; 37 + 124: 08 95 ret + +00000126 <__vector_9>: + snap_event = snap_event_p; +} + +uint16_t steps_to_do = 0; +uint8_t stepper_state = 0; +ISR( TIMER2_COMP_vect ){ + 126: 1f 92 push r1 + 128: 0f 92 push r0 + 12a: 0f b6 in r0, 0x3f ; 63 + 12c: 0f 92 push r0 + 12e: 11 24 eor r1, r1 + 130: 0b b6 in r0, 0x3b ; 59 + 132: 0f 92 push r0 + 134: 2f 93 push r18 + 136: 3f 93 push r19 + 138: 4f 93 push r20 + 13a: 5f 93 push r21 + 13c: 6f 93 push r22 + 13e: 7f 93 push r23 + 140: 8f 93 push r24 + 142: 9f 93 push r25 + 144: af 93 push r26 + 146: bf 93 push r27 + 148: ef 93 push r30 + 14a: ff 93 push r31 + TCNT2 = 0; + 14c: 14 bc out 0x24, r1 ; 36 + + set_stepper_state(stepper_state); + 14e: 80 91 08 01 lds r24, 0x0108 ; 0x800108 <__data_end> + 152: d9 df rcall .-78 ; 0x106 + + if(stepper_state < 7){ + 154: 80 91 08 01 lds r24, 0x0108 ; 0x800108 <__data_end> + 158: 87 30 cpi r24, 0x07 ; 7 + 15a: 20 f4 brcc .+8 ; 0x164 <__vector_9+0x3e> + stepper_state++; + 15c: 8f 5f subi r24, 0xFF ; 255 + 15e: 80 93 08 01 sts 0x0108, r24 ; 0x800108 <__data_end> + 162: 2f c0 rjmp .+94 ; 0x1c2 <__vector_9+0x9c> + } else { + //OCR2 = ADCH; + stepper_state = 0; + 164: 10 92 08 01 sts 0x0108, r1 ; 0x800108 <__data_end> + + if(steps_to_do == 0){ + 168: 80 91 09 01 lds r24, 0x0109 ; 0x800109 + 16c: 90 91 0a 01 lds r25, 0x010A ; 0x80010a + 170: 00 97 sbiw r24, 0x00 ; 0 + 172: 19 f4 brne .+6 ; 0x17a <__vector_9+0x54> + TCCR2 = 0b00000000; + stepper_rotate_full_rotation(); + 174: 15 bc out 0x25, r1 ; 37 + 176: ce df rcall .-100 ; 0x114 + 178: 24 c0 rjmp .+72 ; 0x1c2 <__vector_9+0x9c> + } else { + + if(steps_to_do % 32 == 0){ + 17a: 8f 71 andi r24, 0x1F ; 31 + 17c: 99 27 eor r25, r25 + 17e: 89 2b or r24, r25 + 180: b9 f4 brne .+46 ; 0x1b0 <__vector_9+0x8a> + + if(PORTG == 0x01){ + 182: 80 91 65 00 lds r24, 0x0065 ; 0x800065 <__TEXT_REGION_LENGTH__+0x7e0065> + 186: 81 30 cpi r24, 0x01 ; 1 + 188: 19 f4 brne .+6 ; 0x190 <__vector_9+0x6a> + PORTG = 0x00; + 18a: 10 92 65 00 sts 0x0065, r1 ; 0x800065 <__TEXT_REGION_LENGTH__+0x7e0065> + 18e: 07 c0 rjmp .+14 ; 0x19e <__vector_9+0x78> + } else if (PORTG == 0x00){ + 190: 80 91 65 00 lds r24, 0x0065 ; 0x800065 <__TEXT_REGION_LENGTH__+0x7e0065> + 194: 81 11 cpse r24, r1 + 196: 03 c0 rjmp .+6 ; 0x19e <__vector_9+0x78> + PORTG = 0x01; + 198: 81 e0 ldi r24, 0x01 ; 1 + 19a: 80 93 65 00 sts 0x0065, r24 ; 0x800065 <__TEXT_REGION_LENGTH__+0x7e0065> + } + + if(snap_event != NULL) + 19e: e0 91 0b 01 lds r30, 0x010B ; 0x80010b + 1a2: f0 91 0c 01 lds r31, 0x010C ; 0x80010c + 1a6: 30 97 sbiw r30, 0x00 ; 0 + 1a8: 19 f0 breq .+6 ; 0x1b0 <__vector_9+0x8a> + snap_event(steps_to_do); + 1aa: 80 91 09 01 lds r24, 0x0109 ; 0x800109 + 1ae: 09 95 icall + } + + steps_to_do--; + 1b0: 80 91 09 01 lds r24, 0x0109 ; 0x800109 + 1b4: 90 91 0a 01 lds r25, 0x010A ; 0x80010a + 1b8: 01 97 sbiw r24, 0x01 ; 1 + 1ba: 90 93 0a 01 sts 0x010A, r25 ; 0x80010a + 1be: 80 93 09 01 sts 0x0109, r24 ; 0x800109 + } + } +} + 1c2: ff 91 pop r31 + 1c4: ef 91 pop r30 + 1c6: bf 91 pop r27 + 1c8: af 91 pop r26 + 1ca: 9f 91 pop r25 + 1cc: 8f 91 pop r24 + 1ce: 7f 91 pop r23 + 1d0: 6f 91 pop r22 + 1d2: 5f 91 pop r21 + 1d4: 4f 91 pop r20 + 1d6: 3f 91 pop r19 + 1d8: 2f 91 pop r18 + 1da: 0f 90 pop r0 + 1dc: 0b be out 0x3b, r0 ; 59 + 1de: 0f 90 pop r0 + 1e0: 0f be out 0x3f, r0 ; 63 + 1e2: 0f 90 pop r0 + 1e4: 1f 90 pop r1 + 1e6: 18 95 reti + +000001e8 : + steps_to_do = 512; + TCCR2 = 0b00001100; +} + +void stepper_rotate(uint16_t steps){ + steps_to_do = steps; + 1e8: 90 93 0a 01 sts 0x010A, r25 ; 0x80010a + 1ec: 80 93 09 01 sts 0x0109, r24 ; 0x800109 + TCCR2 = 0b00001100; + 1f0: 8c e0 ldi r24, 0x0C ; 12 + 1f2: 85 bd out 0x25, r24 ; 37 + 1f4: 08 95 ret + +000001f6 : +} + +void init_stepper_driver(){ + DDRE = 0xff; + 1f6: 8f ef ldi r24, 0xFF ; 255 + 1f8: 82 b9 out 0x02, r24 ; 2 + DDRG = 0xff; + 1fa: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> + PORTG = 0x01; + 1fe: 81 e0 ldi r24, 0x01 ; 1 + 200: 80 93 65 00 sts 0x0065, r24 ; 0x800065 <__TEXT_REGION_LENGTH__+0x7e0065> + PORTE = 0x00; + 204: 13 b8 out 0x03, r1 ; 3 + OCR2 = 50; + 206: 82 e3 ldi r24, 0x32 ; 50 + 208: 83 bd out 0x23, r24 ; 35 + TIMSK = BIT(7); + 20a: 80 e8 ldi r24, 0x80 ; 128 + 20c: 87 bf out 0x37, r24 ; 55 + sei(); + 20e: 78 94 sei + 210: 08 95 ret + +00000212 <_exit>: + 212: f8 94 cli + +00000214 <__stop_program>: + 214: ff cf rjmp .-2 ; 0x214 <__stop_program> diff --git a/Microcontrollers/GLCDdriver/Debug/Servo_driver.srec b/Microcontrollers/GLCDdriver/Debug/Servo_driver.srec new file mode 100644 index 0000000..8e5a033 --- /dev/null +++ b/Microcontrollers/GLCDdriver/Debug/Servo_driver.srec @@ -0,0 +1,37 @@ +S0140000536572766F5F6472697665722E7372656316 +S113000045C0000060C000005EC000005CC000008D +S11300105AC0000058C0000056C0000054C0000080 +S113002052C0000080C000004EC000004CC0000060 +S11300304AC0000048C0000046C0000044C00000A0 +S113004042C0000040C000003EC000003CC00000B0 +S11300503AC0000038C0000036C0000034C00000C0 +S113006032C0000030C000002EC000002CC00000D0 +S11300702AC0000028C0000026C0000024C00000E0 +S113008022C0000020C000001EC0000011241FBEBA +S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E6E1FB +S11300A0F2E000E00BBF02C007900D92A830B10748 +S11300B0D9F721E0A8E0B1E001C01D92AD30B2074C +S11300C0E1F716D0A6C09CCF20E030E008C0E3ECF6 +S11300D0F9E03197F1F700C000002F5F3F4F281778 +S11300E03907ACF3089580EE87B986E886B9089598 +S11300F010926100F8DF7FD080E092E075D084E652 +S113010090E0E2DFFCCFE82FF0E0E050FF4F808189 +S113011083B9089580E092E090930A0180930901E5 +S11301208CE085BD08951F920F920FB60F92112493 +S11301300BB60F922F933F934F935F936F937F93DD +S11301408F939F93AF93BF93EF93FF9314BC8091CE +S11301500801D9DF80910801873020F48F5F8093F4 +S113016008012FC0109208018091090190910A01A1 +S1130170009719F415BCCEDF24C08F719927892B01 +S1130180B9F480916500813019F41092650007C0BC +S113019080916500811103C081E080936500E09146 +S11301A00B01F0910C01309719F080910901099528 +S11301B08091090190910A01019790930A0180931B +S11301C00901FF91EF91BF91AF919F918F917F9121 +S11301D06F915F914F913F912F910F900BBE0F90B4 +S11301E00FBE0F901F90189590930A0180930901F8 +S11301F08CE085BD08958FEF82B98093640081E01F +S11302008093650013B882E383BD80E887BF789448 +S10902100895F894FFCFED +S10B0216080C040602030109AF +S9030000FC diff --git a/Microcontrollers/GLCDdriver/Debug/makedep.mk b/Microcontrollers/GLCDdriver/Debug/makedep.mk new file mode 100644 index 0000000..64c1a9e --- /dev/null +++ b/Microcontrollers/GLCDdriver/Debug/makedep.mk @@ -0,0 +1,8 @@ +################################################################################ +# Automatically-generated file. Do not edit or delete the file +################################################################################ + +main.c + +stepper_driver.c + diff --git a/Microcontrollers/GLCDdriver/Servo_driver.componentinfo.xml b/Microcontrollers/GLCDdriver/Servo_driver.componentinfo.xml new file mode 100644 index 0000000..c52b631 --- /dev/null +++ b/Microcontrollers/GLCDdriver/Servo_driver.componentinfo.xml @@ -0,0 +1,86 @@ + + + + + + + Device + Startup + + + Atmel + 1.6.0 + C:/Program Files (x86)\Atmel\Studio\7.0\Packs + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include\ + + include + C + + + include/ + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include\avr\iom128.h + + header + C + JdJ7J9I/SJh965SEyyyVYw== + + include/avr/iom128.h + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\templates\main.c + template + source + C Exe + 3JyV3AVW3kDDXpyeQO3NhQ== + + templates/main.c + Main file (.c) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\templates\main.cpp + template + source + C Exe + mkKaE95TOoATsuBGv6jmxg== + + templates/main.cpp + Main file (.cpp) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128 + + libraryPrefix + GCC + + + gcc/dev/atmega128 + + + + + ATmega_DFP + C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATmega_DFP/1.6.364/Atmel.ATmega_DFP.pdsc + 1.6.364 + true + ATmega128 + + + + Resolved + Fixed + true + + + \ No newline at end of file diff --git a/Microcontrollers/GLCDdriver/Servo_driver.cproj b/Microcontrollers/GLCDdriver/Servo_driver.cproj new file mode 100644 index 0000000..5b3cc41 --- /dev/null +++ b/Microcontrollers/GLCDdriver/Servo_driver.cproj @@ -0,0 +1,136 @@ + + + + 2.0 + 7.0 + com.Atmel.AVRGCC8.C + {fe1d92d4-4858-4112-ad41-e57799a980c9} + ATmega128 + none + Executable + C + $(MSBuildProjectName) + .elf + $(MSBuildProjectDirectory)\$(Configuration) + GLCDdriver + Servo_driver + GLCDdriver + Native + true + false + true + true + + + true + + 2 + 0 + 0 + + + + + + + + + + + + + + + + + + -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + True + True + True + True + True + False + True + True + + + NDEBUG + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Optimize for size (-Os) + True + True + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + + + + + + + -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + True + True + True + True + True + False + True + True + + + DEBUG + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Optimize debugging experience (-Og) + True + True + Default (-g2) + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Default (-Wa,-g) + + + + + + compile + + + compile + + + compile + + + + \ No newline at end of file diff --git a/Microcontrollers/GLCDdriver/main.c b/Microcontrollers/GLCDdriver/main.c new file mode 100644 index 0000000..c00ffa8 --- /dev/null +++ b/Microcontrollers/GLCDdriver/main.c @@ -0,0 +1,49 @@ +/* + * GLCDdriver.c + * + * Created: 10-Mar-21 10:47:34 AM + * Author : lemms + */ +#define F_CPU 10e6 +#include +#include +#include +#include +#include +#include + +#include "stepper_driver.h" + +void wait( int ms ) { + for (int tms=0; tms> 6); + return value; +} + +int main(void) +{ + /* Replace with your application code */ + DDRF = 0x00; + adcInit(); + init_stepper_driver(); + + stepper_rotate(512); + while (1) + { + wait(100); + } +} + diff --git a/Microcontrollers/GLCDdriver/stepper_driver.c b/Microcontrollers/GLCDdriver/stepper_driver.c new file mode 100644 index 0000000..22ad517 --- /dev/null +++ b/Microcontrollers/GLCDdriver/stepper_driver.c @@ -0,0 +1,101 @@ +/* + * stepper_driver.c + * PORTB + * Created: 10-Mar-21 12:21:47 PM + * Author: lemms + */ +#define F_CPU 10e6 + +#include +#include +#include +#include +#include + +#define BIT(x) (1 << (x)) + +uint8_t CCW[8] = {0x09,0x01,0x03,0x02,0x06,0x04,0x0c,0x08}; +uint8_t CW[8] = {0x08,0x0c,0x04,0x06,0x02,0x03,0x01,0x09}; + +/* + Een timer met interupt routine. + + in de interump routine een state machine voor de 8 nibbles + elke keer dat de interupt routine wordt geroepen wordt de state + incremented. hier houd je ook een var bij om de relatieve + positie te weten van de stappenmotor. + + Nog een timer voor microstepping. + + Timers: + timer voor de speed. + stappen van 100ms naar 10ms + prescaler = 255 +*/ + +void stepper_rotate_full_rotation(); + +void set_stepper_state(uint8_t count){ + PORTE = CW[count]; +} + +void (*snap_event)(uint8_t); + +void set_snap_event(void (*snap_event_p)(uint8_t)){ + snap_event = snap_event_p; +} + +uint16_t steps_to_do = 0; +uint8_t stepper_state = 0; +ISR( TIMER2_COMP_vect ){ + TCNT2 = 0; + + set_stepper_state(stepper_state); + + if(stepper_state < 7){ + stepper_state++; + } else { + //OCR2 = ADCH; + stepper_state = 0; + + if(steps_to_do == 0){ + TCCR2 = 0b00000000; + stepper_rotate_full_rotation(); + } else { + + if(steps_to_do % 32 == 0){ + + if(PORTG == 0x01){ + PORTG = 0x00; + } else if (PORTG == 0x00){ + PORTG = 0x01; + } + + if(snap_event != NULL) + snap_event(steps_to_do); + } + + steps_to_do--; + } + } +} + +void stepper_rotate_full_rotation(){ + steps_to_do = 512; + TCCR2 = 0b00001100; +} + +void stepper_rotate(uint16_t steps){ + steps_to_do = steps; + TCCR2 = 0b00001100; +} + +void init_stepper_driver(){ + DDRE = 0xff; + DDRG = 0xff; + PORTG = 0x01; + PORTE = 0x00; + OCR2 = 50; + TIMSK = BIT(7); + sei(); +} \ No newline at end of file diff --git a/Microcontrollers/GLCDdriver/stepper_driver.h b/Microcontrollers/GLCDdriver/stepper_driver.h new file mode 100644 index 0000000..252a79a --- /dev/null +++ b/Microcontrollers/GLCDdriver/stepper_driver.h @@ -0,0 +1,17 @@ +/* + * stepper_driver.h + * + * Created: 10-Mar-21 12:35:30 PM + * Author: lemms + */ + + +#ifndef STEPPER_DRIVER_H_ +#define STEPPER_DRIVER_H_ + +#include + +void stepper_rotate(uint16_t steps); +void init_stepper_driver(); + +#endif /* STEPPER_DRIVER_H_ */ \ No newline at end of file diff --git a/Microcontrollers/Microcontrollers.atsln b/Microcontrollers/Microcontrollers.atsln index 40435f0..08fcd7b 100644 --- a/Microcontrollers/Microcontrollers.atsln +++ b/Microcontrollers/Microcontrollers.atsln @@ -35,6 +35,12 @@ Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "ultrasonicSensor", "ultraso EndProject Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht C", "opdracht C\opdracht C.cproj", "{2DF6F5F3-181F-430E-B49A-3D9794F91482}" EndProject +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 4.b1", "opdracht 4.b1\opdracht 4.b1.cproj", "{596B8FFA-0A57-48B9-AE5D-B29F78D46CF6}" +EndProject +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 4.3", "opdracht 4.3\opdracht 4.3.cproj", "{F7219797-D668-49E2-AC80-7EAF068BA957}" +EndProject +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "Servo_driver", "GLCDdriver\Servo_driver.cproj", "{FE1D92D4-4858-4112-AD41-E57799A980C9}" +EndProject Global GlobalSection(SolutionConfigurationPlatforms) = preSolution Debug|AVR = Debug|AVR @@ -98,6 +104,7 @@ Global {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Debug|AVR.Build.0 = Debug|AVR {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Release|AVR.ActiveCfg = Release|AVR {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Release|AVR.Build.0 = Release|AVR +<<<<<<< Updated upstream {2DF6F5F3-181F-430E-B49A-3D9794F91482}.Debug|AVR.ActiveCfg = Debug|AVR {2DF6F5F3-181F-430E-B49A-3D9794F91482}.Debug|AVR.Build.0 = Debug|AVR {2DF6F5F3-181F-430E-B49A-3D9794F91482}.Release|AVR.ActiveCfg = Release|AVR @@ -112,6 +119,20 @@ Global {26DA64DE-DD48-4718-94B5-81F9EC5D4B33}.Release|AVR.ActiveCfg = Release|AVR {26DA64DE-DD48-4718-94B5-81F9EC5D4B33}.Release|AVR.Build.0 = Release|AVR >>>>>>> ultrasonic-sensor +======= + {596B8FFA-0A57-48B9-AE5D-B29F78D46CF6}.Debug|AVR.ActiveCfg = Debug|AVR + {596B8FFA-0A57-48B9-AE5D-B29F78D46CF6}.Debug|AVR.Build.0 = Debug|AVR + {596B8FFA-0A57-48B9-AE5D-B29F78D46CF6}.Release|AVR.ActiveCfg = Release|AVR + {596B8FFA-0A57-48B9-AE5D-B29F78D46CF6}.Release|AVR.Build.0 = Release|AVR + {F7219797-D668-49E2-AC80-7EAF068BA957}.Debug|AVR.ActiveCfg = Debug|AVR + {F7219797-D668-49E2-AC80-7EAF068BA957}.Debug|AVR.Build.0 = Debug|AVR + {F7219797-D668-49E2-AC80-7EAF068BA957}.Release|AVR.ActiveCfg = Release|AVR + {F7219797-D668-49E2-AC80-7EAF068BA957}.Release|AVR.Build.0 = Release|AVR + {FE1D92D4-4858-4112-AD41-E57799A980C9}.Debug|AVR.ActiveCfg = Debug|AVR + {FE1D92D4-4858-4112-AD41-E57799A980C9}.Debug|AVR.Build.0 = Debug|AVR + {FE1D92D4-4858-4112-AD41-E57799A980C9}.Release|AVR.ActiveCfg = Release|AVR + {FE1D92D4-4858-4112-AD41-E57799A980C9}.Release|AVR.Build.0 = Release|AVR +>>>>>>> Stashed changes EndGlobalSection GlobalSection(SolutionProperties) = preSolution HideSolutionNode = FALSE diff --git a/Microcontrollers/opdracht 1.5/main.c b/Microcontrollers/opdracht 1.5/main.c index 660d5eb..da214eb 100644 --- a/Microcontrollers/opdracht 1.5/main.c +++ b/Microcontrollers/opdracht 1.5/main.c @@ -11,6 +11,6 @@ int main(void) { while(1) { - //TODO:: Please write your application code + } } \ No newline at end of file diff --git a/Microcontrollers/opdracht 2.4/Debug/opdracht 2.4.lss b/Microcontrollers/opdracht 2.4/Debug/opdracht 2.4.lss index 05f745d..146c9df 100644 --- a/Microcontrollers/opdracht 2.4/Debug/opdracht 2.4.lss +++ b/Microcontrollers/opdracht 2.4/Debug/opdracht 2.4.lss @@ -11,23 +11,23 @@ Idx Name Size VMA LMA File off Algn CONTENTS, READONLY 3 .debug_aranges 00000028 00000000 00000000 00000277 2**0 CONTENTS, READONLY, DEBUGGING - 4 .debug_info 00000b85 00000000 00000000 0000029f 2**0 + 4 .debug_info 00000bac 00000000 00000000 0000029f 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_abbrev 00000854 00000000 00000000 00000e24 2**0 + 5 .debug_abbrev 00000854 00000000 00000000 00000e4b 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_line 000002b1 00000000 00000000 00001678 2**0 + 6 .debug_line 000002b1 00000000 00000000 0000169f 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_frame 00000034 00000000 00000000 0000192c 2**2 + 7 .debug_frame 00000034 00000000 00000000 00001950 2**2 CONTENTS, READONLY, DEBUGGING - 8 .debug_str 0000027d 00000000 00000000 00001960 2**0 + 8 .debug_str 0000027d 00000000 00000000 00001984 2**0 CONTENTS, READONLY, DEBUGGING - 9 .debug_loc 000000b2 00000000 00000000 00001bdd 2**0 + 9 .debug_loc 000000b2 00000000 00000000 00001c01 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_ranges 00000030 00000000 00000000 00001c8f 2**0 + 10 .debug_ranges 00000030 00000000 00000000 00001cb3 2**0 CONTENTS, READONLY, DEBUGGING 11 .text 00000004 00000140 00000140 000001b4 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 12 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00001cc0 2**2 + 12 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00001ce4 2**2 CONTENTS, READONLY, DEBUGGING 13 .text.wait 0000001e 00000122 00000122 00000196 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE @@ -136,7 +136,7 @@ Disassembly of section .text: Disassembly of section .text: 00000140 <__bad_interrupt>: - 140: 0c 94 00 00 jmp 0 ; 0x0 <__TEXT_REGION_ORIGIN__> + 140: 0c 94 00 00 jmp 0 ; 0x0 <__vectors> Disassembly of section .text.wait: @@ -179,14 +179,14 @@ Disassembly of section .text.main: int main( void ) { - DDRA = 0xFF; + DDRA = 0xFF; // set PORTA to all output ec: 8f ef ldi r24, 0xFF ; 255 ee: 8a bb out 0x1a, r24 ; 26 while (1==1) { // Set index to begin of pattern array int index = 0; - // as long as delay has meaningful content + // loop through the array for (int i = 0; i < sizeof(segments)/sizeof(segments[0]); i++) f0: 00 e0 ldi r16, 0x00 ; 0 f2: 10 e0 ldi r17, 0x00 ; 0 @@ -198,7 +198,7 @@ int main( void ) int index = 0; f4: c0 e0 ldi r28, 0x00 ; 0 f6: d0 e0 ldi r29, 0x00 ; 0 - // as long as delay has meaningful content + // loop through the array for (int i = 0; i < sizeof(segments)/sizeof(segments[0]); i++) f8: 10 c0 rjmp .+32 ; 0x11a { @@ -225,7 +225,7 @@ int main( void ) { // Set index to begin of pattern array int index = 0; - // as long as delay has meaningful content + // loop through the array for (int i = 0; i < sizeof(segments)/sizeof(segments[0]); i++) 116: 0f 5f subi r16, 0xFF ; 255 118: 1f 4f sbci r17, 0xFF ; 255 diff --git a/Microcontrollers/opdracht 3.2/Debug/opdracht 3.2.lss b/Microcontrollers/opdracht 3.2/Debug/opdracht 3.2.lss index 9fcb42e..7a7f150 100644 --- a/Microcontrollers/opdracht 3.2/Debug/opdracht 3.2.lss +++ b/Microcontrollers/opdracht 3.2/Debug/opdracht 3.2.lss @@ -23,11 +23,11 @@ Idx Name Size VMA LMA File off Algn CONTENTS, READONLY, DEBUGGING 9 .debug_frame 000001e0 00000000 00000000 00002be0 2**2 CONTENTS, READONLY, DEBUGGING - 10 .debug_str 00000537 00000000 00000000 00002dc0 2**0 + 10 .debug_str 0000055e 00000000 00000000 00002dc0 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_loc 000004dd 00000000 00000000 000032f7 2**0 + 11 .debug_loc 000004dd 00000000 00000000 0000331e 2**0 CONTENTS, READONLY, DEBUGGING - 12 .debug_ranges 00000090 00000000 00000000 000037d4 2**0 + 12 .debug_ranges 00000090 00000000 00000000 000037fb 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -471,10 +471,10 @@ ISR( TIMER2_OVF_vect ) { 218: df 93 push r29 21a: cd b7 in r28, 0x3d ; 61 21c: de b7 in r29, 0x3e ; 62 + int length = snprintf(NULL, 0, "%d", number + 1); char str[length + 1]; snprintf(str, length + 1, "%d", number + 1); - lcd_write_string(str); } 21e: cd b6 in r12, 0x3d ; 61 @@ -551,7 +551,6 @@ ISR( TIMER2_OVF_vect ) { 2a6: 1f 93 push r17 2a8: 0f 93 push r16 2aa: 50 d0 rcall .+160 ; 0x34c - lcd_write_string(str); 2ac: 80 2f mov r24, r16 2ae: 91 2f mov r25, r17 diff --git a/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.lss b/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.lss index 8c6342e..e6eb5ac 100644 --- a/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.lss +++ b/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.lss @@ -3,29 +3,29 @@ opdracht 4.1.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 00000004 00800100 000008f4 00000968 2**0 + 0 .data 00000004 00800100 000008e8 0000095c 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 000008f4 00000000 00000000 00000074 2**1 + 1 .text 000008e8 00000000 00000000 00000074 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .comment 0000005c 00000000 00000000 0000096c 2**0 + 2 .comment 0000005c 00000000 00000000 00000960 2**0 CONTENTS, READONLY - 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 000009c8 2**2 + 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 000009bc 2**2 CONTENTS, READONLY - 4 .debug_aranges 000000c0 00000000 00000000 00000a04 2**0 + 4 .debug_aranges 000000c0 00000000 00000000 000009f8 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_info 00000f30 00000000 00000000 00000ac4 2**0 + 5 .debug_info 00000f27 00000000 00000000 00000ab8 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_abbrev 00000a8d 00000000 00000000 000019f4 2**0 + 6 .debug_abbrev 00000a8d 00000000 00000000 000019df 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_line 000006f1 00000000 00000000 00002481 2**0 + 7 .debug_line 000006eb 00000000 00000000 0000246c 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_frame 000001b4 00000000 00000000 00002b74 2**2 + 8 .debug_frame 000001b4 00000000 00000000 00002b58 2**2 CONTENTS, READONLY, DEBUGGING - 9 .debug_str 0000056a 00000000 00000000 00002d28 2**0 + 9 .debug_str 0000056a 00000000 00000000 00002d0c 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_loc 00000463 00000000 00000000 00003292 2**0 + 10 .debug_loc 00000463 00000000 00000000 00003276 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_ranges 000000a0 00000000 00000000 000036f5 2**0 + 11 .debug_ranges 000000a0 00000000 00000000 000036d9 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -49,7 +49,7 @@ Disassembly of section .text: 1e: 00 00 nop 20: 4a c0 rjmp .+148 ; 0xb6 <__bad_interrupt> 22: 00 00 nop - 24: 3b c1 rjmp .+630 ; 0x29c <__vector_9> + 24: 36 c1 rjmp .+620 ; 0x292 <__vector_9> 26: 00 00 nop 28: 46 c0 rjmp .+140 ; 0xb6 <__bad_interrupt> 2a: 00 00 nop @@ -114,7 +114,7 @@ Disassembly of section .text: 98: 11 e0 ldi r17, 0x01 ; 1 9a: a0 e0 ldi r26, 0x00 ; 0 9c: b1 e0 ldi r27, 0x01 ; 1 - 9e: e4 ef ldi r30, 0xF4 ; 244 + 9e: e8 ee ldi r30, 0xE8 ; 232 a0: f8 e0 ldi r31, 0x08 ; 8 a2: 00 e0 ldi r16, 0x00 ; 0 a4: 0b bf out 0x3b, r16 ; 59 @@ -124,8 +124,8 @@ Disassembly of section .text: ac: a4 30 cpi r26, 0x04 ; 4 ae: b1 07 cpc r27, r17 b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> - b2: 11 d1 rcall .+546 ; 0x2d6
- b4: 1d c4 rjmp .+2106 ; 0x8f0 <_exit> + b2: 0c d1 rcall .+536 ; 0x2cc
+ b4: 17 c4 rjmp .+2094 ; 0x8e4 <_exit> 000000b6 <__bad_interrupt>: b6: a4 cf rjmp .-184 ; 0x0 <__vectors> @@ -444,7 +444,7 @@ void lcd_write_integer(int number){ 1ec: 1f 92 push r1 1ee: 1f 92 push r1 1f0: 1f 92 push r1 - 1f2: 95 d0 rcall .+298 ; 0x31e + 1f2: 8f d0 rcall .+286 ; 0x312 char str[length + 1]; 1f4: 01 96 adiw r24, 0x01 ; 1 1f6: 2d b7 in r18, 0x3d ; 61 @@ -476,7 +476,7 @@ void lcd_write_integer(int number){ 228: 8f 93 push r24 22a: 1f 93 push r17 22c: 0f 93 push r16 - 22e: 77 d0 rcall .+238 ; 0x31e + 22e: 71 d0 rcall .+226 ; 0x312 lcd_write_string(str); 230: 80 2f mov r24, r16 232: 91 2f mov r25, r17 @@ -508,12 +508,12 @@ void lcd_write_integer(int number){ 264: 08 95 ret 00000266 : -#include -#include "lcd_control.h" -#define BIT(x) (1 << (x)) + } +} -void wait( int ms ) { - for (int tms=0; tms @@ -528,930 +528,915 @@ void wait( int ms ) { 27c: 28 17 cp r18, r24 27e: 39 07 cpc r19, r25 280: ac f3 brlt .-22 ; 0x26c - _delay_ms( 1 ); // library function (max 30 ms at 8MHz) - } -} 282: 08 95 ret -00000284 : - -void adcInit(){ - ADMUX = 0b11100000; // internal reference: 2.56V and SEI on ADC0 and left-adjusted. - 284: 80 ee ldi r24, 0xE0 ; 224 - 286: 87 b9 out 0x07, r24 ; 7 - ADCSRA = 0b10000110; // enable ADC. No free-run. Clock 64 D-factor. - 288: 86 e8 ldi r24, 0x86 ; 134 - 28a: 86 b9 out 0x06, r24 ; 6 - 28c: 08 95 ret - -0000028e : +00000284 : } void timer2Init( void ) { TIMSK |= BIT(7); // T2 compare match interrupt enable - 28e: 87 b7 in r24, 0x37 ; 55 - 290: 80 68 ori r24, 0x80 ; 128 - 292: 87 bf out 0x37, r24 ; 55 + 284: 87 b7 in r24, 0x37 ; 55 + 286: 80 68 ori r24, 0x80 ; 128 + 288: 87 bf out 0x37, r24 ; 55 sei(); // turn_on interrupt all - 294: 78 94 sei + 28a: 78 94 sei TCCR2 = 0b00000011; // Initialize T2: timer, pre-scaler=64 - 296: 83 e0 ldi r24, 0x03 ; 3 - 298: 85 bd out 0x25, r24 ; 37 - 29a: 08 95 ret + 28c: 83 e0 ldi r24, 0x03 ; 3 + 28e: 85 bd out 0x25, r24 ; 37 + 290: 08 95 ret -0000029c <__vector_9>: +00000292 <__vector_9>: } ISR( TIMER2_COMP_vect ) { - 29c: 1f 92 push r1 - 29e: 0f 92 push r0 - 2a0: 0f b6 in r0, 0x3f ; 63 - 2a2: 0f 92 push r0 - 2a4: 11 24 eor r1, r1 - 2a6: 8f 93 push r24 + 292: 1f 92 push r1 + 294: 0f 92 push r0 + 296: 0f b6 in r0, 0x3f ; 63 + 298: 0f 92 push r0 + 29a: 11 24 eor r1, r1 + 29c: 8f 93 push r24 ADCSRA |= BIT(6); - 2a8: 86 b1 in r24, 0x06 ; 6 - 2aa: 80 64 ori r24, 0x40 ; 64 - 2ac: 86 b9 out 0x06, r24 ; 6 + 29e: 86 b1 in r24, 0x06 ; 6 + 2a0: 80 64 ori r24, 0x40 ; 64 + 2a2: 86 b9 out 0x06, r24 ; 6 } - 2ae: 8f 91 pop r24 - 2b0: 0f 90 pop r0 - 2b2: 0f be out 0x3f, r0 ; 63 - 2b4: 0f 90 pop r0 - 2b6: 1f 90 pop r1 - 2b8: 18 95 reti + 2a4: 8f 91 pop r24 + 2a6: 0f 90 pop r0 + 2a8: 0f be out 0x3f, r0 ; 63 + 2aa: 0f 90 pop r0 + 2ac: 1f 90 pop r1 + 2ae: 18 95 reti -000002ba : +000002b0 : int getADCValue(){ int value = 0; value = ADCH; - 2ba: 85 b1 in r24, 0x05 ; 5 - 2bc: 90 e0 ldi r25, 0x00 ; 0 + 2b0: 85 b1 in r24, 0x05 ; 5 + 2b2: 90 e0 ldi r25, 0x00 ; 0 value <<= 2; - 2be: 88 0f add r24, r24 - 2c0: 99 1f adc r25, r25 - 2c2: 88 0f add r24, r24 - 2c4: 99 1f adc r25, r25 + 2b4: 88 0f add r24, r24 + 2b6: 99 1f adc r25, r25 + 2b8: 88 0f add r24, r24 + 2ba: 99 1f adc r25, r25 value += (ADCL >> 6); - 2c6: 24 b1 in r18, 0x04 ; 4 - 2c8: 22 95 swap r18 - 2ca: 26 95 lsr r18 - 2cc: 26 95 lsr r18 - 2ce: 23 70 andi r18, 0x03 ; 3 + 2bc: 24 b1 in r18, 0x04 ; 4 + 2be: 22 95 swap r18 + 2c0: 26 95 lsr r18 + 2c2: 26 95 lsr r18 + 2c4: 23 70 andi r18, 0x03 ; 3 return value; } - 2d0: 82 0f add r24, r18 - 2d2: 91 1d adc r25, r1 - 2d4: 08 95 ret + 2c6: 82 0f add r24, r18 + 2c8: 91 1d adc r25, r1 + 2ca: 08 95 ret -000002d6
: +000002cc
: int main(void) { int previousValue = 0; /* Replace with your application code */ DDRF = 0x00; // set port F input. - 2d6: 10 92 61 00 sts 0x0061, r1 ; 0x800061 <__TEXT_REGION_LENGTH__+0x7e0061> + 2cc: 10 92 61 00 sts 0x0061, r1 ; 0x800061 <__TEXT_REGION_LENGTH__+0x7e0061> DDRE = 0xFF; // all port A output. - 2da: 8f ef ldi r24, 0xFF ; 255 - 2dc: 82 b9 out 0x02, r24 ; 2 - adcInit(); - 2de: d2 df rcall .-92 ; 0x284 + 2d0: 8f ef ldi r24, 0xFF ; 255 + 2d2: 82 b9 out 0x02, r24 ; 2 + init_4bits_mode(); - 2e0: 40 df rcall .-384 ; 0x162 - 2e2: 8f e1 ldi r24, 0x1F ; 31 - 2e4: 9e e4 ldi r25, 0x4E ; 78 - 2e6: 01 97 sbiw r24, 0x01 ; 1 - 2e8: f1 f7 brne .-4 ; 0x2e6 - 2ea: 00 c0 rjmp .+0 ; 0x2ec - 2ec: 00 00 nop + 2d4: 46 df rcall .-372 ; 0x162 + 2d6: 8f e1 ldi r24, 0x1F ; 31 + 2d8: 9e e4 ldi r25, 0x4E ; 78 + 2da: 01 97 sbiw r24, 0x01 ; 1 + 2dc: f1 f7 brne .-4 ; 0x2da + 2de: 00 c0 rjmp .+0 ; 0x2e0 _delay_ms(10); lcd_clear(); - 2ee: 2e df rcall .-420 ; 0x14c - 2f0: ce df rcall .-100 ; 0x28e + 2e0: 00 00 nop timer2Init(); - 2f2: 80 e0 ldi r24, 0x00 ; 0 - 2f4: 90 e0 ldi r25, 0x00 ; 0 + 2e2: 34 df rcall .-408 ; 0x14c + 2e4: cf df rcall .-98 ; 0x284 int main(void) { int previousValue = 0; - 2f6: 25 b1 in r18, 0x05 ; 5 - 2f8: 22 bb out 0x12, r18 ; 18 + 2e6: 80 e0 ldi r24, 0x00 ; 0 + 2e8: 90 e0 ldi r25, 0x00 ; 0 lcd_clear(); timer2Init(); while (1) { PORTD = ADCH; - 2fa: 24 b1 in r18, 0x04 ; 4 - 2fc: 23 b9 out 0x03, r18 ; 3 + 2ea: 25 b1 in r18, 0x05 ; 5 + 2ec: 22 bb out 0x12, r18 ; 18 PORTE = ADCL; - 2fe: c5 b1 in r28, 0x05 ; 5 - 300: d0 e0 ldi r29, 0x00 ; 0 + 2ee: 24 b1 in r18, 0x04 ; 4 + 2f0: 23 b9 out 0x03, r18 ; 3 int number = ADCH; - 302: 8c 17 cp r24, r28 + 2f2: c5 b1 in r28, 0x05 ; 5 + 2f4: d0 e0 ldi r29, 0x00 ; 0 if(previousValue != number){ - 304: 9d 07 cpc r25, r29 - 306: 31 f0 breq .+12 ; 0x314 + 2f6: 8c 17 cp r24, r28 + 2f8: 9d 07 cpc r25, r29 lcd_clear(); - 308: 21 df rcall .-446 ; 0x14c + 2fa: 31 f0 breq .+12 ; 0x308 wait(10); - 30a: 8a e0 ldi r24, 0x0A ; 10 - 30c: 90 e0 ldi r25, 0x00 ; 0 - 30e: ab df rcall .-170 ; 0x266 + 2fc: 27 df rcall .-434 ; 0x14c + 2fe: 8a e0 ldi r24, 0x0A ; 10 + 300: 90 e0 ldi r25, 0x00 ; 0 - lcd_write_integer(getADCValue()); - 310: d4 df rcall .-88 ; 0x2ba - 312: 51 df rcall .-350 ; 0x1b6 - 314: 84 e6 ldi r24, 0x64 ; 100 - 316: 90 e0 ldi r25, 0x00 ; 0 + lcd_write_integer((getADCValue())); + 302: b1 df rcall .-158 ; 0x266 + 304: d5 df rcall .-86 ; 0x2b0 + 306: 57 df rcall .-338 ; 0x1b6 + 308: 84 e6 ldi r24, 0x64 ; 100 } previousValue = number; wait(100); - 318: a6 df rcall .-180 ; 0x266 - 31a: ce 01 movw r24, r28 - 31c: ec cf rjmp .-40 ; 0x2f6 + 30a: 90 e0 ldi r25, 0x00 ; 0 + 30c: ac df rcall .-168 ; 0x266 + 30e: ce 01 movw r24, r28 + 310: ec cf rjmp .-40 ; 0x2ea -0000031e : - 31e: 0f 93 push r16 +00000312 : wait(10); - lcd_write_integer(getADCValue()); + lcd_write_integer((getADCValue())); } previousValue = number; - 320: 1f 93 push r17 + 312: 0f 93 push r16 wait(100); } - 322: cf 93 push r28 - 324: df 93 push r29 - 326: cd b7 in r28, 0x3d ; 61 - 328: de b7 in r29, 0x3e ; 62 - 32a: 2e 97 sbiw r28, 0x0e ; 14 - 32c: 0f b6 in r0, 0x3f ; 63 - 32e: f8 94 cli - 330: de bf out 0x3e, r29 ; 62 - 332: 0f be out 0x3f, r0 ; 63 - 334: cd bf out 0x3d, r28 ; 61 - 336: 0d 89 ldd r16, Y+21 ; 0x15 - 338: 1e 89 ldd r17, Y+22 ; 0x16 - 33a: 8f 89 ldd r24, Y+23 ; 0x17 - 33c: 98 8d ldd r25, Y+24 ; 0x18 - 33e: 26 e0 ldi r18, 0x06 ; 6 - 340: 2c 83 std Y+4, r18 ; 0x04 - 342: 1a 83 std Y+2, r17 ; 0x02 - 344: 09 83 std Y+1, r16 ; 0x01 - 346: 97 ff sbrs r25, 7 - 348: 02 c0 rjmp .+4 ; 0x34e - 34a: 80 e0 ldi r24, 0x00 ; 0 - 34c: 90 e8 ldi r25, 0x80 ; 128 - 34e: 01 97 sbiw r24, 0x01 ; 1 - 350: 9e 83 std Y+6, r25 ; 0x06 - 352: 8d 83 std Y+5, r24 ; 0x05 - 354: ae 01 movw r20, r28 - 356: 45 5e subi r20, 0xE5 ; 229 - 358: 5f 4f sbci r21, 0xFF ; 255 - 35a: 69 8d ldd r22, Y+25 ; 0x19 - 35c: 7a 8d ldd r23, Y+26 ; 0x1a - 35e: ce 01 movw r24, r28 - 360: 01 96 adiw r24, 0x01 ; 1 - 362: 19 d0 rcall .+50 ; 0x396 - 364: 4d 81 ldd r20, Y+5 ; 0x05 - 366: 5e 81 ldd r21, Y+6 ; 0x06 - 368: 57 fd sbrc r21, 7 - 36a: 0a c0 rjmp .+20 ; 0x380 - 36c: 2f 81 ldd r18, Y+7 ; 0x07 - 36e: 38 85 ldd r19, Y+8 ; 0x08 - 370: 42 17 cp r20, r18 - 372: 53 07 cpc r21, r19 - 374: 0c f4 brge .+2 ; 0x378 - 376: 9a 01 movw r18, r20 - 378: f8 01 movw r30, r16 - 37a: e2 0f add r30, r18 - 37c: f3 1f adc r31, r19 - 37e: 10 82 st Z, r1 - 380: 2e 96 adiw r28, 0x0e ; 14 - 382: 0f b6 in r0, 0x3f ; 63 - 384: f8 94 cli - 386: de bf out 0x3e, r29 ; 62 - 388: 0f be out 0x3f, r0 ; 63 - 38a: cd bf out 0x3d, r28 ; 61 - 38c: df 91 pop r29 - 38e: cf 91 pop r28 - 390: 1f 91 pop r17 - 392: 0f 91 pop r16 - 394: 08 95 ret + 314: 1f 93 push r17 + 316: cf 93 push r28 + 318: df 93 push r29 + 31a: cd b7 in r28, 0x3d ; 61 + 31c: de b7 in r29, 0x3e ; 62 + 31e: 2e 97 sbiw r28, 0x0e ; 14 + 320: 0f b6 in r0, 0x3f ; 63 + 322: f8 94 cli + 324: de bf out 0x3e, r29 ; 62 + 326: 0f be out 0x3f, r0 ; 63 + 328: cd bf out 0x3d, r28 ; 61 + 32a: 0d 89 ldd r16, Y+21 ; 0x15 + 32c: 1e 89 ldd r17, Y+22 ; 0x16 + 32e: 8f 89 ldd r24, Y+23 ; 0x17 + 330: 98 8d ldd r25, Y+24 ; 0x18 + 332: 26 e0 ldi r18, 0x06 ; 6 + 334: 2c 83 std Y+4, r18 ; 0x04 + 336: 1a 83 std Y+2, r17 ; 0x02 + 338: 09 83 std Y+1, r16 ; 0x01 + 33a: 97 ff sbrs r25, 7 + 33c: 02 c0 rjmp .+4 ; 0x342 + 33e: 80 e0 ldi r24, 0x00 ; 0 + 340: 90 e8 ldi r25, 0x80 ; 128 + 342: 01 97 sbiw r24, 0x01 ; 1 + 344: 9e 83 std Y+6, r25 ; 0x06 + 346: 8d 83 std Y+5, r24 ; 0x05 + 348: ae 01 movw r20, r28 + 34a: 45 5e subi r20, 0xE5 ; 229 + 34c: 5f 4f sbci r21, 0xFF ; 255 + 34e: 69 8d ldd r22, Y+25 ; 0x19 + 350: 7a 8d ldd r23, Y+26 ; 0x1a + 352: ce 01 movw r24, r28 + 354: 01 96 adiw r24, 0x01 ; 1 + 356: 19 d0 rcall .+50 ; 0x38a + 358: 4d 81 ldd r20, Y+5 ; 0x05 + 35a: 5e 81 ldd r21, Y+6 ; 0x06 + 35c: 57 fd sbrc r21, 7 + 35e: 0a c0 rjmp .+20 ; 0x374 + 360: 2f 81 ldd r18, Y+7 ; 0x07 + 362: 38 85 ldd r19, Y+8 ; 0x08 + 364: 42 17 cp r20, r18 + 366: 53 07 cpc r21, r19 + 368: 0c f4 brge .+2 ; 0x36c + 36a: 9a 01 movw r18, r20 + 36c: f8 01 movw r30, r16 + 36e: e2 0f add r30, r18 + 370: f3 1f adc r31, r19 + 372: 10 82 st Z, r1 + 374: 2e 96 adiw r28, 0x0e ; 14 + 376: 0f b6 in r0, 0x3f ; 63 + 378: f8 94 cli + 37a: de bf out 0x3e, r29 ; 62 + 37c: 0f be out 0x3f, r0 ; 63 + 37e: cd bf out 0x3d, r28 ; 61 + 380: df 91 pop r29 + 382: cf 91 pop r28 + 384: 1f 91 pop r17 + 386: 0f 91 pop r16 + 388: 08 95 ret -00000396 : - 396: 2f 92 push r2 - 398: 3f 92 push r3 - 39a: 4f 92 push r4 - 39c: 5f 92 push r5 - 39e: 6f 92 push r6 - 3a0: 7f 92 push r7 - 3a2: 8f 92 push r8 - 3a4: 9f 92 push r9 - 3a6: af 92 push r10 - 3a8: bf 92 push r11 - 3aa: cf 92 push r12 - 3ac: df 92 push r13 - 3ae: ef 92 push r14 - 3b0: ff 92 push r15 - 3b2: 0f 93 push r16 - 3b4: 1f 93 push r17 - 3b6: cf 93 push r28 - 3b8: df 93 push r29 - 3ba: cd b7 in r28, 0x3d ; 61 - 3bc: de b7 in r29, 0x3e ; 62 - 3be: 2b 97 sbiw r28, 0x0b ; 11 - 3c0: 0f b6 in r0, 0x3f ; 63 - 3c2: f8 94 cli - 3c4: de bf out 0x3e, r29 ; 62 - 3c6: 0f be out 0x3f, r0 ; 63 - 3c8: cd bf out 0x3d, r28 ; 61 - 3ca: 6c 01 movw r12, r24 - 3cc: 7b 01 movw r14, r22 - 3ce: 8a 01 movw r16, r20 - 3d0: fc 01 movw r30, r24 - 3d2: 17 82 std Z+7, r1 ; 0x07 - 3d4: 16 82 std Z+6, r1 ; 0x06 - 3d6: 83 81 ldd r24, Z+3 ; 0x03 - 3d8: 81 ff sbrs r24, 1 - 3da: bf c1 rjmp .+894 ; 0x75a <__LOCK_REGION_LENGTH__+0x35a> - 3dc: ce 01 movw r24, r28 - 3de: 01 96 adiw r24, 0x01 ; 1 - 3e0: 3c 01 movw r6, r24 - 3e2: f6 01 movw r30, r12 - 3e4: 93 81 ldd r25, Z+3 ; 0x03 - 3e6: f7 01 movw r30, r14 - 3e8: 93 fd sbrc r25, 3 - 3ea: 85 91 lpm r24, Z+ - 3ec: 93 ff sbrs r25, 3 - 3ee: 81 91 ld r24, Z+ - 3f0: 7f 01 movw r14, r30 - 3f2: 88 23 and r24, r24 - 3f4: 09 f4 brne .+2 ; 0x3f8 - 3f6: ad c1 rjmp .+858 ; 0x752 <__LOCK_REGION_LENGTH__+0x352> - 3f8: 85 32 cpi r24, 0x25 ; 37 - 3fa: 39 f4 brne .+14 ; 0x40a <__LOCK_REGION_LENGTH__+0xa> - 3fc: 93 fd sbrc r25, 3 - 3fe: 85 91 lpm r24, Z+ - 400: 93 ff sbrs r25, 3 - 402: 81 91 ld r24, Z+ - 404: 7f 01 movw r14, r30 - 406: 85 32 cpi r24, 0x25 ; 37 - 408: 21 f4 brne .+8 ; 0x412 <__LOCK_REGION_LENGTH__+0x12> - 40a: b6 01 movw r22, r12 - 40c: 90 e0 ldi r25, 0x00 ; 0 - 40e: d6 d1 rcall .+940 ; 0x7bc - 410: e8 cf rjmp .-48 ; 0x3e2 - 412: 91 2c mov r9, r1 - 414: 21 2c mov r2, r1 - 416: 31 2c mov r3, r1 - 418: ff e1 ldi r31, 0x1F ; 31 - 41a: f3 15 cp r31, r3 - 41c: d8 f0 brcs .+54 ; 0x454 <__LOCK_REGION_LENGTH__+0x54> - 41e: 8b 32 cpi r24, 0x2B ; 43 - 420: 79 f0 breq .+30 ; 0x440 <__LOCK_REGION_LENGTH__+0x40> - 422: 38 f4 brcc .+14 ; 0x432 <__LOCK_REGION_LENGTH__+0x32> - 424: 80 32 cpi r24, 0x20 ; 32 - 426: 79 f0 breq .+30 ; 0x446 <__LOCK_REGION_LENGTH__+0x46> - 428: 83 32 cpi r24, 0x23 ; 35 - 42a: a1 f4 brne .+40 ; 0x454 <__LOCK_REGION_LENGTH__+0x54> - 42c: 23 2d mov r18, r3 - 42e: 20 61 ori r18, 0x10 ; 16 - 430: 1d c0 rjmp .+58 ; 0x46c <__LOCK_REGION_LENGTH__+0x6c> - 432: 8d 32 cpi r24, 0x2D ; 45 - 434: 61 f0 breq .+24 ; 0x44e <__LOCK_REGION_LENGTH__+0x4e> - 436: 80 33 cpi r24, 0x30 ; 48 - 438: 69 f4 brne .+26 ; 0x454 <__LOCK_REGION_LENGTH__+0x54> - 43a: 23 2d mov r18, r3 - 43c: 21 60 ori r18, 0x01 ; 1 - 43e: 16 c0 rjmp .+44 ; 0x46c <__LOCK_REGION_LENGTH__+0x6c> - 440: 83 2d mov r24, r3 - 442: 82 60 ori r24, 0x02 ; 2 - 444: 38 2e mov r3, r24 - 446: e3 2d mov r30, r3 - 448: e4 60 ori r30, 0x04 ; 4 - 44a: 3e 2e mov r3, r30 - 44c: 2a c0 rjmp .+84 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> - 44e: f3 2d mov r31, r3 - 450: f8 60 ori r31, 0x08 ; 8 - 452: 1d c0 rjmp .+58 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e> - 454: 37 fc sbrc r3, 7 - 456: 2d c0 rjmp .+90 ; 0x4b2 <__LOCK_REGION_LENGTH__+0xb2> - 458: 20 ed ldi r18, 0xD0 ; 208 - 45a: 28 0f add r18, r24 - 45c: 2a 30 cpi r18, 0x0A ; 10 - 45e: 40 f0 brcs .+16 ; 0x470 <__LOCK_REGION_LENGTH__+0x70> - 460: 8e 32 cpi r24, 0x2E ; 46 - 462: b9 f4 brne .+46 ; 0x492 <__LOCK_REGION_LENGTH__+0x92> - 464: 36 fc sbrc r3, 6 - 466: 75 c1 rjmp .+746 ; 0x752 <__LOCK_REGION_LENGTH__+0x352> - 468: 23 2d mov r18, r3 - 46a: 20 64 ori r18, 0x40 ; 64 - 46c: 32 2e mov r3, r18 - 46e: 19 c0 rjmp .+50 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> - 470: 36 fe sbrs r3, 6 - 472: 06 c0 rjmp .+12 ; 0x480 <__LOCK_REGION_LENGTH__+0x80> - 474: 8a e0 ldi r24, 0x0A ; 10 - 476: 98 9e mul r9, r24 +0000038a : + 38a: 2f 92 push r2 + 38c: 3f 92 push r3 + 38e: 4f 92 push r4 + 390: 5f 92 push r5 + 392: 6f 92 push r6 + 394: 7f 92 push r7 + 396: 8f 92 push r8 + 398: 9f 92 push r9 + 39a: af 92 push r10 + 39c: bf 92 push r11 + 39e: cf 92 push r12 + 3a0: df 92 push r13 + 3a2: ef 92 push r14 + 3a4: ff 92 push r15 + 3a6: 0f 93 push r16 + 3a8: 1f 93 push r17 + 3aa: cf 93 push r28 + 3ac: df 93 push r29 + 3ae: cd b7 in r28, 0x3d ; 61 + 3b0: de b7 in r29, 0x3e ; 62 + 3b2: 2b 97 sbiw r28, 0x0b ; 11 + 3b4: 0f b6 in r0, 0x3f ; 63 + 3b6: f8 94 cli + 3b8: de bf out 0x3e, r29 ; 62 + 3ba: 0f be out 0x3f, r0 ; 63 + 3bc: cd bf out 0x3d, r28 ; 61 + 3be: 6c 01 movw r12, r24 + 3c0: 7b 01 movw r14, r22 + 3c2: 8a 01 movw r16, r20 + 3c4: fc 01 movw r30, r24 + 3c6: 17 82 std Z+7, r1 ; 0x07 + 3c8: 16 82 std Z+6, r1 ; 0x06 + 3ca: 83 81 ldd r24, Z+3 ; 0x03 + 3cc: 81 ff sbrs r24, 1 + 3ce: bf c1 rjmp .+894 ; 0x74e <__LOCK_REGION_LENGTH__+0x34e> + 3d0: ce 01 movw r24, r28 + 3d2: 01 96 adiw r24, 0x01 ; 1 + 3d4: 3c 01 movw r6, r24 + 3d6: f6 01 movw r30, r12 + 3d8: 93 81 ldd r25, Z+3 ; 0x03 + 3da: f7 01 movw r30, r14 + 3dc: 93 fd sbrc r25, 3 + 3de: 85 91 lpm r24, Z+ + 3e0: 93 ff sbrs r25, 3 + 3e2: 81 91 ld r24, Z+ + 3e4: 7f 01 movw r14, r30 + 3e6: 88 23 and r24, r24 + 3e8: 09 f4 brne .+2 ; 0x3ec + 3ea: ad c1 rjmp .+858 ; 0x746 <__LOCK_REGION_LENGTH__+0x346> + 3ec: 85 32 cpi r24, 0x25 ; 37 + 3ee: 39 f4 brne .+14 ; 0x3fe + 3f0: 93 fd sbrc r25, 3 + 3f2: 85 91 lpm r24, Z+ + 3f4: 93 ff sbrs r25, 3 + 3f6: 81 91 ld r24, Z+ + 3f8: 7f 01 movw r14, r30 + 3fa: 85 32 cpi r24, 0x25 ; 37 + 3fc: 21 f4 brne .+8 ; 0x406 <__LOCK_REGION_LENGTH__+0x6> + 3fe: b6 01 movw r22, r12 + 400: 90 e0 ldi r25, 0x00 ; 0 + 402: d6 d1 rcall .+940 ; 0x7b0 + 404: e8 cf rjmp .-48 ; 0x3d6 + 406: 91 2c mov r9, r1 + 408: 21 2c mov r2, r1 + 40a: 31 2c mov r3, r1 + 40c: ff e1 ldi r31, 0x1F ; 31 + 40e: f3 15 cp r31, r3 + 410: d8 f0 brcs .+54 ; 0x448 <__LOCK_REGION_LENGTH__+0x48> + 412: 8b 32 cpi r24, 0x2B ; 43 + 414: 79 f0 breq .+30 ; 0x434 <__LOCK_REGION_LENGTH__+0x34> + 416: 38 f4 brcc .+14 ; 0x426 <__LOCK_REGION_LENGTH__+0x26> + 418: 80 32 cpi r24, 0x20 ; 32 + 41a: 79 f0 breq .+30 ; 0x43a <__LOCK_REGION_LENGTH__+0x3a> + 41c: 83 32 cpi r24, 0x23 ; 35 + 41e: a1 f4 brne .+40 ; 0x448 <__LOCK_REGION_LENGTH__+0x48> + 420: 23 2d mov r18, r3 + 422: 20 61 ori r18, 0x10 ; 16 + 424: 1d c0 rjmp .+58 ; 0x460 <__LOCK_REGION_LENGTH__+0x60> + 426: 8d 32 cpi r24, 0x2D ; 45 + 428: 61 f0 breq .+24 ; 0x442 <__LOCK_REGION_LENGTH__+0x42> + 42a: 80 33 cpi r24, 0x30 ; 48 + 42c: 69 f4 brne .+26 ; 0x448 <__LOCK_REGION_LENGTH__+0x48> + 42e: 23 2d mov r18, r3 + 430: 21 60 ori r18, 0x01 ; 1 + 432: 16 c0 rjmp .+44 ; 0x460 <__LOCK_REGION_LENGTH__+0x60> + 434: 83 2d mov r24, r3 + 436: 82 60 ori r24, 0x02 ; 2 + 438: 38 2e mov r3, r24 + 43a: e3 2d mov r30, r3 + 43c: e4 60 ori r30, 0x04 ; 4 + 43e: 3e 2e mov r3, r30 + 440: 2a c0 rjmp .+84 ; 0x496 <__LOCK_REGION_LENGTH__+0x96> + 442: f3 2d mov r31, r3 + 444: f8 60 ori r31, 0x08 ; 8 + 446: 1d c0 rjmp .+58 ; 0x482 <__LOCK_REGION_LENGTH__+0x82> + 448: 37 fc sbrc r3, 7 + 44a: 2d c0 rjmp .+90 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> + 44c: 20 ed ldi r18, 0xD0 ; 208 + 44e: 28 0f add r18, r24 + 450: 2a 30 cpi r18, 0x0A ; 10 + 452: 40 f0 brcs .+16 ; 0x464 <__LOCK_REGION_LENGTH__+0x64> + 454: 8e 32 cpi r24, 0x2E ; 46 + 456: b9 f4 brne .+46 ; 0x486 <__LOCK_REGION_LENGTH__+0x86> + 458: 36 fc sbrc r3, 6 + 45a: 75 c1 rjmp .+746 ; 0x746 <__LOCK_REGION_LENGTH__+0x346> + 45c: 23 2d mov r18, r3 + 45e: 20 64 ori r18, 0x40 ; 64 + 460: 32 2e mov r3, r18 + 462: 19 c0 rjmp .+50 ; 0x496 <__LOCK_REGION_LENGTH__+0x96> + 464: 36 fe sbrs r3, 6 + 466: 06 c0 rjmp .+12 ; 0x474 <__LOCK_REGION_LENGTH__+0x74> + 468: 8a e0 ldi r24, 0x0A ; 10 + 46a: 98 9e mul r9, r24 + 46c: 20 0d add r18, r0 + 46e: 11 24 eor r1, r1 + 470: 92 2e mov r9, r18 + 472: 11 c0 rjmp .+34 ; 0x496 <__LOCK_REGION_LENGTH__+0x96> + 474: ea e0 ldi r30, 0x0A ; 10 + 476: 2e 9e mul r2, r30 478: 20 0d add r18, r0 47a: 11 24 eor r1, r1 - 47c: 92 2e mov r9, r18 - 47e: 11 c0 rjmp .+34 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> - 480: ea e0 ldi r30, 0x0A ; 10 - 482: 2e 9e mul r2, r30 - 484: 20 0d add r18, r0 - 486: 11 24 eor r1, r1 - 488: 22 2e mov r2, r18 - 48a: f3 2d mov r31, r3 - 48c: f0 62 ori r31, 0x20 ; 32 - 48e: 3f 2e mov r3, r31 - 490: 08 c0 rjmp .+16 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> - 492: 8c 36 cpi r24, 0x6C ; 108 - 494: 21 f4 brne .+8 ; 0x49e <__LOCK_REGION_LENGTH__+0x9e> - 496: 83 2d mov r24, r3 - 498: 80 68 ori r24, 0x80 ; 128 - 49a: 38 2e mov r3, r24 - 49c: 02 c0 rjmp .+4 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> - 49e: 88 36 cpi r24, 0x68 ; 104 - 4a0: 41 f4 brne .+16 ; 0x4b2 <__LOCK_REGION_LENGTH__+0xb2> - 4a2: f7 01 movw r30, r14 - 4a4: 93 fd sbrc r25, 3 - 4a6: 85 91 lpm r24, Z+ - 4a8: 93 ff sbrs r25, 3 - 4aa: 81 91 ld r24, Z+ - 4ac: 7f 01 movw r14, r30 - 4ae: 81 11 cpse r24, r1 - 4b0: b3 cf rjmp .-154 ; 0x418 <__LOCK_REGION_LENGTH__+0x18> - 4b2: 98 2f mov r25, r24 - 4b4: 9f 7d andi r25, 0xDF ; 223 - 4b6: 95 54 subi r25, 0x45 ; 69 - 4b8: 93 30 cpi r25, 0x03 ; 3 - 4ba: 28 f4 brcc .+10 ; 0x4c6 <__LOCK_REGION_LENGTH__+0xc6> - 4bc: 0c 5f subi r16, 0xFC ; 252 - 4be: 1f 4f sbci r17, 0xFF ; 255 - 4c0: 9f e3 ldi r25, 0x3F ; 63 - 4c2: 99 83 std Y+1, r25 ; 0x01 - 4c4: 0d c0 rjmp .+26 ; 0x4e0 <__LOCK_REGION_LENGTH__+0xe0> - 4c6: 83 36 cpi r24, 0x63 ; 99 - 4c8: 31 f0 breq .+12 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> - 4ca: 83 37 cpi r24, 0x73 ; 115 - 4cc: 71 f0 breq .+28 ; 0x4ea <__LOCK_REGION_LENGTH__+0xea> - 4ce: 83 35 cpi r24, 0x53 ; 83 - 4d0: 09 f0 breq .+2 ; 0x4d4 <__LOCK_REGION_LENGTH__+0xd4> - 4d2: 55 c0 rjmp .+170 ; 0x57e <__LOCK_REGION_LENGTH__+0x17e> - 4d4: 20 c0 rjmp .+64 ; 0x516 <__LOCK_REGION_LENGTH__+0x116> - 4d6: f8 01 movw r30, r16 - 4d8: 80 81 ld r24, Z - 4da: 89 83 std Y+1, r24 ; 0x01 - 4dc: 0e 5f subi r16, 0xFE ; 254 - 4de: 1f 4f sbci r17, 0xFF ; 255 - 4e0: 88 24 eor r8, r8 - 4e2: 83 94 inc r8 - 4e4: 91 2c mov r9, r1 - 4e6: 53 01 movw r10, r6 - 4e8: 12 c0 rjmp .+36 ; 0x50e <__LOCK_REGION_LENGTH__+0x10e> - 4ea: 28 01 movw r4, r16 - 4ec: f2 e0 ldi r31, 0x02 ; 2 - 4ee: 4f 0e add r4, r31 - 4f0: 51 1c adc r5, r1 - 4f2: f8 01 movw r30, r16 - 4f4: a0 80 ld r10, Z - 4f6: b1 80 ldd r11, Z+1 ; 0x01 - 4f8: 36 fe sbrs r3, 6 - 4fa: 03 c0 rjmp .+6 ; 0x502 <__LOCK_REGION_LENGTH__+0x102> - 4fc: 69 2d mov r22, r9 - 4fe: 70 e0 ldi r23, 0x00 ; 0 - 500: 02 c0 rjmp .+4 ; 0x506 <__LOCK_REGION_LENGTH__+0x106> - 502: 6f ef ldi r22, 0xFF ; 255 - 504: 7f ef ldi r23, 0xFF ; 255 - 506: c5 01 movw r24, r10 - 508: 4e d1 rcall .+668 ; 0x7a6 - 50a: 4c 01 movw r8, r24 - 50c: 82 01 movw r16, r4 - 50e: f3 2d mov r31, r3 - 510: ff 77 andi r31, 0x7F ; 127 - 512: 3f 2e mov r3, r31 - 514: 15 c0 rjmp .+42 ; 0x540 <__LOCK_REGION_LENGTH__+0x140> - 516: 28 01 movw r4, r16 - 518: 22 e0 ldi r18, 0x02 ; 2 - 51a: 42 0e add r4, r18 - 51c: 51 1c adc r5, r1 - 51e: f8 01 movw r30, r16 - 520: a0 80 ld r10, Z - 522: b1 80 ldd r11, Z+1 ; 0x01 - 524: 36 fe sbrs r3, 6 - 526: 03 c0 rjmp .+6 ; 0x52e <__LOCK_REGION_LENGTH__+0x12e> - 528: 69 2d mov r22, r9 - 52a: 70 e0 ldi r23, 0x00 ; 0 - 52c: 02 c0 rjmp .+4 ; 0x532 <__LOCK_REGION_LENGTH__+0x132> - 52e: 6f ef ldi r22, 0xFF ; 255 - 530: 7f ef ldi r23, 0xFF ; 255 - 532: c5 01 movw r24, r10 - 534: 2d d1 rcall .+602 ; 0x790 - 536: 4c 01 movw r8, r24 - 538: f3 2d mov r31, r3 - 53a: f0 68 ori r31, 0x80 ; 128 - 53c: 3f 2e mov r3, r31 - 53e: 82 01 movw r16, r4 - 540: 33 fc sbrc r3, 3 - 542: 19 c0 rjmp .+50 ; 0x576 <__LOCK_REGION_LENGTH__+0x176> - 544: 82 2d mov r24, r2 + 47c: 22 2e mov r2, r18 + 47e: f3 2d mov r31, r3 + 480: f0 62 ori r31, 0x20 ; 32 + 482: 3f 2e mov r3, r31 + 484: 08 c0 rjmp .+16 ; 0x496 <__LOCK_REGION_LENGTH__+0x96> + 486: 8c 36 cpi r24, 0x6C ; 108 + 488: 21 f4 brne .+8 ; 0x492 <__LOCK_REGION_LENGTH__+0x92> + 48a: 83 2d mov r24, r3 + 48c: 80 68 ori r24, 0x80 ; 128 + 48e: 38 2e mov r3, r24 + 490: 02 c0 rjmp .+4 ; 0x496 <__LOCK_REGION_LENGTH__+0x96> + 492: 88 36 cpi r24, 0x68 ; 104 + 494: 41 f4 brne .+16 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> + 496: f7 01 movw r30, r14 + 498: 93 fd sbrc r25, 3 + 49a: 85 91 lpm r24, Z+ + 49c: 93 ff sbrs r25, 3 + 49e: 81 91 ld r24, Z+ + 4a0: 7f 01 movw r14, r30 + 4a2: 81 11 cpse r24, r1 + 4a4: b3 cf rjmp .-154 ; 0x40c <__LOCK_REGION_LENGTH__+0xc> + 4a6: 98 2f mov r25, r24 + 4a8: 9f 7d andi r25, 0xDF ; 223 + 4aa: 95 54 subi r25, 0x45 ; 69 + 4ac: 93 30 cpi r25, 0x03 ; 3 + 4ae: 28 f4 brcc .+10 ; 0x4ba <__LOCK_REGION_LENGTH__+0xba> + 4b0: 0c 5f subi r16, 0xFC ; 252 + 4b2: 1f 4f sbci r17, 0xFF ; 255 + 4b4: 9f e3 ldi r25, 0x3F ; 63 + 4b6: 99 83 std Y+1, r25 ; 0x01 + 4b8: 0d c0 rjmp .+26 ; 0x4d4 <__LOCK_REGION_LENGTH__+0xd4> + 4ba: 83 36 cpi r24, 0x63 ; 99 + 4bc: 31 f0 breq .+12 ; 0x4ca <__LOCK_REGION_LENGTH__+0xca> + 4be: 83 37 cpi r24, 0x73 ; 115 + 4c0: 71 f0 breq .+28 ; 0x4de <__LOCK_REGION_LENGTH__+0xde> + 4c2: 83 35 cpi r24, 0x53 ; 83 + 4c4: 09 f0 breq .+2 ; 0x4c8 <__LOCK_REGION_LENGTH__+0xc8> + 4c6: 55 c0 rjmp .+170 ; 0x572 <__LOCK_REGION_LENGTH__+0x172> + 4c8: 20 c0 rjmp .+64 ; 0x50a <__LOCK_REGION_LENGTH__+0x10a> + 4ca: f8 01 movw r30, r16 + 4cc: 80 81 ld r24, Z + 4ce: 89 83 std Y+1, r24 ; 0x01 + 4d0: 0e 5f subi r16, 0xFE ; 254 + 4d2: 1f 4f sbci r17, 0xFF ; 255 + 4d4: 88 24 eor r8, r8 + 4d6: 83 94 inc r8 + 4d8: 91 2c mov r9, r1 + 4da: 53 01 movw r10, r6 + 4dc: 12 c0 rjmp .+36 ; 0x502 <__LOCK_REGION_LENGTH__+0x102> + 4de: 28 01 movw r4, r16 + 4e0: f2 e0 ldi r31, 0x02 ; 2 + 4e2: 4f 0e add r4, r31 + 4e4: 51 1c adc r5, r1 + 4e6: f8 01 movw r30, r16 + 4e8: a0 80 ld r10, Z + 4ea: b1 80 ldd r11, Z+1 ; 0x01 + 4ec: 36 fe sbrs r3, 6 + 4ee: 03 c0 rjmp .+6 ; 0x4f6 <__LOCK_REGION_LENGTH__+0xf6> + 4f0: 69 2d mov r22, r9 + 4f2: 70 e0 ldi r23, 0x00 ; 0 + 4f4: 02 c0 rjmp .+4 ; 0x4fa <__LOCK_REGION_LENGTH__+0xfa> + 4f6: 6f ef ldi r22, 0xFF ; 255 + 4f8: 7f ef ldi r23, 0xFF ; 255 + 4fa: c5 01 movw r24, r10 + 4fc: 4e d1 rcall .+668 ; 0x79a + 4fe: 4c 01 movw r8, r24 + 500: 82 01 movw r16, r4 + 502: f3 2d mov r31, r3 + 504: ff 77 andi r31, 0x7F ; 127 + 506: 3f 2e mov r3, r31 + 508: 15 c0 rjmp .+42 ; 0x534 <__LOCK_REGION_LENGTH__+0x134> + 50a: 28 01 movw r4, r16 + 50c: 22 e0 ldi r18, 0x02 ; 2 + 50e: 42 0e add r4, r18 + 510: 51 1c adc r5, r1 + 512: f8 01 movw r30, r16 + 514: a0 80 ld r10, Z + 516: b1 80 ldd r11, Z+1 ; 0x01 + 518: 36 fe sbrs r3, 6 + 51a: 03 c0 rjmp .+6 ; 0x522 <__LOCK_REGION_LENGTH__+0x122> + 51c: 69 2d mov r22, r9 + 51e: 70 e0 ldi r23, 0x00 ; 0 + 520: 02 c0 rjmp .+4 ; 0x526 <__LOCK_REGION_LENGTH__+0x126> + 522: 6f ef ldi r22, 0xFF ; 255 + 524: 7f ef ldi r23, 0xFF ; 255 + 526: c5 01 movw r24, r10 + 528: 2d d1 rcall .+602 ; 0x784 + 52a: 4c 01 movw r8, r24 + 52c: f3 2d mov r31, r3 + 52e: f0 68 ori r31, 0x80 ; 128 + 530: 3f 2e mov r3, r31 + 532: 82 01 movw r16, r4 + 534: 33 fc sbrc r3, 3 + 536: 19 c0 rjmp .+50 ; 0x56a <__LOCK_REGION_LENGTH__+0x16a> + 538: 82 2d mov r24, r2 + 53a: 90 e0 ldi r25, 0x00 ; 0 + 53c: 88 16 cp r8, r24 + 53e: 99 06 cpc r9, r25 + 540: a0 f4 brcc .+40 ; 0x56a <__LOCK_REGION_LENGTH__+0x16a> + 542: b6 01 movw r22, r12 + 544: 80 e2 ldi r24, 0x20 ; 32 546: 90 e0 ldi r25, 0x00 ; 0 - 548: 88 16 cp r8, r24 - 54a: 99 06 cpc r9, r25 - 54c: a0 f4 brcc .+40 ; 0x576 <__LOCK_REGION_LENGTH__+0x176> - 54e: b6 01 movw r22, r12 - 550: 80 e2 ldi r24, 0x20 ; 32 - 552: 90 e0 ldi r25, 0x00 ; 0 - 554: 33 d1 rcall .+614 ; 0x7bc - 556: 2a 94 dec r2 - 558: f5 cf rjmp .-22 ; 0x544 <__LOCK_REGION_LENGTH__+0x144> - 55a: f5 01 movw r30, r10 - 55c: 37 fc sbrc r3, 7 - 55e: 85 91 lpm r24, Z+ - 560: 37 fe sbrs r3, 7 - 562: 81 91 ld r24, Z+ - 564: 5f 01 movw r10, r30 - 566: b6 01 movw r22, r12 - 568: 90 e0 ldi r25, 0x00 ; 0 - 56a: 28 d1 rcall .+592 ; 0x7bc - 56c: 21 10 cpse r2, r1 - 56e: 2a 94 dec r2 - 570: 21 e0 ldi r18, 0x01 ; 1 - 572: 82 1a sub r8, r18 - 574: 91 08 sbc r9, r1 - 576: 81 14 cp r8, r1 - 578: 91 04 cpc r9, r1 - 57a: 79 f7 brne .-34 ; 0x55a <__LOCK_REGION_LENGTH__+0x15a> - 57c: e1 c0 rjmp .+450 ; 0x740 <__LOCK_REGION_LENGTH__+0x340> - 57e: 84 36 cpi r24, 0x64 ; 100 - 580: 11 f0 breq .+4 ; 0x586 <__LOCK_REGION_LENGTH__+0x186> - 582: 89 36 cpi r24, 0x69 ; 105 - 584: 39 f5 brne .+78 ; 0x5d4 <__LOCK_REGION_LENGTH__+0x1d4> - 586: f8 01 movw r30, r16 - 588: 37 fe sbrs r3, 7 - 58a: 07 c0 rjmp .+14 ; 0x59a <__LOCK_REGION_LENGTH__+0x19a> - 58c: 60 81 ld r22, Z - 58e: 71 81 ldd r23, Z+1 ; 0x01 - 590: 82 81 ldd r24, Z+2 ; 0x02 - 592: 93 81 ldd r25, Z+3 ; 0x03 - 594: 0c 5f subi r16, 0xFC ; 252 - 596: 1f 4f sbci r17, 0xFF ; 255 - 598: 08 c0 rjmp .+16 ; 0x5aa <__LOCK_REGION_LENGTH__+0x1aa> - 59a: 60 81 ld r22, Z - 59c: 71 81 ldd r23, Z+1 ; 0x01 - 59e: 07 2e mov r0, r23 - 5a0: 00 0c add r0, r0 - 5a2: 88 0b sbc r24, r24 - 5a4: 99 0b sbc r25, r25 - 5a6: 0e 5f subi r16, 0xFE ; 254 - 5a8: 1f 4f sbci r17, 0xFF ; 255 - 5aa: f3 2d mov r31, r3 - 5ac: ff 76 andi r31, 0x6F ; 111 - 5ae: 3f 2e mov r3, r31 - 5b0: 97 ff sbrs r25, 7 - 5b2: 09 c0 rjmp .+18 ; 0x5c6 <__LOCK_REGION_LENGTH__+0x1c6> - 5b4: 90 95 com r25 - 5b6: 80 95 com r24 - 5b8: 70 95 com r23 - 5ba: 61 95 neg r22 - 5bc: 7f 4f sbci r23, 0xFF ; 255 - 5be: 8f 4f sbci r24, 0xFF ; 255 - 5c0: 9f 4f sbci r25, 0xFF ; 255 - 5c2: f0 68 ori r31, 0x80 ; 128 - 5c4: 3f 2e mov r3, r31 - 5c6: 2a e0 ldi r18, 0x0A ; 10 - 5c8: 30 e0 ldi r19, 0x00 ; 0 - 5ca: a3 01 movw r20, r6 - 5cc: 33 d1 rcall .+614 ; 0x834 <__ultoa_invert> - 5ce: 88 2e mov r8, r24 - 5d0: 86 18 sub r8, r6 - 5d2: 44 c0 rjmp .+136 ; 0x65c <__LOCK_REGION_LENGTH__+0x25c> - 5d4: 85 37 cpi r24, 0x75 ; 117 - 5d6: 31 f4 brne .+12 ; 0x5e4 <__LOCK_REGION_LENGTH__+0x1e4> - 5d8: 23 2d mov r18, r3 - 5da: 2f 7e andi r18, 0xEF ; 239 - 5dc: b2 2e mov r11, r18 - 5de: 2a e0 ldi r18, 0x0A ; 10 - 5e0: 30 e0 ldi r19, 0x00 ; 0 - 5e2: 25 c0 rjmp .+74 ; 0x62e <__LOCK_REGION_LENGTH__+0x22e> - 5e4: 93 2d mov r25, r3 - 5e6: 99 7f andi r25, 0xF9 ; 249 - 5e8: b9 2e mov r11, r25 - 5ea: 8f 36 cpi r24, 0x6F ; 111 - 5ec: c1 f0 breq .+48 ; 0x61e <__LOCK_REGION_LENGTH__+0x21e> - 5ee: 18 f4 brcc .+6 ; 0x5f6 <__LOCK_REGION_LENGTH__+0x1f6> - 5f0: 88 35 cpi r24, 0x58 ; 88 - 5f2: 79 f0 breq .+30 ; 0x612 <__LOCK_REGION_LENGTH__+0x212> - 5f4: ae c0 rjmp .+348 ; 0x752 <__LOCK_REGION_LENGTH__+0x352> - 5f6: 80 37 cpi r24, 0x70 ; 112 - 5f8: 19 f0 breq .+6 ; 0x600 <__LOCK_REGION_LENGTH__+0x200> - 5fa: 88 37 cpi r24, 0x78 ; 120 - 5fc: 21 f0 breq .+8 ; 0x606 <__LOCK_REGION_LENGTH__+0x206> - 5fe: a9 c0 rjmp .+338 ; 0x752 <__LOCK_REGION_LENGTH__+0x352> - 600: e9 2f mov r30, r25 - 602: e0 61 ori r30, 0x10 ; 16 - 604: be 2e mov r11, r30 - 606: b4 fe sbrs r11, 4 - 608: 0d c0 rjmp .+26 ; 0x624 <__LOCK_REGION_LENGTH__+0x224> - 60a: fb 2d mov r31, r11 - 60c: f4 60 ori r31, 0x04 ; 4 - 60e: bf 2e mov r11, r31 - 610: 09 c0 rjmp .+18 ; 0x624 <__LOCK_REGION_LENGTH__+0x224> - 612: 34 fe sbrs r3, 4 - 614: 0a c0 rjmp .+20 ; 0x62a <__LOCK_REGION_LENGTH__+0x22a> - 616: 29 2f mov r18, r25 - 618: 26 60 ori r18, 0x06 ; 6 - 61a: b2 2e mov r11, r18 - 61c: 06 c0 rjmp .+12 ; 0x62a <__LOCK_REGION_LENGTH__+0x22a> - 61e: 28 e0 ldi r18, 0x08 ; 8 - 620: 30 e0 ldi r19, 0x00 ; 0 - 622: 05 c0 rjmp .+10 ; 0x62e <__LOCK_REGION_LENGTH__+0x22e> - 624: 20 e1 ldi r18, 0x10 ; 16 - 626: 30 e0 ldi r19, 0x00 ; 0 - 628: 02 c0 rjmp .+4 ; 0x62e <__LOCK_REGION_LENGTH__+0x22e> - 62a: 20 e1 ldi r18, 0x10 ; 16 - 62c: 32 e0 ldi r19, 0x02 ; 2 - 62e: f8 01 movw r30, r16 - 630: b7 fe sbrs r11, 7 - 632: 07 c0 rjmp .+14 ; 0x642 <__LOCK_REGION_LENGTH__+0x242> - 634: 60 81 ld r22, Z - 636: 71 81 ldd r23, Z+1 ; 0x01 - 638: 82 81 ldd r24, Z+2 ; 0x02 - 63a: 93 81 ldd r25, Z+3 ; 0x03 - 63c: 0c 5f subi r16, 0xFC ; 252 - 63e: 1f 4f sbci r17, 0xFF ; 255 - 640: 06 c0 rjmp .+12 ; 0x64e <__LOCK_REGION_LENGTH__+0x24e> - 642: 60 81 ld r22, Z - 644: 71 81 ldd r23, Z+1 ; 0x01 - 646: 80 e0 ldi r24, 0x00 ; 0 - 648: 90 e0 ldi r25, 0x00 ; 0 - 64a: 0e 5f subi r16, 0xFE ; 254 - 64c: 1f 4f sbci r17, 0xFF ; 255 - 64e: a3 01 movw r20, r6 - 650: f1 d0 rcall .+482 ; 0x834 <__ultoa_invert> - 652: 88 2e mov r8, r24 - 654: 86 18 sub r8, r6 - 656: fb 2d mov r31, r11 - 658: ff 77 andi r31, 0x7F ; 127 - 65a: 3f 2e mov r3, r31 - 65c: 36 fe sbrs r3, 6 - 65e: 0d c0 rjmp .+26 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> - 660: 23 2d mov r18, r3 - 662: 2e 7f andi r18, 0xFE ; 254 - 664: a2 2e mov r10, r18 - 666: 89 14 cp r8, r9 - 668: 58 f4 brcc .+22 ; 0x680 <__LOCK_REGION_LENGTH__+0x280> - 66a: 34 fe sbrs r3, 4 - 66c: 0b c0 rjmp .+22 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> - 66e: 32 fc sbrc r3, 2 - 670: 09 c0 rjmp .+18 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> - 672: 83 2d mov r24, r3 - 674: 8e 7e andi r24, 0xEE ; 238 - 676: a8 2e mov r10, r24 - 678: 05 c0 rjmp .+10 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> - 67a: b8 2c mov r11, r8 - 67c: a3 2c mov r10, r3 - 67e: 03 c0 rjmp .+6 ; 0x686 <__LOCK_REGION_LENGTH__+0x286> - 680: b8 2c mov r11, r8 - 682: 01 c0 rjmp .+2 ; 0x686 <__LOCK_REGION_LENGTH__+0x286> - 684: b9 2c mov r11, r9 - 686: a4 fe sbrs r10, 4 - 688: 0f c0 rjmp .+30 ; 0x6a8 <__LOCK_REGION_LENGTH__+0x2a8> - 68a: fe 01 movw r30, r28 - 68c: e8 0d add r30, r8 - 68e: f1 1d adc r31, r1 - 690: 80 81 ld r24, Z - 692: 80 33 cpi r24, 0x30 ; 48 - 694: 21 f4 brne .+8 ; 0x69e <__LOCK_REGION_LENGTH__+0x29e> - 696: 9a 2d mov r25, r10 - 698: 99 7e andi r25, 0xE9 ; 233 - 69a: a9 2e mov r10, r25 - 69c: 09 c0 rjmp .+18 ; 0x6b0 <__LOCK_REGION_LENGTH__+0x2b0> - 69e: a2 fe sbrs r10, 2 - 6a0: 06 c0 rjmp .+12 ; 0x6ae <__LOCK_REGION_LENGTH__+0x2ae> + 548: 33 d1 rcall .+614 ; 0x7b0 + 54a: 2a 94 dec r2 + 54c: f5 cf rjmp .-22 ; 0x538 <__LOCK_REGION_LENGTH__+0x138> + 54e: f5 01 movw r30, r10 + 550: 37 fc sbrc r3, 7 + 552: 85 91 lpm r24, Z+ + 554: 37 fe sbrs r3, 7 + 556: 81 91 ld r24, Z+ + 558: 5f 01 movw r10, r30 + 55a: b6 01 movw r22, r12 + 55c: 90 e0 ldi r25, 0x00 ; 0 + 55e: 28 d1 rcall .+592 ; 0x7b0 + 560: 21 10 cpse r2, r1 + 562: 2a 94 dec r2 + 564: 21 e0 ldi r18, 0x01 ; 1 + 566: 82 1a sub r8, r18 + 568: 91 08 sbc r9, r1 + 56a: 81 14 cp r8, r1 + 56c: 91 04 cpc r9, r1 + 56e: 79 f7 brne .-34 ; 0x54e <__LOCK_REGION_LENGTH__+0x14e> + 570: e1 c0 rjmp .+450 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 572: 84 36 cpi r24, 0x64 ; 100 + 574: 11 f0 breq .+4 ; 0x57a <__LOCK_REGION_LENGTH__+0x17a> + 576: 89 36 cpi r24, 0x69 ; 105 + 578: 39 f5 brne .+78 ; 0x5c8 <__LOCK_REGION_LENGTH__+0x1c8> + 57a: f8 01 movw r30, r16 + 57c: 37 fe sbrs r3, 7 + 57e: 07 c0 rjmp .+14 ; 0x58e <__LOCK_REGION_LENGTH__+0x18e> + 580: 60 81 ld r22, Z + 582: 71 81 ldd r23, Z+1 ; 0x01 + 584: 82 81 ldd r24, Z+2 ; 0x02 + 586: 93 81 ldd r25, Z+3 ; 0x03 + 588: 0c 5f subi r16, 0xFC ; 252 + 58a: 1f 4f sbci r17, 0xFF ; 255 + 58c: 08 c0 rjmp .+16 ; 0x59e <__LOCK_REGION_LENGTH__+0x19e> + 58e: 60 81 ld r22, Z + 590: 71 81 ldd r23, Z+1 ; 0x01 + 592: 07 2e mov r0, r23 + 594: 00 0c add r0, r0 + 596: 88 0b sbc r24, r24 + 598: 99 0b sbc r25, r25 + 59a: 0e 5f subi r16, 0xFE ; 254 + 59c: 1f 4f sbci r17, 0xFF ; 255 + 59e: f3 2d mov r31, r3 + 5a0: ff 76 andi r31, 0x6F ; 111 + 5a2: 3f 2e mov r3, r31 + 5a4: 97 ff sbrs r25, 7 + 5a6: 09 c0 rjmp .+18 ; 0x5ba <__LOCK_REGION_LENGTH__+0x1ba> + 5a8: 90 95 com r25 + 5aa: 80 95 com r24 + 5ac: 70 95 com r23 + 5ae: 61 95 neg r22 + 5b0: 7f 4f sbci r23, 0xFF ; 255 + 5b2: 8f 4f sbci r24, 0xFF ; 255 + 5b4: 9f 4f sbci r25, 0xFF ; 255 + 5b6: f0 68 ori r31, 0x80 ; 128 + 5b8: 3f 2e mov r3, r31 + 5ba: 2a e0 ldi r18, 0x0A ; 10 + 5bc: 30 e0 ldi r19, 0x00 ; 0 + 5be: a3 01 movw r20, r6 + 5c0: 33 d1 rcall .+614 ; 0x828 <__ultoa_invert> + 5c2: 88 2e mov r8, r24 + 5c4: 86 18 sub r8, r6 + 5c6: 44 c0 rjmp .+136 ; 0x650 <__LOCK_REGION_LENGTH__+0x250> + 5c8: 85 37 cpi r24, 0x75 ; 117 + 5ca: 31 f4 brne .+12 ; 0x5d8 <__LOCK_REGION_LENGTH__+0x1d8> + 5cc: 23 2d mov r18, r3 + 5ce: 2f 7e andi r18, 0xEF ; 239 + 5d0: b2 2e mov r11, r18 + 5d2: 2a e0 ldi r18, 0x0A ; 10 + 5d4: 30 e0 ldi r19, 0x00 ; 0 + 5d6: 25 c0 rjmp .+74 ; 0x622 <__LOCK_REGION_LENGTH__+0x222> + 5d8: 93 2d mov r25, r3 + 5da: 99 7f andi r25, 0xF9 ; 249 + 5dc: b9 2e mov r11, r25 + 5de: 8f 36 cpi r24, 0x6F ; 111 + 5e0: c1 f0 breq .+48 ; 0x612 <__LOCK_REGION_LENGTH__+0x212> + 5e2: 18 f4 brcc .+6 ; 0x5ea <__LOCK_REGION_LENGTH__+0x1ea> + 5e4: 88 35 cpi r24, 0x58 ; 88 + 5e6: 79 f0 breq .+30 ; 0x606 <__LOCK_REGION_LENGTH__+0x206> + 5e8: ae c0 rjmp .+348 ; 0x746 <__LOCK_REGION_LENGTH__+0x346> + 5ea: 80 37 cpi r24, 0x70 ; 112 + 5ec: 19 f0 breq .+6 ; 0x5f4 <__LOCK_REGION_LENGTH__+0x1f4> + 5ee: 88 37 cpi r24, 0x78 ; 120 + 5f0: 21 f0 breq .+8 ; 0x5fa <__LOCK_REGION_LENGTH__+0x1fa> + 5f2: a9 c0 rjmp .+338 ; 0x746 <__LOCK_REGION_LENGTH__+0x346> + 5f4: e9 2f mov r30, r25 + 5f6: e0 61 ori r30, 0x10 ; 16 + 5f8: be 2e mov r11, r30 + 5fa: b4 fe sbrs r11, 4 + 5fc: 0d c0 rjmp .+26 ; 0x618 <__LOCK_REGION_LENGTH__+0x218> + 5fe: fb 2d mov r31, r11 + 600: f4 60 ori r31, 0x04 ; 4 + 602: bf 2e mov r11, r31 + 604: 09 c0 rjmp .+18 ; 0x618 <__LOCK_REGION_LENGTH__+0x218> + 606: 34 fe sbrs r3, 4 + 608: 0a c0 rjmp .+20 ; 0x61e <__LOCK_REGION_LENGTH__+0x21e> + 60a: 29 2f mov r18, r25 + 60c: 26 60 ori r18, 0x06 ; 6 + 60e: b2 2e mov r11, r18 + 610: 06 c0 rjmp .+12 ; 0x61e <__LOCK_REGION_LENGTH__+0x21e> + 612: 28 e0 ldi r18, 0x08 ; 8 + 614: 30 e0 ldi r19, 0x00 ; 0 + 616: 05 c0 rjmp .+10 ; 0x622 <__LOCK_REGION_LENGTH__+0x222> + 618: 20 e1 ldi r18, 0x10 ; 16 + 61a: 30 e0 ldi r19, 0x00 ; 0 + 61c: 02 c0 rjmp .+4 ; 0x622 <__LOCK_REGION_LENGTH__+0x222> + 61e: 20 e1 ldi r18, 0x10 ; 16 + 620: 32 e0 ldi r19, 0x02 ; 2 + 622: f8 01 movw r30, r16 + 624: b7 fe sbrs r11, 7 + 626: 07 c0 rjmp .+14 ; 0x636 <__LOCK_REGION_LENGTH__+0x236> + 628: 60 81 ld r22, Z + 62a: 71 81 ldd r23, Z+1 ; 0x01 + 62c: 82 81 ldd r24, Z+2 ; 0x02 + 62e: 93 81 ldd r25, Z+3 ; 0x03 + 630: 0c 5f subi r16, 0xFC ; 252 + 632: 1f 4f sbci r17, 0xFF ; 255 + 634: 06 c0 rjmp .+12 ; 0x642 <__LOCK_REGION_LENGTH__+0x242> + 636: 60 81 ld r22, Z + 638: 71 81 ldd r23, Z+1 ; 0x01 + 63a: 80 e0 ldi r24, 0x00 ; 0 + 63c: 90 e0 ldi r25, 0x00 ; 0 + 63e: 0e 5f subi r16, 0xFE ; 254 + 640: 1f 4f sbci r17, 0xFF ; 255 + 642: a3 01 movw r20, r6 + 644: f1 d0 rcall .+482 ; 0x828 <__ultoa_invert> + 646: 88 2e mov r8, r24 + 648: 86 18 sub r8, r6 + 64a: fb 2d mov r31, r11 + 64c: ff 77 andi r31, 0x7F ; 127 + 64e: 3f 2e mov r3, r31 + 650: 36 fe sbrs r3, 6 + 652: 0d c0 rjmp .+26 ; 0x66e <__LOCK_REGION_LENGTH__+0x26e> + 654: 23 2d mov r18, r3 + 656: 2e 7f andi r18, 0xFE ; 254 + 658: a2 2e mov r10, r18 + 65a: 89 14 cp r8, r9 + 65c: 58 f4 brcc .+22 ; 0x674 <__LOCK_REGION_LENGTH__+0x274> + 65e: 34 fe sbrs r3, 4 + 660: 0b c0 rjmp .+22 ; 0x678 <__LOCK_REGION_LENGTH__+0x278> + 662: 32 fc sbrc r3, 2 + 664: 09 c0 rjmp .+18 ; 0x678 <__LOCK_REGION_LENGTH__+0x278> + 666: 83 2d mov r24, r3 + 668: 8e 7e andi r24, 0xEE ; 238 + 66a: a8 2e mov r10, r24 + 66c: 05 c0 rjmp .+10 ; 0x678 <__LOCK_REGION_LENGTH__+0x278> + 66e: b8 2c mov r11, r8 + 670: a3 2c mov r10, r3 + 672: 03 c0 rjmp .+6 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> + 674: b8 2c mov r11, r8 + 676: 01 c0 rjmp .+2 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> + 678: b9 2c mov r11, r9 + 67a: a4 fe sbrs r10, 4 + 67c: 0f c0 rjmp .+30 ; 0x69c <__LOCK_REGION_LENGTH__+0x29c> + 67e: fe 01 movw r30, r28 + 680: e8 0d add r30, r8 + 682: f1 1d adc r31, r1 + 684: 80 81 ld r24, Z + 686: 80 33 cpi r24, 0x30 ; 48 + 688: 21 f4 brne .+8 ; 0x692 <__LOCK_REGION_LENGTH__+0x292> + 68a: 9a 2d mov r25, r10 + 68c: 99 7e andi r25, 0xE9 ; 233 + 68e: a9 2e mov r10, r25 + 690: 09 c0 rjmp .+18 ; 0x6a4 <__LOCK_REGION_LENGTH__+0x2a4> + 692: a2 fe sbrs r10, 2 + 694: 06 c0 rjmp .+12 ; 0x6a2 <__LOCK_REGION_LENGTH__+0x2a2> + 696: b3 94 inc r11 + 698: b3 94 inc r11 + 69a: 04 c0 rjmp .+8 ; 0x6a4 <__LOCK_REGION_LENGTH__+0x2a4> + 69c: 8a 2d mov r24, r10 + 69e: 86 78 andi r24, 0x86 ; 134 + 6a0: 09 f0 breq .+2 ; 0x6a4 <__LOCK_REGION_LENGTH__+0x2a4> 6a2: b3 94 inc r11 - 6a4: b3 94 inc r11 - 6a6: 04 c0 rjmp .+8 ; 0x6b0 <__LOCK_REGION_LENGTH__+0x2b0> - 6a8: 8a 2d mov r24, r10 - 6aa: 86 78 andi r24, 0x86 ; 134 - 6ac: 09 f0 breq .+2 ; 0x6b0 <__LOCK_REGION_LENGTH__+0x2b0> - 6ae: b3 94 inc r11 - 6b0: a3 fc sbrc r10, 3 - 6b2: 10 c0 rjmp .+32 ; 0x6d4 <__LOCK_REGION_LENGTH__+0x2d4> - 6b4: a0 fe sbrs r10, 0 - 6b6: 06 c0 rjmp .+12 ; 0x6c4 <__LOCK_REGION_LENGTH__+0x2c4> + 6a4: a3 fc sbrc r10, 3 + 6a6: 10 c0 rjmp .+32 ; 0x6c8 <__LOCK_REGION_LENGTH__+0x2c8> + 6a8: a0 fe sbrs r10, 0 + 6aa: 06 c0 rjmp .+12 ; 0x6b8 <__LOCK_REGION_LENGTH__+0x2b8> + 6ac: b2 14 cp r11, r2 + 6ae: 80 f4 brcc .+32 ; 0x6d0 <__LOCK_REGION_LENGTH__+0x2d0> + 6b0: 28 0c add r2, r8 + 6b2: 92 2c mov r9, r2 + 6b4: 9b 18 sub r9, r11 + 6b6: 0d c0 rjmp .+26 ; 0x6d2 <__LOCK_REGION_LENGTH__+0x2d2> 6b8: b2 14 cp r11, r2 - 6ba: 80 f4 brcc .+32 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> - 6bc: 28 0c add r2, r8 - 6be: 92 2c mov r9, r2 - 6c0: 9b 18 sub r9, r11 - 6c2: 0d c0 rjmp .+26 ; 0x6de <__LOCK_REGION_LENGTH__+0x2de> - 6c4: b2 14 cp r11, r2 - 6c6: 58 f4 brcc .+22 ; 0x6de <__LOCK_REGION_LENGTH__+0x2de> - 6c8: b6 01 movw r22, r12 - 6ca: 80 e2 ldi r24, 0x20 ; 32 - 6cc: 90 e0 ldi r25, 0x00 ; 0 - 6ce: 76 d0 rcall .+236 ; 0x7bc - 6d0: b3 94 inc r11 - 6d2: f8 cf rjmp .-16 ; 0x6c4 <__LOCK_REGION_LENGTH__+0x2c4> - 6d4: b2 14 cp r11, r2 - 6d6: 18 f4 brcc .+6 ; 0x6de <__LOCK_REGION_LENGTH__+0x2de> - 6d8: 2b 18 sub r2, r11 - 6da: 02 c0 rjmp .+4 ; 0x6e0 <__LOCK_REGION_LENGTH__+0x2e0> - 6dc: 98 2c mov r9, r8 - 6de: 21 2c mov r2, r1 - 6e0: a4 fe sbrs r10, 4 - 6e2: 0f c0 rjmp .+30 ; 0x702 <__LOCK_REGION_LENGTH__+0x302> - 6e4: b6 01 movw r22, r12 - 6e6: 80 e3 ldi r24, 0x30 ; 48 - 6e8: 90 e0 ldi r25, 0x00 ; 0 - 6ea: 68 d0 rcall .+208 ; 0x7bc - 6ec: a2 fe sbrs r10, 2 - 6ee: 16 c0 rjmp .+44 ; 0x71c <__LOCK_REGION_LENGTH__+0x31c> - 6f0: a1 fc sbrc r10, 1 - 6f2: 03 c0 rjmp .+6 ; 0x6fa <__LOCK_REGION_LENGTH__+0x2fa> - 6f4: 88 e7 ldi r24, 0x78 ; 120 - 6f6: 90 e0 ldi r25, 0x00 ; 0 - 6f8: 02 c0 rjmp .+4 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> - 6fa: 88 e5 ldi r24, 0x58 ; 88 - 6fc: 90 e0 ldi r25, 0x00 ; 0 - 6fe: b6 01 movw r22, r12 - 700: 0c c0 rjmp .+24 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> - 702: 8a 2d mov r24, r10 - 704: 86 78 andi r24, 0x86 ; 134 - 706: 51 f0 breq .+20 ; 0x71c <__LOCK_REGION_LENGTH__+0x31c> - 708: a1 fe sbrs r10, 1 - 70a: 02 c0 rjmp .+4 ; 0x710 <__LOCK_REGION_LENGTH__+0x310> - 70c: 8b e2 ldi r24, 0x2B ; 43 - 70e: 01 c0 rjmp .+2 ; 0x712 <__LOCK_REGION_LENGTH__+0x312> - 710: 80 e2 ldi r24, 0x20 ; 32 - 712: a7 fc sbrc r10, 7 - 714: 8d e2 ldi r24, 0x2D ; 45 - 716: b6 01 movw r22, r12 + 6ba: 58 f4 brcc .+22 ; 0x6d2 <__LOCK_REGION_LENGTH__+0x2d2> + 6bc: b6 01 movw r22, r12 + 6be: 80 e2 ldi r24, 0x20 ; 32 + 6c0: 90 e0 ldi r25, 0x00 ; 0 + 6c2: 76 d0 rcall .+236 ; 0x7b0 + 6c4: b3 94 inc r11 + 6c6: f8 cf rjmp .-16 ; 0x6b8 <__LOCK_REGION_LENGTH__+0x2b8> + 6c8: b2 14 cp r11, r2 + 6ca: 18 f4 brcc .+6 ; 0x6d2 <__LOCK_REGION_LENGTH__+0x2d2> + 6cc: 2b 18 sub r2, r11 + 6ce: 02 c0 rjmp .+4 ; 0x6d4 <__LOCK_REGION_LENGTH__+0x2d4> + 6d0: 98 2c mov r9, r8 + 6d2: 21 2c mov r2, r1 + 6d4: a4 fe sbrs r10, 4 + 6d6: 0f c0 rjmp .+30 ; 0x6f6 <__LOCK_REGION_LENGTH__+0x2f6> + 6d8: b6 01 movw r22, r12 + 6da: 80 e3 ldi r24, 0x30 ; 48 + 6dc: 90 e0 ldi r25, 0x00 ; 0 + 6de: 68 d0 rcall .+208 ; 0x7b0 + 6e0: a2 fe sbrs r10, 2 + 6e2: 16 c0 rjmp .+44 ; 0x710 <__LOCK_REGION_LENGTH__+0x310> + 6e4: a1 fc sbrc r10, 1 + 6e6: 03 c0 rjmp .+6 ; 0x6ee <__LOCK_REGION_LENGTH__+0x2ee> + 6e8: 88 e7 ldi r24, 0x78 ; 120 + 6ea: 90 e0 ldi r25, 0x00 ; 0 + 6ec: 02 c0 rjmp .+4 ; 0x6f2 <__LOCK_REGION_LENGTH__+0x2f2> + 6ee: 88 e5 ldi r24, 0x58 ; 88 + 6f0: 90 e0 ldi r25, 0x00 ; 0 + 6f2: b6 01 movw r22, r12 + 6f4: 0c c0 rjmp .+24 ; 0x70e <__LOCK_REGION_LENGTH__+0x30e> + 6f6: 8a 2d mov r24, r10 + 6f8: 86 78 andi r24, 0x86 ; 134 + 6fa: 51 f0 breq .+20 ; 0x710 <__LOCK_REGION_LENGTH__+0x310> + 6fc: a1 fe sbrs r10, 1 + 6fe: 02 c0 rjmp .+4 ; 0x704 <__LOCK_REGION_LENGTH__+0x304> + 700: 8b e2 ldi r24, 0x2B ; 43 + 702: 01 c0 rjmp .+2 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> + 704: 80 e2 ldi r24, 0x20 ; 32 + 706: a7 fc sbrc r10, 7 + 708: 8d e2 ldi r24, 0x2D ; 45 + 70a: b6 01 movw r22, r12 + 70c: 90 e0 ldi r25, 0x00 ; 0 + 70e: 50 d0 rcall .+160 ; 0x7b0 + 710: 89 14 cp r8, r9 + 712: 30 f4 brcc .+12 ; 0x720 <__LOCK_REGION_LENGTH__+0x320> + 714: b6 01 movw r22, r12 + 716: 80 e3 ldi r24, 0x30 ; 48 718: 90 e0 ldi r25, 0x00 ; 0 - 71a: 50 d0 rcall .+160 ; 0x7bc - 71c: 89 14 cp r8, r9 - 71e: 30 f4 brcc .+12 ; 0x72c <__LOCK_REGION_LENGTH__+0x32c> - 720: b6 01 movw r22, r12 - 722: 80 e3 ldi r24, 0x30 ; 48 - 724: 90 e0 ldi r25, 0x00 ; 0 - 726: 4a d0 rcall .+148 ; 0x7bc - 728: 9a 94 dec r9 - 72a: f8 cf rjmp .-16 ; 0x71c <__LOCK_REGION_LENGTH__+0x31c> - 72c: 8a 94 dec r8 - 72e: f3 01 movw r30, r6 - 730: e8 0d add r30, r8 - 732: f1 1d adc r31, r1 - 734: 80 81 ld r24, Z - 736: b6 01 movw r22, r12 - 738: 90 e0 ldi r25, 0x00 ; 0 - 73a: 40 d0 rcall .+128 ; 0x7bc - 73c: 81 10 cpse r8, r1 - 73e: f6 cf rjmp .-20 ; 0x72c <__LOCK_REGION_LENGTH__+0x32c> - 740: 22 20 and r2, r2 - 742: 09 f4 brne .+2 ; 0x746 <__LOCK_REGION_LENGTH__+0x346> - 744: 4e ce rjmp .-868 ; 0x3e2 - 746: b6 01 movw r22, r12 - 748: 80 e2 ldi r24, 0x20 ; 32 - 74a: 90 e0 ldi r25, 0x00 ; 0 - 74c: 37 d0 rcall .+110 ; 0x7bc - 74e: 2a 94 dec r2 - 750: f7 cf rjmp .-18 ; 0x740 <__LOCK_REGION_LENGTH__+0x340> - 752: f6 01 movw r30, r12 - 754: 86 81 ldd r24, Z+6 ; 0x06 - 756: 97 81 ldd r25, Z+7 ; 0x07 - 758: 02 c0 rjmp .+4 ; 0x75e <__LOCK_REGION_LENGTH__+0x35e> - 75a: 8f ef ldi r24, 0xFF ; 255 - 75c: 9f ef ldi r25, 0xFF ; 255 - 75e: 2b 96 adiw r28, 0x0b ; 11 - 760: 0f b6 in r0, 0x3f ; 63 - 762: f8 94 cli - 764: de bf out 0x3e, r29 ; 62 - 766: 0f be out 0x3f, r0 ; 63 - 768: cd bf out 0x3d, r28 ; 61 - 76a: df 91 pop r29 - 76c: cf 91 pop r28 - 76e: 1f 91 pop r17 - 770: 0f 91 pop r16 - 772: ff 90 pop r15 - 774: ef 90 pop r14 - 776: df 90 pop r13 - 778: cf 90 pop r12 - 77a: bf 90 pop r11 - 77c: af 90 pop r10 - 77e: 9f 90 pop r9 - 780: 8f 90 pop r8 - 782: 7f 90 pop r7 - 784: 6f 90 pop r6 - 786: 5f 90 pop r5 - 788: 4f 90 pop r4 - 78a: 3f 90 pop r3 - 78c: 2f 90 pop r2 - 78e: 08 95 ret + 71a: 4a d0 rcall .+148 ; 0x7b0 + 71c: 9a 94 dec r9 + 71e: f8 cf rjmp .-16 ; 0x710 <__LOCK_REGION_LENGTH__+0x310> + 720: 8a 94 dec r8 + 722: f3 01 movw r30, r6 + 724: e8 0d add r30, r8 + 726: f1 1d adc r31, r1 + 728: 80 81 ld r24, Z + 72a: b6 01 movw r22, r12 + 72c: 90 e0 ldi r25, 0x00 ; 0 + 72e: 40 d0 rcall .+128 ; 0x7b0 + 730: 81 10 cpse r8, r1 + 732: f6 cf rjmp .-20 ; 0x720 <__LOCK_REGION_LENGTH__+0x320> + 734: 22 20 and r2, r2 + 736: 09 f4 brne .+2 ; 0x73a <__LOCK_REGION_LENGTH__+0x33a> + 738: 4e ce rjmp .-868 ; 0x3d6 + 73a: b6 01 movw r22, r12 + 73c: 80 e2 ldi r24, 0x20 ; 32 + 73e: 90 e0 ldi r25, 0x00 ; 0 + 740: 37 d0 rcall .+110 ; 0x7b0 + 742: 2a 94 dec r2 + 744: f7 cf rjmp .-18 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 746: f6 01 movw r30, r12 + 748: 86 81 ldd r24, Z+6 ; 0x06 + 74a: 97 81 ldd r25, Z+7 ; 0x07 + 74c: 02 c0 rjmp .+4 ; 0x752 <__LOCK_REGION_LENGTH__+0x352> + 74e: 8f ef ldi r24, 0xFF ; 255 + 750: 9f ef ldi r25, 0xFF ; 255 + 752: 2b 96 adiw r28, 0x0b ; 11 + 754: 0f b6 in r0, 0x3f ; 63 + 756: f8 94 cli + 758: de bf out 0x3e, r29 ; 62 + 75a: 0f be out 0x3f, r0 ; 63 + 75c: cd bf out 0x3d, r28 ; 61 + 75e: df 91 pop r29 + 760: cf 91 pop r28 + 762: 1f 91 pop r17 + 764: 0f 91 pop r16 + 766: ff 90 pop r15 + 768: ef 90 pop r14 + 76a: df 90 pop r13 + 76c: cf 90 pop r12 + 76e: bf 90 pop r11 + 770: af 90 pop r10 + 772: 9f 90 pop r9 + 774: 8f 90 pop r8 + 776: 7f 90 pop r7 + 778: 6f 90 pop r6 + 77a: 5f 90 pop r5 + 77c: 4f 90 pop r4 + 77e: 3f 90 pop r3 + 780: 2f 90 pop r2 + 782: 08 95 ret -00000790 : - 790: fc 01 movw r30, r24 - 792: 05 90 lpm r0, Z+ - 794: 61 50 subi r22, 0x01 ; 1 - 796: 70 40 sbci r23, 0x00 ; 0 - 798: 01 10 cpse r0, r1 - 79a: d8 f7 brcc .-10 ; 0x792 - 79c: 80 95 com r24 - 79e: 90 95 com r25 - 7a0: 8e 0f add r24, r30 - 7a2: 9f 1f adc r25, r31 - 7a4: 08 95 ret +00000784 : + 784: fc 01 movw r30, r24 + 786: 05 90 lpm r0, Z+ + 788: 61 50 subi r22, 0x01 ; 1 + 78a: 70 40 sbci r23, 0x00 ; 0 + 78c: 01 10 cpse r0, r1 + 78e: d8 f7 brcc .-10 ; 0x786 + 790: 80 95 com r24 + 792: 90 95 com r25 + 794: 8e 0f add r24, r30 + 796: 9f 1f adc r25, r31 + 798: 08 95 ret -000007a6 : - 7a6: fc 01 movw r30, r24 - 7a8: 61 50 subi r22, 0x01 ; 1 - 7aa: 70 40 sbci r23, 0x00 ; 0 - 7ac: 01 90 ld r0, Z+ - 7ae: 01 10 cpse r0, r1 - 7b0: d8 f7 brcc .-10 ; 0x7a8 - 7b2: 80 95 com r24 - 7b4: 90 95 com r25 - 7b6: 8e 0f add r24, r30 - 7b8: 9f 1f adc r25, r31 - 7ba: 08 95 ret +0000079a : + 79a: fc 01 movw r30, r24 + 79c: 61 50 subi r22, 0x01 ; 1 + 79e: 70 40 sbci r23, 0x00 ; 0 + 7a0: 01 90 ld r0, Z+ + 7a2: 01 10 cpse r0, r1 + 7a4: d8 f7 brcc .-10 ; 0x79c + 7a6: 80 95 com r24 + 7a8: 90 95 com r25 + 7aa: 8e 0f add r24, r30 + 7ac: 9f 1f adc r25, r31 + 7ae: 08 95 ret -000007bc : - 7bc: 0f 93 push r16 - 7be: 1f 93 push r17 - 7c0: cf 93 push r28 - 7c2: df 93 push r29 - 7c4: fb 01 movw r30, r22 - 7c6: 23 81 ldd r18, Z+3 ; 0x03 - 7c8: 21 fd sbrc r18, 1 - 7ca: 03 c0 rjmp .+6 ; 0x7d2 - 7cc: 8f ef ldi r24, 0xFF ; 255 - 7ce: 9f ef ldi r25, 0xFF ; 255 - 7d0: 2c c0 rjmp .+88 ; 0x82a - 7d2: 22 ff sbrs r18, 2 - 7d4: 16 c0 rjmp .+44 ; 0x802 - 7d6: 46 81 ldd r20, Z+6 ; 0x06 - 7d8: 57 81 ldd r21, Z+7 ; 0x07 - 7da: 24 81 ldd r18, Z+4 ; 0x04 - 7dc: 35 81 ldd r19, Z+5 ; 0x05 - 7de: 42 17 cp r20, r18 - 7e0: 53 07 cpc r21, r19 - 7e2: 44 f4 brge .+16 ; 0x7f4 - 7e4: a0 81 ld r26, Z - 7e6: b1 81 ldd r27, Z+1 ; 0x01 - 7e8: 9d 01 movw r18, r26 - 7ea: 2f 5f subi r18, 0xFF ; 255 - 7ec: 3f 4f sbci r19, 0xFF ; 255 - 7ee: 31 83 std Z+1, r19 ; 0x01 - 7f0: 20 83 st Z, r18 - 7f2: 8c 93 st X, r24 - 7f4: 26 81 ldd r18, Z+6 ; 0x06 - 7f6: 37 81 ldd r19, Z+7 ; 0x07 - 7f8: 2f 5f subi r18, 0xFF ; 255 - 7fa: 3f 4f sbci r19, 0xFF ; 255 - 7fc: 37 83 std Z+7, r19 ; 0x07 - 7fe: 26 83 std Z+6, r18 ; 0x06 - 800: 14 c0 rjmp .+40 ; 0x82a - 802: 8b 01 movw r16, r22 - 804: ec 01 movw r28, r24 - 806: fb 01 movw r30, r22 - 808: 00 84 ldd r0, Z+8 ; 0x08 - 80a: f1 85 ldd r31, Z+9 ; 0x09 - 80c: e0 2d mov r30, r0 - 80e: 09 95 icall - 810: 89 2b or r24, r25 - 812: e1 f6 brne .-72 ; 0x7cc - 814: d8 01 movw r26, r16 - 816: 16 96 adiw r26, 0x06 ; 6 - 818: 8d 91 ld r24, X+ - 81a: 9c 91 ld r25, X - 81c: 17 97 sbiw r26, 0x07 ; 7 - 81e: 01 96 adiw r24, 0x01 ; 1 - 820: 17 96 adiw r26, 0x07 ; 7 - 822: 9c 93 st X, r25 - 824: 8e 93 st -X, r24 - 826: 16 97 sbiw r26, 0x06 ; 6 - 828: ce 01 movw r24, r28 - 82a: df 91 pop r29 - 82c: cf 91 pop r28 - 82e: 1f 91 pop r17 - 830: 0f 91 pop r16 - 832: 08 95 ret +000007b0 : + 7b0: 0f 93 push r16 + 7b2: 1f 93 push r17 + 7b4: cf 93 push r28 + 7b6: df 93 push r29 + 7b8: fb 01 movw r30, r22 + 7ba: 23 81 ldd r18, Z+3 ; 0x03 + 7bc: 21 fd sbrc r18, 1 + 7be: 03 c0 rjmp .+6 ; 0x7c6 + 7c0: 8f ef ldi r24, 0xFF ; 255 + 7c2: 9f ef ldi r25, 0xFF ; 255 + 7c4: 2c c0 rjmp .+88 ; 0x81e + 7c6: 22 ff sbrs r18, 2 + 7c8: 16 c0 rjmp .+44 ; 0x7f6 + 7ca: 46 81 ldd r20, Z+6 ; 0x06 + 7cc: 57 81 ldd r21, Z+7 ; 0x07 + 7ce: 24 81 ldd r18, Z+4 ; 0x04 + 7d0: 35 81 ldd r19, Z+5 ; 0x05 + 7d2: 42 17 cp r20, r18 + 7d4: 53 07 cpc r21, r19 + 7d6: 44 f4 brge .+16 ; 0x7e8 + 7d8: a0 81 ld r26, Z + 7da: b1 81 ldd r27, Z+1 ; 0x01 + 7dc: 9d 01 movw r18, r26 + 7de: 2f 5f subi r18, 0xFF ; 255 + 7e0: 3f 4f sbci r19, 0xFF ; 255 + 7e2: 31 83 std Z+1, r19 ; 0x01 + 7e4: 20 83 st Z, r18 + 7e6: 8c 93 st X, r24 + 7e8: 26 81 ldd r18, Z+6 ; 0x06 + 7ea: 37 81 ldd r19, Z+7 ; 0x07 + 7ec: 2f 5f subi r18, 0xFF ; 255 + 7ee: 3f 4f sbci r19, 0xFF ; 255 + 7f0: 37 83 std Z+7, r19 ; 0x07 + 7f2: 26 83 std Z+6, r18 ; 0x06 + 7f4: 14 c0 rjmp .+40 ; 0x81e + 7f6: 8b 01 movw r16, r22 + 7f8: ec 01 movw r28, r24 + 7fa: fb 01 movw r30, r22 + 7fc: 00 84 ldd r0, Z+8 ; 0x08 + 7fe: f1 85 ldd r31, Z+9 ; 0x09 + 800: e0 2d mov r30, r0 + 802: 09 95 icall + 804: 89 2b or r24, r25 + 806: e1 f6 brne .-72 ; 0x7c0 + 808: d8 01 movw r26, r16 + 80a: 16 96 adiw r26, 0x06 ; 6 + 80c: 8d 91 ld r24, X+ + 80e: 9c 91 ld r25, X + 810: 17 97 sbiw r26, 0x07 ; 7 + 812: 01 96 adiw r24, 0x01 ; 1 + 814: 17 96 adiw r26, 0x07 ; 7 + 816: 9c 93 st X, r25 + 818: 8e 93 st -X, r24 + 81a: 16 97 sbiw r26, 0x06 ; 6 + 81c: ce 01 movw r24, r28 + 81e: df 91 pop r29 + 820: cf 91 pop r28 + 822: 1f 91 pop r17 + 824: 0f 91 pop r16 + 826: 08 95 ret -00000834 <__ultoa_invert>: - 834: fa 01 movw r30, r20 - 836: aa 27 eor r26, r26 - 838: 28 30 cpi r18, 0x08 ; 8 - 83a: 51 f1 breq .+84 ; 0x890 <__ultoa_invert+0x5c> - 83c: 20 31 cpi r18, 0x10 ; 16 - 83e: 81 f1 breq .+96 ; 0x8a0 <__ultoa_invert+0x6c> - 840: e8 94 clt - 842: 6f 93 push r22 - 844: 6e 7f andi r22, 0xFE ; 254 - 846: 6e 5f subi r22, 0xFE ; 254 - 848: 7f 4f sbci r23, 0xFF ; 255 - 84a: 8f 4f sbci r24, 0xFF ; 255 - 84c: 9f 4f sbci r25, 0xFF ; 255 - 84e: af 4f sbci r26, 0xFF ; 255 - 850: b1 e0 ldi r27, 0x01 ; 1 - 852: 3e d0 rcall .+124 ; 0x8d0 <__ultoa_invert+0x9c> - 854: b4 e0 ldi r27, 0x04 ; 4 - 856: 3c d0 rcall .+120 ; 0x8d0 <__ultoa_invert+0x9c> - 858: 67 0f add r22, r23 - 85a: 78 1f adc r23, r24 - 85c: 89 1f adc r24, r25 - 85e: 9a 1f adc r25, r26 - 860: a1 1d adc r26, r1 - 862: 68 0f add r22, r24 - 864: 79 1f adc r23, r25 - 866: 8a 1f adc r24, r26 - 868: 91 1d adc r25, r1 - 86a: a1 1d adc r26, r1 - 86c: 6a 0f add r22, r26 - 86e: 71 1d adc r23, r1 - 870: 81 1d adc r24, r1 - 872: 91 1d adc r25, r1 - 874: a1 1d adc r26, r1 - 876: 20 d0 rcall .+64 ; 0x8b8 <__ultoa_invert+0x84> - 878: 09 f4 brne .+2 ; 0x87c <__ultoa_invert+0x48> - 87a: 68 94 set - 87c: 3f 91 pop r19 - 87e: 2a e0 ldi r18, 0x0A ; 10 - 880: 26 9f mul r18, r22 - 882: 11 24 eor r1, r1 - 884: 30 19 sub r19, r0 - 886: 30 5d subi r19, 0xD0 ; 208 - 888: 31 93 st Z+, r19 - 88a: de f6 brtc .-74 ; 0x842 <__ultoa_invert+0xe> - 88c: cf 01 movw r24, r30 - 88e: 08 95 ret - 890: 46 2f mov r20, r22 - 892: 47 70 andi r20, 0x07 ; 7 - 894: 40 5d subi r20, 0xD0 ; 208 - 896: 41 93 st Z+, r20 - 898: b3 e0 ldi r27, 0x03 ; 3 - 89a: 0f d0 rcall .+30 ; 0x8ba <__ultoa_invert+0x86> - 89c: c9 f7 brne .-14 ; 0x890 <__ultoa_invert+0x5c> - 89e: f6 cf rjmp .-20 ; 0x88c <__ultoa_invert+0x58> - 8a0: 46 2f mov r20, r22 - 8a2: 4f 70 andi r20, 0x0F ; 15 - 8a4: 40 5d subi r20, 0xD0 ; 208 - 8a6: 4a 33 cpi r20, 0x3A ; 58 - 8a8: 18 f0 brcs .+6 ; 0x8b0 <__ultoa_invert+0x7c> - 8aa: 49 5d subi r20, 0xD9 ; 217 - 8ac: 31 fd sbrc r19, 1 - 8ae: 40 52 subi r20, 0x20 ; 32 - 8b0: 41 93 st Z+, r20 - 8b2: 02 d0 rcall .+4 ; 0x8b8 <__ultoa_invert+0x84> - 8b4: a9 f7 brne .-22 ; 0x8a0 <__ultoa_invert+0x6c> - 8b6: ea cf rjmp .-44 ; 0x88c <__ultoa_invert+0x58> - 8b8: b4 e0 ldi r27, 0x04 ; 4 - 8ba: a6 95 lsr r26 - 8bc: 97 95 ror r25 - 8be: 87 95 ror r24 - 8c0: 77 95 ror r23 - 8c2: 67 95 ror r22 - 8c4: ba 95 dec r27 - 8c6: c9 f7 brne .-14 ; 0x8ba <__ultoa_invert+0x86> - 8c8: 00 97 sbiw r24, 0x00 ; 0 - 8ca: 61 05 cpc r22, r1 - 8cc: 71 05 cpc r23, r1 - 8ce: 08 95 ret - 8d0: 9b 01 movw r18, r22 - 8d2: ac 01 movw r20, r24 - 8d4: 0a 2e mov r0, r26 - 8d6: 06 94 lsr r0 - 8d8: 57 95 ror r21 - 8da: 47 95 ror r20 - 8dc: 37 95 ror r19 - 8de: 27 95 ror r18 - 8e0: ba 95 dec r27 - 8e2: c9 f7 brne .-14 ; 0x8d6 <__ultoa_invert+0xa2> - 8e4: 62 0f add r22, r18 - 8e6: 73 1f adc r23, r19 - 8e8: 84 1f adc r24, r20 - 8ea: 95 1f adc r25, r21 - 8ec: a0 1d adc r26, r0 - 8ee: 08 95 ret +00000828 <__ultoa_invert>: + 828: fa 01 movw r30, r20 + 82a: aa 27 eor r26, r26 + 82c: 28 30 cpi r18, 0x08 ; 8 + 82e: 51 f1 breq .+84 ; 0x884 <__ultoa_invert+0x5c> + 830: 20 31 cpi r18, 0x10 ; 16 + 832: 81 f1 breq .+96 ; 0x894 <__ultoa_invert+0x6c> + 834: e8 94 clt + 836: 6f 93 push r22 + 838: 6e 7f andi r22, 0xFE ; 254 + 83a: 6e 5f subi r22, 0xFE ; 254 + 83c: 7f 4f sbci r23, 0xFF ; 255 + 83e: 8f 4f sbci r24, 0xFF ; 255 + 840: 9f 4f sbci r25, 0xFF ; 255 + 842: af 4f sbci r26, 0xFF ; 255 + 844: b1 e0 ldi r27, 0x01 ; 1 + 846: 3e d0 rcall .+124 ; 0x8c4 <__ultoa_invert+0x9c> + 848: b4 e0 ldi r27, 0x04 ; 4 + 84a: 3c d0 rcall .+120 ; 0x8c4 <__ultoa_invert+0x9c> + 84c: 67 0f add r22, r23 + 84e: 78 1f adc r23, r24 + 850: 89 1f adc r24, r25 + 852: 9a 1f adc r25, r26 + 854: a1 1d adc r26, r1 + 856: 68 0f add r22, r24 + 858: 79 1f adc r23, r25 + 85a: 8a 1f adc r24, r26 + 85c: 91 1d adc r25, r1 + 85e: a1 1d adc r26, r1 + 860: 6a 0f add r22, r26 + 862: 71 1d adc r23, r1 + 864: 81 1d adc r24, r1 + 866: 91 1d adc r25, r1 + 868: a1 1d adc r26, r1 + 86a: 20 d0 rcall .+64 ; 0x8ac <__ultoa_invert+0x84> + 86c: 09 f4 brne .+2 ; 0x870 <__ultoa_invert+0x48> + 86e: 68 94 set + 870: 3f 91 pop r19 + 872: 2a e0 ldi r18, 0x0A ; 10 + 874: 26 9f mul r18, r22 + 876: 11 24 eor r1, r1 + 878: 30 19 sub r19, r0 + 87a: 30 5d subi r19, 0xD0 ; 208 + 87c: 31 93 st Z+, r19 + 87e: de f6 brtc .-74 ; 0x836 <__ultoa_invert+0xe> + 880: cf 01 movw r24, r30 + 882: 08 95 ret + 884: 46 2f mov r20, r22 + 886: 47 70 andi r20, 0x07 ; 7 + 888: 40 5d subi r20, 0xD0 ; 208 + 88a: 41 93 st Z+, r20 + 88c: b3 e0 ldi r27, 0x03 ; 3 + 88e: 0f d0 rcall .+30 ; 0x8ae <__ultoa_invert+0x86> + 890: c9 f7 brne .-14 ; 0x884 <__ultoa_invert+0x5c> + 892: f6 cf rjmp .-20 ; 0x880 <__ultoa_invert+0x58> + 894: 46 2f mov r20, r22 + 896: 4f 70 andi r20, 0x0F ; 15 + 898: 40 5d subi r20, 0xD0 ; 208 + 89a: 4a 33 cpi r20, 0x3A ; 58 + 89c: 18 f0 brcs .+6 ; 0x8a4 <__ultoa_invert+0x7c> + 89e: 49 5d subi r20, 0xD9 ; 217 + 8a0: 31 fd sbrc r19, 1 + 8a2: 40 52 subi r20, 0x20 ; 32 + 8a4: 41 93 st Z+, r20 + 8a6: 02 d0 rcall .+4 ; 0x8ac <__ultoa_invert+0x84> + 8a8: a9 f7 brne .-22 ; 0x894 <__ultoa_invert+0x6c> + 8aa: ea cf rjmp .-44 ; 0x880 <__ultoa_invert+0x58> + 8ac: b4 e0 ldi r27, 0x04 ; 4 + 8ae: a6 95 lsr r26 + 8b0: 97 95 ror r25 + 8b2: 87 95 ror r24 + 8b4: 77 95 ror r23 + 8b6: 67 95 ror r22 + 8b8: ba 95 dec r27 + 8ba: c9 f7 brne .-14 ; 0x8ae <__ultoa_invert+0x86> + 8bc: 00 97 sbiw r24, 0x00 ; 0 + 8be: 61 05 cpc r22, r1 + 8c0: 71 05 cpc r23, r1 + 8c2: 08 95 ret + 8c4: 9b 01 movw r18, r22 + 8c6: ac 01 movw r20, r24 + 8c8: 0a 2e mov r0, r26 + 8ca: 06 94 lsr r0 + 8cc: 57 95 ror r21 + 8ce: 47 95 ror r20 + 8d0: 37 95 ror r19 + 8d2: 27 95 ror r18 + 8d4: ba 95 dec r27 + 8d6: c9 f7 brne .-14 ; 0x8ca <__ultoa_invert+0xa2> + 8d8: 62 0f add r22, r18 + 8da: 73 1f adc r23, r19 + 8dc: 84 1f adc r24, r20 + 8de: 95 1f adc r25, r21 + 8e0: a0 1d adc r26, r0 + 8e2: 08 95 ret -000008f0 <_exit>: - 8f0: f8 94 cli +000008e4 <_exit>: + 8e4: f8 94 cli -000008f2 <__stop_program>: - 8f2: ff cf rjmp .-2 ; 0x8f2 <__stop_program> +000008e6 <__stop_program>: + 8e6: ff cf rjmp .-2 ; 0x8e6 <__stop_program> diff --git a/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.srec b/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.srec index 45e9be2..f6ee7c1 100644 --- a/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.srec +++ b/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.srec @@ -1,16 +1,16 @@ S01400006F7064726163687420342E312E7372656308 S113000045C0000058C0000056C0000054C00000A5 S113001052C0000050C000004EC000004CC00000A0 -S11300204AC000003BC1000046C0000044C00000BC +S11300204AC0000036C1000046C0000044C00000C1 S113003042C0000040C000003EC000003CC00000C0 S11300403AC0000038C0000036C0000034C00000D0 S113005032C0000030C000002EC000002CC00000E0 S11300602AC0000028C0000026C0000024C00000F0 S113007022C0000020C000001EC000001CC0000000 S11300801AC0000018C0000016C0000011241FBED2 -S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E4EFEF +S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E8EEEC S11300A0F8E000E00BBF02C007900D92A430B10746 -S11300B0D9F711D11DC4A4CF9BB321E030E002C015 +S11300B0D9F70CD117C4A4CF9BB321E030E002C020 S11300C0220F331F8A95E2F7292B2BBB08959BB38C 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+S11308B09795879577956795BA95C9F700976105D8 +S11308C0710508959B01AC010A2E0694579547952E +S11308D037952795BA95C9F7620F731F841F951F23 +S10B08E0A01D0895F894FFCF58 +S10708E8256400007F S9030000FC diff --git a/Microcontrollers/opdracht 4.1/main.c b/Microcontrollers/opdracht 4.1/main.c index ef221b3..838a18e 100644 --- a/Microcontrollers/opdracht 4.1/main.c +++ b/Microcontrollers/opdracht 4.1/main.c @@ -52,7 +52,7 @@ int main(void) /* Replace with your application code */ DDRF = 0x00; // set port F input. DDRE = 0xFF; // all port A output. - adcInit(); + init_4bits_mode(); _delay_ms(10); @@ -72,7 +72,7 @@ int main(void) wait(10); - lcd_write_integer(getADCValue()); + lcd_write_integer((getADCValue())); } previousValue = number; diff --git a/Microcontrollers/opdracht 4.3/Debug/Makefile b/Microcontrollers/opdracht 4.3/Debug/Makefile new file mode 100644 index 0000000..533dba3 --- /dev/null +++ b/Microcontrollers/opdracht 4.3/Debug/Makefile @@ -0,0 +1,139 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +SHELL := cmd.exe +RM := rm -rf + +USER_OBJS := + +LIBS := +PROJ := + +O_SRCS := +C_SRCS := +S_SRCS := +S_UPPER_SRCS := +OBJ_SRCS := +ASM_SRCS := +PREPROCESSING_SRCS := +OBJS := +OBJS_AS_ARGS := +C_DEPS := +C_DEPS_AS_ARGS := +EXECUTABLES := +OUTPUT_FILE_PATH := +OUTPUT_FILE_PATH_AS_ARGS := +AVR_APP_PATH :=$$$AVR_APP_PATH$$$ +QUOTE := " +ADDITIONAL_DEPENDENCIES:= +OUTPUT_FILE_DEP:= +LIB_DEP:= +LINKER_SCRIPT_DEP:= + +# Every subdirectory with source files must be described here +SUBDIRS := + + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../lcd_control.c \ +../main.c + + +PREPROCESSING_SRCS += + + +ASM_SRCS += + + +OBJS += \ +lcd_control.o \ +main.o + +OBJS_AS_ARGS += \ +lcd_control.o \ +main.o + +C_DEPS += \ +lcd_control.d \ +main.d + +C_DEPS_AS_ARGS += \ +lcd_control.d \ +main.d + +OUTPUT_FILE_PATH +=opdracht\ 4.3.elf + +OUTPUT_FILE_PATH_AS_ARGS +="opdracht 4.3.elf" + +ADDITIONAL_DEPENDENCIES:= + +OUTPUT_FILE_DEP:= ./makedep.mk + +LIB_DEP+= + +LINKER_SCRIPT_DEP+= + + +# AVR32/GNU C Compiler +./lcd_control.o: .././lcd_control.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include" -Og -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -mrelax -g2 -Wall -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + +./main.o: .././main.c + @echo Building file: $< + @echo Invoking: AVR/GNU C Compiler : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -x c -funsigned-char -funsigned-bitfields -DDEBUG -I"C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include" -Og -ffunction-sections -fdata-sections -fpack-struct -fshort-enums -mrelax -g2 -Wall -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" -c -std=gnu99 -MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<" + @echo Finished building: $< + + + + + +# AVR32/GNU Preprocessing Assembler + + + +# AVR32/GNU Assembler + + + + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +# Add inputs and outputs from these tool invocations to the build variables + +# All Target +all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES) + +$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP) + @echo Building target: $@ + @echo Invoking: AVR/GNU Linker : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="opdracht 4.3.map" -Wl,--start-group -Wl,-lm -Wl,--end-group -Wl,--gc-sections -mrelax -mmcu=atmega128 -B "C:\Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + @echo Finished building target: $@ + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "opdracht 4.3.elf" "opdracht 4.3.hex" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "opdracht 4.3.elf" "opdracht 4.3.eep" || exit 0 + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "opdracht 4.3.elf" > "opdracht 4.3.lss" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "opdracht 4.3.elf" "opdracht 4.3.srec" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "opdracht 4.3.elf" + + + + + + + +# Other Targets +clean: + -$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES) + -$(RM) $(C_DEPS_AS_ARGS) + rm -rf "opdracht 4.3.elf" "opdracht 4.3.a" "opdracht 4.3.hex" "opdracht 4.3.lss" "opdracht 4.3.eep" "opdracht 4.3.map" "opdracht 4.3.srec" "opdracht 4.3.usersignatures" + \ No newline at end of file diff --git a/Microcontrollers/opdracht 4.3/Debug/makedep.mk b/Microcontrollers/opdracht 4.3/Debug/makedep.mk new file mode 100644 index 0000000..c9e4784 --- /dev/null +++ b/Microcontrollers/opdracht 4.3/Debug/makedep.mk @@ -0,0 +1,8 @@ +################################################################################ +# Automatically-generated file. Do not edit or delete the file +################################################################################ + +lcd_control.c + +main.c + diff --git a/Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.eep b/Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.eep new file mode 100644 index 0000000..7c166a1 --- /dev/null +++ b/Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.eep @@ -0,0 +1 @@ +:00000001FF diff --git a/Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.lss b/Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.lss new file mode 100644 index 0000000..aa43a4b --- /dev/null +++ b/Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.lss @@ -0,0 +1,1459 @@ + +opdracht 4.3.elf: file format elf32-avr + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .data 00000004 00800100 000008f8 0000096c 2**0 + CONTENTS, ALLOC, LOAD, DATA + 1 .text 000008f8 00000000 00000000 00000074 2**1 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .comment 0000005c 00000000 00000000 00000970 2**0 + CONTENTS, READONLY + 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 000009cc 2**2 + CONTENTS, READONLY + 4 .debug_aranges 000000c0 00000000 00000000 00000a08 2**0 + CONTENTS, READONLY, DEBUGGING + 5 .debug_info 00000f30 00000000 00000000 00000ac8 2**0 + CONTENTS, READONLY, DEBUGGING + 6 .debug_abbrev 00000a8d 00000000 00000000 000019f8 2**0 + CONTENTS, READONLY, DEBUGGING + 7 .debug_line 000006f1 00000000 00000000 00002485 2**0 + CONTENTS, READONLY, DEBUGGING + 8 .debug_frame 000001b4 00000000 00000000 00002b78 2**2 + CONTENTS, READONLY, DEBUGGING + 9 .debug_str 0000056a 00000000 00000000 00002d2c 2**0 + CONTENTS, READONLY, DEBUGGING + 10 .debug_loc 00000463 00000000 00000000 00003296 2**0 + CONTENTS, READONLY, DEBUGGING + 11 .debug_ranges 000000a0 00000000 00000000 000036f9 2**0 + CONTENTS, READONLY, DEBUGGING + +Disassembly of section .text: + +00000000 <__vectors>: + 0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end> + 2: 00 00 nop + 4: 58 c0 rjmp .+176 ; 0xb6 <__bad_interrupt> + 6: 00 00 nop + 8: 56 c0 rjmp .+172 ; 0xb6 <__bad_interrupt> + a: 00 00 nop + c: 54 c0 rjmp .+168 ; 0xb6 <__bad_interrupt> + e: 00 00 nop + 10: 52 c0 rjmp .+164 ; 0xb6 <__bad_interrupt> + 12: 00 00 nop + 14: 50 c0 rjmp .+160 ; 0xb6 <__bad_interrupt> + 16: 00 00 nop + 18: 4e c0 rjmp .+156 ; 0xb6 <__bad_interrupt> + 1a: 00 00 nop + 1c: 4c c0 rjmp .+152 ; 0xb6 <__bad_interrupt> + 1e: 00 00 nop + 20: 4a c0 rjmp .+148 ; 0xb6 <__bad_interrupt> + 22: 00 00 nop + 24: 3b c1 rjmp .+630 ; 0x29c <__vector_9> + 26: 00 00 nop + 28: 46 c0 rjmp .+140 ; 0xb6 <__bad_interrupt> + 2a: 00 00 nop + 2c: 44 c0 rjmp .+136 ; 0xb6 <__bad_interrupt> + 2e: 00 00 nop + 30: 42 c0 rjmp .+132 ; 0xb6 <__bad_interrupt> + 32: 00 00 nop + 34: 40 c0 rjmp .+128 ; 0xb6 <__bad_interrupt> + 36: 00 00 nop + 38: 3e c0 rjmp .+124 ; 0xb6 <__bad_interrupt> + 3a: 00 00 nop + 3c: 3c c0 rjmp .+120 ; 0xb6 <__bad_interrupt> + 3e: 00 00 nop + 40: 3a c0 rjmp .+116 ; 0xb6 <__bad_interrupt> + 42: 00 00 nop + 44: 38 c0 rjmp .+112 ; 0xb6 <__bad_interrupt> + 46: 00 00 nop + 48: 36 c0 rjmp .+108 ; 0xb6 <__bad_interrupt> + 4a: 00 00 nop + 4c: 34 c0 rjmp .+104 ; 0xb6 <__bad_interrupt> + 4e: 00 00 nop + 50: 32 c0 rjmp .+100 ; 0xb6 <__bad_interrupt> + 52: 00 00 nop + 54: 30 c0 rjmp .+96 ; 0xb6 <__bad_interrupt> + 56: 00 00 nop + 58: 2e c0 rjmp .+92 ; 0xb6 <__bad_interrupt> + 5a: 00 00 nop + 5c: 2c c0 rjmp .+88 ; 0xb6 <__bad_interrupt> + 5e: 00 00 nop + 60: 2a c0 rjmp .+84 ; 0xb6 <__bad_interrupt> + 62: 00 00 nop + 64: 28 c0 rjmp .+80 ; 0xb6 <__bad_interrupt> + 66: 00 00 nop + 68: 26 c0 rjmp .+76 ; 0xb6 <__bad_interrupt> + 6a: 00 00 nop + 6c: 24 c0 rjmp .+72 ; 0xb6 <__bad_interrupt> + 6e: 00 00 nop + 70: 22 c0 rjmp .+68 ; 0xb6 <__bad_interrupt> + 72: 00 00 nop + 74: 20 c0 rjmp .+64 ; 0xb6 <__bad_interrupt> + 76: 00 00 nop + 78: 1e c0 rjmp .+60 ; 0xb6 <__bad_interrupt> + 7a: 00 00 nop + 7c: 1c c0 rjmp .+56 ; 0xb6 <__bad_interrupt> + 7e: 00 00 nop + 80: 1a c0 rjmp .+52 ; 0xb6 <__bad_interrupt> + 82: 00 00 nop + 84: 18 c0 rjmp .+48 ; 0xb6 <__bad_interrupt> + 86: 00 00 nop + 88: 16 c0 rjmp .+44 ; 0xb6 <__bad_interrupt> + ... + +0000008c <__ctors_end>: + 8c: 11 24 eor r1, r1 + 8e: 1f be out 0x3f, r1 ; 63 + 90: cf ef ldi r28, 0xFF ; 255 + 92: d0 e1 ldi r29, 0x10 ; 16 + 94: de bf out 0x3e, r29 ; 62 + 96: cd bf out 0x3d, r28 ; 61 + +00000098 <__do_copy_data>: + 98: 11 e0 ldi r17, 0x01 ; 1 + 9a: a0 e0 ldi r26, 0x00 ; 0 + 9c: b1 e0 ldi r27, 0x01 ; 1 + 9e: e8 ef ldi r30, 0xF8 ; 248 + a0: f8 e0 ldi r31, 0x08 ; 8 + a2: 00 e0 ldi r16, 0x00 ; 0 + a4: 0b bf out 0x3b, r16 ; 59 + a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14> + a8: 07 90 elpm r0, Z+ + aa: 0d 92 st X+, r0 + ac: a4 30 cpi r26, 0x04 ; 4 + ae: b1 07 cpc r27, r17 + b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> + b2: 11 d1 rcall .+546 ; 0x2d6
+ b4: 1f c4 rjmp .+2110 ; 0x8f4 <_exit> + +000000b6 <__bad_interrupt>: + b6: a4 cf rjmp .-184 ; 0x0 <__vectors> + +000000b8 : +void cbi_portc(int index){ + PORTC &= ~(1< + c0: 22 0f add r18, r18 + c2: 33 1f adc r19, r19 + c4: 8a 95 dec r24 + c6: e2 f7 brpl .-8 ; 0xc0 + c8: 29 2b or r18, r25 + ca: 2b bb out 0x1b, r18 ; 27 + cc: 08 95 ret + +000000ce : +} + + +void cbi_porta(int index){ + PORTA &= ~(1< + d6: 22 0f add r18, r18 + d8: 33 1f adc r19, r19 + da: 8a 95 dec r24 + dc: e2 f7 brpl .-8 ; 0xd6 + de: 20 95 com r18 + e0: 29 23 and r18, r25 + e2: 2b bb out 0x1b, r18 ; 27 + e4: 08 95 ret + +000000e6 : + lcd_write_command (0x80); //Cursor terug naar start +} + +void lcd_strobe_lcd_e(void) { + + sbi_porta(LCD_E); // E high + e6: 86 e0 ldi r24, 0x06 ; 6 + e8: 90 e0 ldi r25, 0x00 ; 0 + ea: e6 df rcall .-52 ; 0xb8 + #else + //round up by default + __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); + #endif + + __builtin_avr_delay_cycles(__ticks_dc); + ec: 89 ef ldi r24, 0xF9 ; 249 + ee: 90 e0 ldi r25, 0x00 ; 0 + f0: 01 97 sbiw r24, 0x01 ; 1 + f2: f1 f7 brne .-4 ; 0xf0 + f4: 00 c0 rjmp .+0 ; 0xf6 + f6: 00 00 nop + _delay_ms(1); + cbi_porta(LCD_E); // E low + f8: 86 e0 ldi r24, 0x06 ; 6 + fa: 90 e0 ldi r25, 0x00 ; 0 + fc: e8 df rcall .-48 ; 0xce + fe: 89 ef ldi r24, 0xF9 ; 249 + 100: 90 e0 ldi r25, 0x00 ; 0 + 102: 01 97 sbiw r24, 0x01 ; 1 + 104: f1 f7 brne .-4 ; 0x102 + 106: 00 c0 rjmp .+0 ; 0x108 + 108: 00 00 nop + 10a: 08 95 ret + +0000010c : + char str[length + 1]; + snprintf(str, length + 1, "%d", number); + lcd_write_string(str); +} + +void lcd_write_character(unsigned char byte){ + 10c: cf 93 push r28 + 10e: c8 2f mov r28, r24 + + + //upper nibble + PORTC = byte; + 110: 85 bb out 0x15, r24 ; 21 + sbi_porta(LCD_RS); + 112: 84 e0 ldi r24, 0x04 ; 4 + 114: 90 e0 ldi r25, 0x00 ; 0 + 116: d0 df rcall .-96 ; 0xb8 + lcd_strobe_lcd_e(); + 118: e6 df rcall .-52 ; 0xe6 + 11a: c2 95 swap r28 + + //lower nibble + PORTC = (byte<<4); + 11c: c0 7f andi r28, 0xF0 ; 240 + 11e: c5 bb out 0x15, r28 ; 21 + 120: 84 e0 ldi r24, 0x04 ; 4 + sbi_porta(LCD_RS); + 122: 90 e0 ldi r25, 0x00 ; 0 + 124: c9 df rcall .-110 ; 0xb8 + lcd_strobe_lcd_e(); + 126: df df rcall .-66 ; 0xe6 + 128: cf 91 pop r28 + +} + 12a: 08 95 ret + +0000012c : + 12c: cf 93 push r28 + +void lcd_write_command(unsigned char byte){ + 12e: c8 2f mov r28, r24 + + //upper nibble + PORTC = byte; + 130: 85 bb out 0x15, r24 ; 21 + cbi_porta(LCD_RS); + 132: 84 e0 ldi r24, 0x04 ; 4 + 134: 90 e0 ldi r25, 0x00 ; 0 + 136: cb df rcall .-106 ; 0xce + lcd_strobe_lcd_e(); + 138: d6 df rcall .-84 ; 0xe6 + 13a: c2 95 swap r28 + + //lower nibble + PORTC = (byte<<4); + 13c: c0 7f andi r28, 0xF0 ; 240 + 13e: c5 bb out 0x15, r28 ; 21 + 140: 84 e0 ldi r24, 0x04 ; 4 + cbi_porta(LCD_RS); + 142: 90 e0 ldi r25, 0x00 ; 0 + 144: c4 df rcall .-120 ; 0xce + lcd_strobe_lcd_e(); + 146: cf df rcall .-98 ; 0xe6 + 148: cf 91 pop r28 + +} + 14a: 08 95 ret + +0000014c : + 14c: 81 e0 ldi r24, 0x01 ; 1 +#include "lcd_control.h" + +void _delay_ms(double __ms); + +void lcd_clear() { + lcd_write_command (0x01); //Leeg display + 14e: ee df rcall .-36 ; 0x12c + 150: 83 ef ldi r24, 0xF3 ; 243 + 152: 91 e0 ldi r25, 0x01 ; 1 + 154: 01 97 sbiw r24, 0x01 ; 1 + 156: f1 f7 brne .-4 ; 0x154 + 158: 00 c0 rjmp .+0 ; 0x15a + 15a: 00 00 nop + _delay_ms(2); + lcd_write_command (0x80); //Cursor terug naar start + 15c: 80 e8 ldi r24, 0x80 ; 128 + 15e: e6 cf rjmp .-52 ; 0x12c + 160: 08 95 ret + +00000162 : + +void cbi_porta(int index){ + PORTA &= ~(1< + + PORTC = 0x20; // function high nibble 4-bit 2 row + lcd_strobe_lcd_e(); + 176: c5 bb out 0x15, r28 ; 21 + 178: b6 df rcall .-148 ; 0xe6 + PORTC = 0x80; // function low nibble 4-bit 2 row + 17a: 80 e8 ldi r24, 0x80 ; 128 + lcd_strobe_lcd_e(); + 17c: 85 bb out 0x15, r24 ; 21 + + PORTC = 0x00; // function high nibble turn on visible blinking-block cursor + 17e: b3 df rcall .-154 ; 0xe6 + lcd_strobe_lcd_e(); + 180: 15 ba out 0x15, r1 ; 21 + PORTC = 0xF0; // function low nibble turn on visible blinking-block cursor + 182: b1 df rcall .-158 ; 0xe6 + lcd_strobe_lcd_e(); + 184: 80 ef ldi r24, 0xF0 ; 240 + + PORTC = 0x00; // Entry mode set high nibble + 186: 85 bb out 0x15, r24 ; 21 + lcd_strobe_lcd_e(); + 188: ae df rcall .-164 ; 0xe6 + PORTC = 0x60; // Entry mode set low nibble + 18a: 15 ba out 0x15, r1 ; 21 + 18c: ac df rcall .-168 ; 0xe6 + lcd_strobe_lcd_e(); + 18e: 80 e6 ldi r24, 0x60 ; 96 + 190: 85 bb out 0x15, r24 ; 21 + + // return home + lcd_write_command(0x02); + 192: a9 df rcall .-174 ; 0xe6 + 194: 82 e0 ldi r24, 0x02 ; 2 + 196: ca df rcall .-108 ; 0x12c + lcd_strobe_lcd_e(); + 198: a6 df rcall .-180 ; 0xe6 + 19a: cf 91 pop r28 +} + 19c: 08 95 ret + +0000019e : + 19e: cf 93 push r28 + cbi_porta(LCD_RS); + lcd_strobe_lcd_e(); + +} + +void lcd_write_string(const char *str) { + 1a0: df 93 push r29 + 1a2: ec 01 movw r28, r24 + + for(;*str; str++){ + 1a4: 02 c0 rjmp .+4 ; 0x1aa + lcd_write_character(*str); + 1a6: b2 df rcall .-156 ; 0x10c + +} + +void lcd_write_string(const char *str) { + + for(;*str; str++){ + 1a8: 21 96 adiw r28, 0x01 ; 1 + 1aa: 88 81 ld r24, Y + 1ac: 81 11 cpse r24, r1 + 1ae: fb cf rjmp .-10 ; 0x1a6 + lcd_write_character(*str); + } +} + 1b0: df 91 pop r29 + 1b2: cf 91 pop r28 + 1b4: 08 95 ret + +000001b6 : + // return home + lcd_write_command(0x02); + lcd_strobe_lcd_e(); +} + +void lcd_write_integer(int number){ + 1b6: af 92 push r10 + 1b8: bf 92 push r11 + 1ba: cf 92 push r12 + 1bc: df 92 push r13 + 1be: ef 92 push r14 + 1c0: ff 92 push r15 + 1c2: 0f 93 push r16 + 1c4: 1f 93 push r17 + 1c6: cf 93 push r28 + 1c8: df 93 push r29 + 1ca: cd b7 in r28, 0x3d ; 61 + 1cc: de b7 in r29, 0x3e ; 62 + 1ce: 6c 01 movw r12, r24 + int length = snprintf(NULL, 0, "%d", number + 1); + char str[length + 1]; + snprintf(str, length + 1, "%d", number); + lcd_write_string(str); +} + 1d0: ad b6 in r10, 0x3d ; 61 + 1d2: be b6 in r11, 0x3e ; 62 + lcd_write_command(0x02); + lcd_strobe_lcd_e(); +} + +void lcd_write_integer(int number){ + int length = snprintf(NULL, 0, "%d", number + 1); + 1d4: 01 96 adiw r24, 0x01 ; 1 + 1d6: 9f 93 push r25 + 1d8: 8f 93 push r24 + 1da: 0f 2e mov r0, r31 + 1dc: f0 e0 ldi r31, 0x00 ; 0 + 1de: ef 2e mov r14, r31 + 1e0: f1 e0 ldi r31, 0x01 ; 1 + 1e2: ff 2e mov r15, r31 + 1e4: f0 2d mov r31, r0 + 1e6: ff 92 push r15 + 1e8: ef 92 push r14 + 1ea: 1f 92 push r1 + 1ec: 1f 92 push r1 + 1ee: 1f 92 push r1 + 1f0: 1f 92 push r1 + 1f2: 97 d0 rcall .+302 ; 0x322 + char str[length + 1]; + 1f4: 01 96 adiw r24, 0x01 ; 1 + 1f6: 2d b7 in r18, 0x3d ; 61 + 1f8: 3e b7 in r19, 0x3e ; 62 + 1fa: 28 5f subi r18, 0xF8 ; 248 + 1fc: 3f 4f sbci r19, 0xFF ; 255 + 1fe: 0f b6 in r0, 0x3f ; 63 + 200: f8 94 cli + 202: 3e bf out 0x3e, r19 ; 62 + 204: 0f be out 0x3f, r0 ; 63 + 206: 2d bf out 0x3d, r18 ; 61 + 208: 28 1b sub r18, r24 + 20a: 39 0b sbc r19, r25 + 20c: 0f b6 in r0, 0x3f ; 63 + 20e: f8 94 cli + 210: 3e bf out 0x3e, r19 ; 62 + 212: 0f be out 0x3f, r0 ; 63 + 214: 2d bf out 0x3d, r18 ; 61 + 216: 0d b7 in r16, 0x3d ; 61 + 218: 1e b7 in r17, 0x3e ; 62 + 21a: 0f 5f subi r16, 0xFF ; 255 + 21c: 1f 4f sbci r17, 0xFF ; 255 + snprintf(str, length + 1, "%d", number); + 21e: df 92 push r13 + 220: cf 92 push r12 + 222: ff 92 push r15 + 224: ef 92 push r14 + 226: 9f 93 push r25 + 228: 8f 93 push r24 + 22a: 1f 93 push r17 + 22c: 0f 93 push r16 + 22e: 79 d0 rcall .+242 ; 0x322 + lcd_write_string(str); + 230: 80 2f mov r24, r16 + 232: 91 2f mov r25, r17 + 234: b4 df rcall .-152 ; 0x19e +} + 236: 8d b7 in r24, 0x3d ; 61 + 238: 9e b7 in r25, 0x3e ; 62 + 23a: 08 96 adiw r24, 0x08 ; 8 + 23c: 0f b6 in r0, 0x3f ; 63 + 23e: f8 94 cli + 240: 9e bf out 0x3e, r25 ; 62 + 242: 0f be out 0x3f, r0 ; 63 + 244: 8d bf out 0x3d, r24 ; 61 + 246: 0f b6 in r0, 0x3f ; 63 + 248: f8 94 cli + 24a: be be out 0x3e, r11 ; 62 + 24c: 0f be out 0x3f, r0 ; 63 + 24e: ad be out 0x3d, r10 ; 61 + 250: df 91 pop r29 + 252: cf 91 pop r28 + 254: 1f 91 pop r17 + 256: 0f 91 pop r16 + 258: ff 90 pop r15 + 25a: ef 90 pop r14 + 25c: df 90 pop r13 + 25e: cf 90 pop r12 + 260: bf 90 pop r11 + 262: af 90 pop r10 + 264: 08 95 ret + +00000266 : +#include +#include "lcd_control.h" +#define BIT(x) (1 << (x)) + +void wait( int ms ) { + for (int tms=0; tms + 26c: ef ec ldi r30, 0xCF ; 207 + 26e: f7 e0 ldi r31, 0x07 ; 7 + 270: 31 97 sbiw r30, 0x01 ; 1 + 272: f1 f7 brne .-4 ; 0x270 + 274: 00 c0 rjmp .+0 ; 0x276 + 276: 00 00 nop + 278: 2f 5f subi r18, 0xFF ; 255 + 27a: 3f 4f sbci r19, 0xFF ; 255 + 27c: 28 17 cp r18, r24 + 27e: 39 07 cpc r19, r25 + 280: ac f3 brlt .-22 ; 0x26c + _delay_ms( 1 ); // library function (max 30 ms at 8MHz) + } +} + 282: 08 95 ret + +00000284 : + +void adcInit(){ + ADMUX = 0b11100000; // internal reference: 2.56V and SEI on ADC0 and left-adjusted. + 284: 80 ee ldi r24, 0xE0 ; 224 + 286: 87 b9 out 0x07, r24 ; 7 + ADCSRA = 0b10000110; // enable ADC. No free-run. Clock 64 D-factor. + 288: 86 e8 ldi r24, 0x86 ; 134 + 28a: 86 b9 out 0x06, r24 ; 6 + 28c: 08 95 ret + +0000028e : +} + +void timer2Init( void ) { + TIMSK |= BIT(7); // T2 compare match interrupt enable + 28e: 87 b7 in r24, 0x37 ; 55 + 290: 80 68 ori r24, 0x80 ; 128 + 292: 87 bf out 0x37, r24 ; 55 + sei(); // turn_on interrupt all + 294: 78 94 sei + TCCR2 = 0b00000011; // Initialize T2: timer, pre-scaler=64 + 296: 83 e0 ldi r24, 0x03 ; 3 + 298: 85 bd out 0x25, r24 ; 37 + 29a: 08 95 ret + +0000029c <__vector_9>: +} + +ISR( TIMER2_COMP_vect ) { + 29c: 1f 92 push r1 + 29e: 0f 92 push r0 + 2a0: 0f b6 in r0, 0x3f ; 63 + 2a2: 0f 92 push r0 + 2a4: 11 24 eor r1, r1 + 2a6: 8f 93 push r24 + ADCSRA |= BIT(6); + 2a8: 86 b1 in r24, 0x06 ; 6 + 2aa: 80 64 ori r24, 0x40 ; 64 + 2ac: 86 b9 out 0x06, r24 ; 6 +} + 2ae: 8f 91 pop r24 + 2b0: 0f 90 pop r0 + 2b2: 0f be out 0x3f, r0 ; 63 + 2b4: 0f 90 pop r0 + 2b6: 1f 90 pop r1 + 2b8: 18 95 reti + +000002ba : + +int getADCValue(){ + int value = 0; + value = ADCH; + 2ba: 85 b1 in r24, 0x05 ; 5 + 2bc: 90 e0 ldi r25, 0x00 ; 0 + value <<= 2; + 2be: 88 0f add r24, r24 + 2c0: 99 1f adc r25, r25 + 2c2: 88 0f add r24, r24 + 2c4: 99 1f adc r25, r25 + value += (ADCL >> 6); + 2c6: 24 b1 in r18, 0x04 ; 4 + 2c8: 22 95 swap r18 + 2ca: 26 95 lsr r18 + 2cc: 26 95 lsr r18 + 2ce: 23 70 andi r18, 0x03 ; 3 + return value; +} + 2d0: 82 0f add r24, r18 + 2d2: 91 1d adc r25, r1 + 2d4: 08 95 ret + +000002d6
: + +int main(void) +{ + int previousValue = 0; + /* Replace with your application code */ + DDRF = 0x00; // set port F input. + 2d6: 10 92 61 00 sts 0x0061, r1 ; 0x800061 <__TEXT_REGION_LENGTH__+0x7e0061> + DDRE = 0xFF; // all port A output. + 2da: 8f ef ldi r24, 0xFF ; 255 + 2dc: 82 b9 out 0x02, r24 ; 2 + adcInit(); + 2de: d2 df rcall .-92 ; 0x284 + + init_4bits_mode(); + 2e0: 40 df rcall .-384 ; 0x162 + 2e2: 8f e1 ldi r24, 0x1F ; 31 + 2e4: 9e e4 ldi r25, 0x4E ; 78 + 2e6: 01 97 sbiw r24, 0x01 ; 1 + 2e8: f1 f7 brne .-4 ; 0x2e6 + 2ea: 00 c0 rjmp .+0 ; 0x2ec + 2ec: 00 00 nop + _delay_ms(10); + lcd_clear(); + 2ee: 2e df rcall .-420 ; 0x14c + 2f0: ce df rcall .-100 ; 0x28e + + timer2Init(); + 2f2: 80 e0 ldi r24, 0x00 ; 0 + 2f4: 90 e0 ldi r25, 0x00 ; 0 + + + +int main(void) +{ + int previousValue = 0; + 2f6: 25 b1 in r18, 0x05 ; 5 + 2f8: 22 bb out 0x12, r18 ; 18 + lcd_clear(); + + timer2Init(); + while (1) + { + PORTD = ADCH; + 2fa: 24 b1 in r18, 0x04 ; 4 + 2fc: 23 b9 out 0x03, r18 ; 3 + PORTE = ADCL; + 2fe: c5 b1 in r28, 0x05 ; 5 + 300: d0 e0 ldi r29, 0x00 ; 0 + + int number = ADCH; + 302: 8c 17 cp r24, r28 + + if(previousValue != number){ + 304: 9d 07 cpc r25, r29 + 306: 41 f0 breq .+16 ; 0x318 + + lcd_clear(); + 308: 21 df rcall .-446 ; 0x14c + + wait(10); + 30a: 8a e0 ldi r24, 0x0A ; 10 + 30c: 90 e0 ldi r25, 0x00 ; 0 + 30e: ab df rcall .-170 ; 0x266 + + lcd_write_integer((getADCValue() >> 1)); + 310: d4 df rcall .-88 ; 0x2ba + 312: 95 95 asr r25 + 314: 87 95 ror r24 + 316: 4f df rcall .-354 ; 0x1b6 + 318: 84 e6 ldi r24, 0x64 ; 100 + } + + previousValue = number; + + wait(100); + 31a: 90 e0 ldi r25, 0x00 ; 0 + 31c: a4 df rcall .-184 ; 0x266 + 31e: ce 01 movw r24, r28 + 320: ea cf rjmp .-44 ; 0x2f6 + +00000322 : + wait(10); + + lcd_write_integer((getADCValue() >> 1)); + } + + previousValue = number; + 322: 0f 93 push r16 + + wait(100); + } + 324: 1f 93 push r17 + 326: cf 93 push r28 + 328: df 93 push r29 + 32a: cd b7 in r28, 0x3d ; 61 + 32c: de b7 in r29, 0x3e ; 62 + 32e: 2e 97 sbiw r28, 0x0e ; 14 + 330: 0f b6 in r0, 0x3f ; 63 + 332: f8 94 cli + 334: de bf out 0x3e, r29 ; 62 + 336: 0f be out 0x3f, r0 ; 63 + 338: cd bf out 0x3d, r28 ; 61 + 33a: 0d 89 ldd r16, Y+21 ; 0x15 + 33c: 1e 89 ldd r17, Y+22 ; 0x16 + 33e: 8f 89 ldd r24, Y+23 ; 0x17 + 340: 98 8d ldd r25, Y+24 ; 0x18 + 342: 26 e0 ldi r18, 0x06 ; 6 + 344: 2c 83 std Y+4, r18 ; 0x04 + 346: 1a 83 std Y+2, r17 ; 0x02 + 348: 09 83 std Y+1, r16 ; 0x01 + 34a: 97 ff sbrs r25, 7 + 34c: 02 c0 rjmp .+4 ; 0x352 + 34e: 80 e0 ldi r24, 0x00 ; 0 + 350: 90 e8 ldi r25, 0x80 ; 128 + 352: 01 97 sbiw r24, 0x01 ; 1 + 354: 9e 83 std Y+6, r25 ; 0x06 + 356: 8d 83 std Y+5, r24 ; 0x05 + 358: ae 01 movw r20, r28 + 35a: 45 5e subi r20, 0xE5 ; 229 + 35c: 5f 4f sbci r21, 0xFF ; 255 + 35e: 69 8d ldd r22, Y+25 ; 0x19 + 360: 7a 8d ldd r23, Y+26 ; 0x1a + 362: ce 01 movw r24, r28 + 364: 01 96 adiw r24, 0x01 ; 1 + 366: 19 d0 rcall .+50 ; 0x39a + 368: 4d 81 ldd r20, Y+5 ; 0x05 + 36a: 5e 81 ldd r21, Y+6 ; 0x06 + 36c: 57 fd sbrc r21, 7 + 36e: 0a c0 rjmp .+20 ; 0x384 + 370: 2f 81 ldd r18, Y+7 ; 0x07 + 372: 38 85 ldd r19, Y+8 ; 0x08 + 374: 42 17 cp r20, r18 + 376: 53 07 cpc r21, r19 + 378: 0c f4 brge .+2 ; 0x37c + 37a: 9a 01 movw r18, r20 + 37c: f8 01 movw r30, r16 + 37e: e2 0f add r30, r18 + 380: f3 1f adc r31, r19 + 382: 10 82 st Z, r1 + 384: 2e 96 adiw r28, 0x0e ; 14 + 386: 0f b6 in r0, 0x3f ; 63 + 388: f8 94 cli + 38a: de bf out 0x3e, r29 ; 62 + 38c: 0f be out 0x3f, r0 ; 63 + 38e: cd bf out 0x3d, r28 ; 61 + 390: df 91 pop r29 + 392: cf 91 pop r28 + 394: 1f 91 pop r17 + 396: 0f 91 pop r16 + 398: 08 95 ret + +0000039a : + 39a: 2f 92 push r2 + 39c: 3f 92 push r3 + 39e: 4f 92 push r4 + 3a0: 5f 92 push r5 + 3a2: 6f 92 push r6 + 3a4: 7f 92 push r7 + 3a6: 8f 92 push r8 + 3a8: 9f 92 push r9 + 3aa: af 92 push r10 + 3ac: bf 92 push r11 + 3ae: cf 92 push r12 + 3b0: df 92 push r13 + 3b2: ef 92 push r14 + 3b4: ff 92 push r15 + 3b6: 0f 93 push r16 + 3b8: 1f 93 push r17 + 3ba: cf 93 push r28 + 3bc: df 93 push r29 + 3be: cd b7 in r28, 0x3d ; 61 + 3c0: de b7 in r29, 0x3e ; 62 + 3c2: 2b 97 sbiw r28, 0x0b ; 11 + 3c4: 0f b6 in r0, 0x3f ; 63 + 3c6: f8 94 cli + 3c8: de bf out 0x3e, r29 ; 62 + 3ca: 0f be out 0x3f, r0 ; 63 + 3cc: cd bf out 0x3d, r28 ; 61 + 3ce: 6c 01 movw r12, r24 + 3d0: 7b 01 movw r14, r22 + 3d2: 8a 01 movw r16, r20 + 3d4: fc 01 movw r30, r24 + 3d6: 17 82 std Z+7, r1 ; 0x07 + 3d8: 16 82 std Z+6, r1 ; 0x06 + 3da: 83 81 ldd r24, Z+3 ; 0x03 + 3dc: 81 ff sbrs r24, 1 + 3de: bf c1 rjmp .+894 ; 0x75e <__LOCK_REGION_LENGTH__+0x35e> + 3e0: ce 01 movw r24, r28 + 3e2: 01 96 adiw r24, 0x01 ; 1 + 3e4: 3c 01 movw r6, r24 + 3e6: f6 01 movw r30, r12 + 3e8: 93 81 ldd r25, Z+3 ; 0x03 + 3ea: f7 01 movw r30, r14 + 3ec: 93 fd sbrc r25, 3 + 3ee: 85 91 lpm r24, Z+ + 3f0: 93 ff sbrs r25, 3 + 3f2: 81 91 ld r24, Z+ + 3f4: 7f 01 movw r14, r30 + 3f6: 88 23 and r24, r24 + 3f8: 09 f4 brne .+2 ; 0x3fc + 3fa: ad c1 rjmp .+858 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> + 3fc: 85 32 cpi r24, 0x25 ; 37 + 3fe: 39 f4 brne .+14 ; 0x40e <__LOCK_REGION_LENGTH__+0xe> + 400: 93 fd sbrc r25, 3 + 402: 85 91 lpm r24, Z+ + 404: 93 ff sbrs r25, 3 + 406: 81 91 ld r24, Z+ + 408: 7f 01 movw r14, r30 + 40a: 85 32 cpi r24, 0x25 ; 37 + 40c: 21 f4 brne .+8 ; 0x416 <__LOCK_REGION_LENGTH__+0x16> + 40e: b6 01 movw r22, r12 + 410: 90 e0 ldi r25, 0x00 ; 0 + 412: d6 d1 rcall .+940 ; 0x7c0 + 414: e8 cf rjmp .-48 ; 0x3e6 + 416: 91 2c mov r9, r1 + 418: 21 2c mov r2, r1 + 41a: 31 2c mov r3, r1 + 41c: ff e1 ldi r31, 0x1F ; 31 + 41e: f3 15 cp r31, r3 + 420: d8 f0 brcs .+54 ; 0x458 <__LOCK_REGION_LENGTH__+0x58> + 422: 8b 32 cpi r24, 0x2B ; 43 + 424: 79 f0 breq .+30 ; 0x444 <__LOCK_REGION_LENGTH__+0x44> + 426: 38 f4 brcc .+14 ; 0x436 <__LOCK_REGION_LENGTH__+0x36> + 428: 80 32 cpi r24, 0x20 ; 32 + 42a: 79 f0 breq .+30 ; 0x44a <__LOCK_REGION_LENGTH__+0x4a> + 42c: 83 32 cpi r24, 0x23 ; 35 + 42e: a1 f4 brne .+40 ; 0x458 <__LOCK_REGION_LENGTH__+0x58> + 430: 23 2d mov r18, r3 + 432: 20 61 ori r18, 0x10 ; 16 + 434: 1d c0 rjmp .+58 ; 0x470 <__LOCK_REGION_LENGTH__+0x70> + 436: 8d 32 cpi r24, 0x2D ; 45 + 438: 61 f0 breq .+24 ; 0x452 <__LOCK_REGION_LENGTH__+0x52> + 43a: 80 33 cpi r24, 0x30 ; 48 + 43c: 69 f4 brne .+26 ; 0x458 <__LOCK_REGION_LENGTH__+0x58> + 43e: 23 2d mov r18, r3 + 440: 21 60 ori r18, 0x01 ; 1 + 442: 16 c0 rjmp .+44 ; 0x470 <__LOCK_REGION_LENGTH__+0x70> + 444: 83 2d mov r24, r3 + 446: 82 60 ori r24, 0x02 ; 2 + 448: 38 2e mov r3, r24 + 44a: e3 2d mov r30, r3 + 44c: e4 60 ori r30, 0x04 ; 4 + 44e: 3e 2e mov r3, r30 + 450: 2a c0 rjmp .+84 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> + 452: f3 2d mov r31, r3 + 454: f8 60 ori r31, 0x08 ; 8 + 456: 1d c0 rjmp .+58 ; 0x492 <__LOCK_REGION_LENGTH__+0x92> + 458: 37 fc sbrc r3, 7 + 45a: 2d c0 rjmp .+90 ; 0x4b6 <__LOCK_REGION_LENGTH__+0xb6> + 45c: 20 ed ldi r18, 0xD0 ; 208 + 45e: 28 0f add r18, r24 + 460: 2a 30 cpi r18, 0x0A ; 10 + 462: 40 f0 brcs .+16 ; 0x474 <__LOCK_REGION_LENGTH__+0x74> + 464: 8e 32 cpi r24, 0x2E ; 46 + 466: b9 f4 brne .+46 ; 0x496 <__LOCK_REGION_LENGTH__+0x96> + 468: 36 fc sbrc r3, 6 + 46a: 75 c1 rjmp .+746 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> + 46c: 23 2d mov r18, r3 + 46e: 20 64 ori r18, 0x40 ; 64 + 470: 32 2e mov r3, r18 + 472: 19 c0 rjmp .+50 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> + 474: 36 fe sbrs r3, 6 + 476: 06 c0 rjmp .+12 ; 0x484 <__LOCK_REGION_LENGTH__+0x84> + 478: 8a e0 ldi r24, 0x0A ; 10 + 47a: 98 9e mul r9, r24 + 47c: 20 0d add r18, r0 + 47e: 11 24 eor r1, r1 + 480: 92 2e mov r9, r18 + 482: 11 c0 rjmp .+34 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> + 484: ea e0 ldi r30, 0x0A ; 10 + 486: 2e 9e mul r2, r30 + 488: 20 0d add r18, r0 + 48a: 11 24 eor r1, r1 + 48c: 22 2e mov r2, r18 + 48e: f3 2d mov r31, r3 + 490: f0 62 ori r31, 0x20 ; 32 + 492: 3f 2e mov r3, r31 + 494: 08 c0 rjmp .+16 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> + 496: 8c 36 cpi r24, 0x6C ; 108 + 498: 21 f4 brne .+8 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> + 49a: 83 2d mov r24, r3 + 49c: 80 68 ori r24, 0x80 ; 128 + 49e: 38 2e mov r3, r24 + 4a0: 02 c0 rjmp .+4 ; 0x4a6 <__LOCK_REGION_LENGTH__+0xa6> + 4a2: 88 36 cpi r24, 0x68 ; 104 + 4a4: 41 f4 brne .+16 ; 0x4b6 <__LOCK_REGION_LENGTH__+0xb6> + 4a6: f7 01 movw r30, r14 + 4a8: 93 fd sbrc r25, 3 + 4aa: 85 91 lpm r24, Z+ + 4ac: 93 ff sbrs r25, 3 + 4ae: 81 91 ld r24, Z+ + 4b0: 7f 01 movw r14, r30 + 4b2: 81 11 cpse r24, r1 + 4b4: b3 cf rjmp .-154 ; 0x41c <__LOCK_REGION_LENGTH__+0x1c> + 4b6: 98 2f mov r25, r24 + 4b8: 9f 7d andi r25, 0xDF ; 223 + 4ba: 95 54 subi r25, 0x45 ; 69 + 4bc: 93 30 cpi r25, 0x03 ; 3 + 4be: 28 f4 brcc .+10 ; 0x4ca <__LOCK_REGION_LENGTH__+0xca> + 4c0: 0c 5f subi r16, 0xFC ; 252 + 4c2: 1f 4f sbci r17, 0xFF ; 255 + 4c4: 9f e3 ldi r25, 0x3F ; 63 + 4c6: 99 83 std Y+1, r25 ; 0x01 + 4c8: 0d c0 rjmp .+26 ; 0x4e4 <__LOCK_REGION_LENGTH__+0xe4> + 4ca: 83 36 cpi r24, 0x63 ; 99 + 4cc: 31 f0 breq .+12 ; 0x4da <__LOCK_REGION_LENGTH__+0xda> + 4ce: 83 37 cpi r24, 0x73 ; 115 + 4d0: 71 f0 breq .+28 ; 0x4ee <__LOCK_REGION_LENGTH__+0xee> + 4d2: 83 35 cpi r24, 0x53 ; 83 + 4d4: 09 f0 breq .+2 ; 0x4d8 <__LOCK_REGION_LENGTH__+0xd8> + 4d6: 55 c0 rjmp .+170 ; 0x582 <__LOCK_REGION_LENGTH__+0x182> + 4d8: 20 c0 rjmp .+64 ; 0x51a <__LOCK_REGION_LENGTH__+0x11a> + 4da: f8 01 movw r30, r16 + 4dc: 80 81 ld r24, Z + 4de: 89 83 std Y+1, r24 ; 0x01 + 4e0: 0e 5f subi r16, 0xFE ; 254 + 4e2: 1f 4f sbci r17, 0xFF ; 255 + 4e4: 88 24 eor r8, r8 + 4e6: 83 94 inc r8 + 4e8: 91 2c mov r9, r1 + 4ea: 53 01 movw r10, r6 + 4ec: 12 c0 rjmp .+36 ; 0x512 <__LOCK_REGION_LENGTH__+0x112> + 4ee: 28 01 movw r4, r16 + 4f0: f2 e0 ldi r31, 0x02 ; 2 + 4f2: 4f 0e add r4, r31 + 4f4: 51 1c adc r5, r1 + 4f6: f8 01 movw r30, r16 + 4f8: a0 80 ld r10, Z + 4fa: b1 80 ldd r11, Z+1 ; 0x01 + 4fc: 36 fe sbrs r3, 6 + 4fe: 03 c0 rjmp .+6 ; 0x506 <__LOCK_REGION_LENGTH__+0x106> + 500: 69 2d mov r22, r9 + 502: 70 e0 ldi r23, 0x00 ; 0 + 504: 02 c0 rjmp .+4 ; 0x50a <__LOCK_REGION_LENGTH__+0x10a> + 506: 6f ef ldi r22, 0xFF ; 255 + 508: 7f ef ldi r23, 0xFF ; 255 + 50a: c5 01 movw r24, r10 + 50c: 4e d1 rcall .+668 ; 0x7aa + 50e: 4c 01 movw r8, r24 + 510: 82 01 movw r16, r4 + 512: f3 2d mov r31, r3 + 514: ff 77 andi r31, 0x7F ; 127 + 516: 3f 2e mov r3, r31 + 518: 15 c0 rjmp .+42 ; 0x544 <__LOCK_REGION_LENGTH__+0x144> + 51a: 28 01 movw r4, r16 + 51c: 22 e0 ldi r18, 0x02 ; 2 + 51e: 42 0e add r4, r18 + 520: 51 1c adc r5, r1 + 522: f8 01 movw r30, r16 + 524: a0 80 ld r10, Z + 526: b1 80 ldd r11, Z+1 ; 0x01 + 528: 36 fe sbrs r3, 6 + 52a: 03 c0 rjmp .+6 ; 0x532 <__LOCK_REGION_LENGTH__+0x132> + 52c: 69 2d mov r22, r9 + 52e: 70 e0 ldi r23, 0x00 ; 0 + 530: 02 c0 rjmp .+4 ; 0x536 <__LOCK_REGION_LENGTH__+0x136> + 532: 6f ef ldi r22, 0xFF ; 255 + 534: 7f ef ldi r23, 0xFF ; 255 + 536: c5 01 movw r24, r10 + 538: 2d d1 rcall .+602 ; 0x794 + 53a: 4c 01 movw r8, r24 + 53c: f3 2d mov r31, r3 + 53e: f0 68 ori r31, 0x80 ; 128 + 540: 3f 2e mov r3, r31 + 542: 82 01 movw r16, r4 + 544: 33 fc sbrc r3, 3 + 546: 19 c0 rjmp .+50 ; 0x57a <__LOCK_REGION_LENGTH__+0x17a> + 548: 82 2d mov r24, r2 + 54a: 90 e0 ldi r25, 0x00 ; 0 + 54c: 88 16 cp r8, r24 + 54e: 99 06 cpc r9, r25 + 550: a0 f4 brcc .+40 ; 0x57a <__LOCK_REGION_LENGTH__+0x17a> + 552: b6 01 movw r22, r12 + 554: 80 e2 ldi r24, 0x20 ; 32 + 556: 90 e0 ldi r25, 0x00 ; 0 + 558: 33 d1 rcall .+614 ; 0x7c0 + 55a: 2a 94 dec r2 + 55c: f5 cf rjmp .-22 ; 0x548 <__LOCK_REGION_LENGTH__+0x148> + 55e: f5 01 movw r30, r10 + 560: 37 fc sbrc r3, 7 + 562: 85 91 lpm r24, Z+ + 564: 37 fe sbrs r3, 7 + 566: 81 91 ld r24, Z+ + 568: 5f 01 movw r10, r30 + 56a: b6 01 movw r22, r12 + 56c: 90 e0 ldi r25, 0x00 ; 0 + 56e: 28 d1 rcall .+592 ; 0x7c0 + 570: 21 10 cpse r2, r1 + 572: 2a 94 dec r2 + 574: 21 e0 ldi r18, 0x01 ; 1 + 576: 82 1a sub r8, r18 + 578: 91 08 sbc r9, r1 + 57a: 81 14 cp r8, r1 + 57c: 91 04 cpc r9, r1 + 57e: 79 f7 brne .-34 ; 0x55e <__LOCK_REGION_LENGTH__+0x15e> + 580: e1 c0 rjmp .+450 ; 0x744 <__LOCK_REGION_LENGTH__+0x344> + 582: 84 36 cpi r24, 0x64 ; 100 + 584: 11 f0 breq .+4 ; 0x58a <__LOCK_REGION_LENGTH__+0x18a> + 586: 89 36 cpi r24, 0x69 ; 105 + 588: 39 f5 brne .+78 ; 0x5d8 <__LOCK_REGION_LENGTH__+0x1d8> + 58a: f8 01 movw r30, r16 + 58c: 37 fe sbrs r3, 7 + 58e: 07 c0 rjmp .+14 ; 0x59e <__LOCK_REGION_LENGTH__+0x19e> + 590: 60 81 ld r22, Z + 592: 71 81 ldd r23, Z+1 ; 0x01 + 594: 82 81 ldd r24, Z+2 ; 0x02 + 596: 93 81 ldd r25, Z+3 ; 0x03 + 598: 0c 5f subi r16, 0xFC ; 252 + 59a: 1f 4f sbci r17, 0xFF ; 255 + 59c: 08 c0 rjmp .+16 ; 0x5ae <__LOCK_REGION_LENGTH__+0x1ae> + 59e: 60 81 ld r22, Z + 5a0: 71 81 ldd r23, Z+1 ; 0x01 + 5a2: 07 2e mov r0, r23 + 5a4: 00 0c add r0, r0 + 5a6: 88 0b sbc r24, r24 + 5a8: 99 0b sbc r25, r25 + 5aa: 0e 5f subi r16, 0xFE ; 254 + 5ac: 1f 4f sbci r17, 0xFF ; 255 + 5ae: f3 2d mov r31, r3 + 5b0: ff 76 andi r31, 0x6F ; 111 + 5b2: 3f 2e mov r3, r31 + 5b4: 97 ff sbrs r25, 7 + 5b6: 09 c0 rjmp .+18 ; 0x5ca <__LOCK_REGION_LENGTH__+0x1ca> + 5b8: 90 95 com r25 + 5ba: 80 95 com r24 + 5bc: 70 95 com r23 + 5be: 61 95 neg r22 + 5c0: 7f 4f sbci r23, 0xFF ; 255 + 5c2: 8f 4f sbci r24, 0xFF ; 255 + 5c4: 9f 4f sbci r25, 0xFF ; 255 + 5c6: f0 68 ori r31, 0x80 ; 128 + 5c8: 3f 2e mov r3, r31 + 5ca: 2a e0 ldi r18, 0x0A ; 10 + 5cc: 30 e0 ldi r19, 0x00 ; 0 + 5ce: a3 01 movw r20, r6 + 5d0: 33 d1 rcall .+614 ; 0x838 <__ultoa_invert> + 5d2: 88 2e mov r8, r24 + 5d4: 86 18 sub r8, r6 + 5d6: 44 c0 rjmp .+136 ; 0x660 <__LOCK_REGION_LENGTH__+0x260> + 5d8: 85 37 cpi r24, 0x75 ; 117 + 5da: 31 f4 brne .+12 ; 0x5e8 <__LOCK_REGION_LENGTH__+0x1e8> + 5dc: 23 2d mov r18, r3 + 5de: 2f 7e andi r18, 0xEF ; 239 + 5e0: b2 2e mov r11, r18 + 5e2: 2a e0 ldi r18, 0x0A ; 10 + 5e4: 30 e0 ldi r19, 0x00 ; 0 + 5e6: 25 c0 rjmp .+74 ; 0x632 <__LOCK_REGION_LENGTH__+0x232> + 5e8: 93 2d mov r25, r3 + 5ea: 99 7f andi r25, 0xF9 ; 249 + 5ec: b9 2e mov r11, r25 + 5ee: 8f 36 cpi r24, 0x6F ; 111 + 5f0: c1 f0 breq .+48 ; 0x622 <__LOCK_REGION_LENGTH__+0x222> + 5f2: 18 f4 brcc .+6 ; 0x5fa <__LOCK_REGION_LENGTH__+0x1fa> + 5f4: 88 35 cpi r24, 0x58 ; 88 + 5f6: 79 f0 breq .+30 ; 0x616 <__LOCK_REGION_LENGTH__+0x216> + 5f8: ae c0 rjmp .+348 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> + 5fa: 80 37 cpi r24, 0x70 ; 112 + 5fc: 19 f0 breq .+6 ; 0x604 <__LOCK_REGION_LENGTH__+0x204> + 5fe: 88 37 cpi r24, 0x78 ; 120 + 600: 21 f0 breq .+8 ; 0x60a <__LOCK_REGION_LENGTH__+0x20a> + 602: a9 c0 rjmp .+338 ; 0x756 <__LOCK_REGION_LENGTH__+0x356> + 604: e9 2f mov r30, r25 + 606: e0 61 ori r30, 0x10 ; 16 + 608: be 2e mov r11, r30 + 60a: b4 fe sbrs r11, 4 + 60c: 0d c0 rjmp .+26 ; 0x628 <__LOCK_REGION_LENGTH__+0x228> + 60e: fb 2d mov r31, r11 + 610: f4 60 ori r31, 0x04 ; 4 + 612: bf 2e mov r11, r31 + 614: 09 c0 rjmp .+18 ; 0x628 <__LOCK_REGION_LENGTH__+0x228> + 616: 34 fe sbrs r3, 4 + 618: 0a c0 rjmp .+20 ; 0x62e <__LOCK_REGION_LENGTH__+0x22e> + 61a: 29 2f mov r18, r25 + 61c: 26 60 ori r18, 0x06 ; 6 + 61e: b2 2e mov r11, r18 + 620: 06 c0 rjmp .+12 ; 0x62e <__LOCK_REGION_LENGTH__+0x22e> + 622: 28 e0 ldi r18, 0x08 ; 8 + 624: 30 e0 ldi r19, 0x00 ; 0 + 626: 05 c0 rjmp .+10 ; 0x632 <__LOCK_REGION_LENGTH__+0x232> + 628: 20 e1 ldi r18, 0x10 ; 16 + 62a: 30 e0 ldi r19, 0x00 ; 0 + 62c: 02 c0 rjmp .+4 ; 0x632 <__LOCK_REGION_LENGTH__+0x232> + 62e: 20 e1 ldi r18, 0x10 ; 16 + 630: 32 e0 ldi r19, 0x02 ; 2 + 632: f8 01 movw r30, r16 + 634: b7 fe sbrs r11, 7 + 636: 07 c0 rjmp .+14 ; 0x646 <__LOCK_REGION_LENGTH__+0x246> + 638: 60 81 ld r22, Z + 63a: 71 81 ldd r23, Z+1 ; 0x01 + 63c: 82 81 ldd r24, Z+2 ; 0x02 + 63e: 93 81 ldd r25, Z+3 ; 0x03 + 640: 0c 5f subi r16, 0xFC ; 252 + 642: 1f 4f sbci r17, 0xFF ; 255 + 644: 06 c0 rjmp .+12 ; 0x652 <__LOCK_REGION_LENGTH__+0x252> + 646: 60 81 ld r22, Z + 648: 71 81 ldd r23, Z+1 ; 0x01 + 64a: 80 e0 ldi r24, 0x00 ; 0 + 64c: 90 e0 ldi r25, 0x00 ; 0 + 64e: 0e 5f subi r16, 0xFE ; 254 + 650: 1f 4f sbci r17, 0xFF ; 255 + 652: a3 01 movw r20, r6 + 654: f1 d0 rcall .+482 ; 0x838 <__ultoa_invert> + 656: 88 2e mov r8, r24 + 658: 86 18 sub r8, r6 + 65a: fb 2d mov r31, r11 + 65c: ff 77 andi r31, 0x7F ; 127 + 65e: 3f 2e mov r3, r31 + 660: 36 fe sbrs r3, 6 + 662: 0d c0 rjmp .+26 ; 0x67e <__LOCK_REGION_LENGTH__+0x27e> + 664: 23 2d mov r18, r3 + 666: 2e 7f andi r18, 0xFE ; 254 + 668: a2 2e mov r10, r18 + 66a: 89 14 cp r8, r9 + 66c: 58 f4 brcc .+22 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 66e: 34 fe sbrs r3, 4 + 670: 0b c0 rjmp .+22 ; 0x688 <__LOCK_REGION_LENGTH__+0x288> + 672: 32 fc sbrc r3, 2 + 674: 09 c0 rjmp .+18 ; 0x688 <__LOCK_REGION_LENGTH__+0x288> + 676: 83 2d mov r24, r3 + 678: 8e 7e andi r24, 0xEE ; 238 + 67a: a8 2e mov r10, r24 + 67c: 05 c0 rjmp .+10 ; 0x688 <__LOCK_REGION_LENGTH__+0x288> + 67e: b8 2c mov r11, r8 + 680: a3 2c mov r10, r3 + 682: 03 c0 rjmp .+6 ; 0x68a <__LOCK_REGION_LENGTH__+0x28a> + 684: b8 2c mov r11, r8 + 686: 01 c0 rjmp .+2 ; 0x68a <__LOCK_REGION_LENGTH__+0x28a> + 688: b9 2c mov r11, r9 + 68a: a4 fe sbrs r10, 4 + 68c: 0f c0 rjmp .+30 ; 0x6ac <__LOCK_REGION_LENGTH__+0x2ac> + 68e: fe 01 movw r30, r28 + 690: e8 0d add r30, r8 + 692: f1 1d adc r31, r1 + 694: 80 81 ld r24, Z + 696: 80 33 cpi r24, 0x30 ; 48 + 698: 21 f4 brne .+8 ; 0x6a2 <__LOCK_REGION_LENGTH__+0x2a2> + 69a: 9a 2d mov r25, r10 + 69c: 99 7e andi r25, 0xE9 ; 233 + 69e: a9 2e mov r10, r25 + 6a0: 09 c0 rjmp .+18 ; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4> + 6a2: a2 fe sbrs r10, 2 + 6a4: 06 c0 rjmp .+12 ; 0x6b2 <__LOCK_REGION_LENGTH__+0x2b2> + 6a6: b3 94 inc r11 + 6a8: b3 94 inc r11 + 6aa: 04 c0 rjmp .+8 ; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4> + 6ac: 8a 2d mov r24, r10 + 6ae: 86 78 andi r24, 0x86 ; 134 + 6b0: 09 f0 breq .+2 ; 0x6b4 <__LOCK_REGION_LENGTH__+0x2b4> + 6b2: b3 94 inc r11 + 6b4: a3 fc sbrc r10, 3 + 6b6: 10 c0 rjmp .+32 ; 0x6d8 <__LOCK_REGION_LENGTH__+0x2d8> + 6b8: a0 fe sbrs r10, 0 + 6ba: 06 c0 rjmp .+12 ; 0x6c8 <__LOCK_REGION_LENGTH__+0x2c8> + 6bc: b2 14 cp r11, r2 + 6be: 80 f4 brcc .+32 ; 0x6e0 <__LOCK_REGION_LENGTH__+0x2e0> + 6c0: 28 0c add r2, r8 + 6c2: 92 2c mov r9, r2 + 6c4: 9b 18 sub r9, r11 + 6c6: 0d c0 rjmp .+26 ; 0x6e2 <__LOCK_REGION_LENGTH__+0x2e2> + 6c8: b2 14 cp r11, r2 + 6ca: 58 f4 brcc .+22 ; 0x6e2 <__LOCK_REGION_LENGTH__+0x2e2> + 6cc: b6 01 movw r22, r12 + 6ce: 80 e2 ldi r24, 0x20 ; 32 + 6d0: 90 e0 ldi r25, 0x00 ; 0 + 6d2: 76 d0 rcall .+236 ; 0x7c0 + 6d4: b3 94 inc r11 + 6d6: f8 cf rjmp .-16 ; 0x6c8 <__LOCK_REGION_LENGTH__+0x2c8> + 6d8: b2 14 cp r11, r2 + 6da: 18 f4 brcc .+6 ; 0x6e2 <__LOCK_REGION_LENGTH__+0x2e2> + 6dc: 2b 18 sub r2, r11 + 6de: 02 c0 rjmp .+4 ; 0x6e4 <__LOCK_REGION_LENGTH__+0x2e4> + 6e0: 98 2c mov r9, r8 + 6e2: 21 2c mov r2, r1 + 6e4: a4 fe sbrs r10, 4 + 6e6: 0f c0 rjmp .+30 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> + 6e8: b6 01 movw r22, r12 + 6ea: 80 e3 ldi r24, 0x30 ; 48 + 6ec: 90 e0 ldi r25, 0x00 ; 0 + 6ee: 68 d0 rcall .+208 ; 0x7c0 + 6f0: a2 fe sbrs r10, 2 + 6f2: 16 c0 rjmp .+44 ; 0x720 <__LOCK_REGION_LENGTH__+0x320> + 6f4: a1 fc sbrc r10, 1 + 6f6: 03 c0 rjmp .+6 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> + 6f8: 88 e7 ldi r24, 0x78 ; 120 + 6fa: 90 e0 ldi r25, 0x00 ; 0 + 6fc: 02 c0 rjmp .+4 ; 0x702 <__LOCK_REGION_LENGTH__+0x302> + 6fe: 88 e5 ldi r24, 0x58 ; 88 + 700: 90 e0 ldi r25, 0x00 ; 0 + 702: b6 01 movw r22, r12 + 704: 0c c0 rjmp .+24 ; 0x71e <__LOCK_REGION_LENGTH__+0x31e> + 706: 8a 2d mov r24, r10 + 708: 86 78 andi r24, 0x86 ; 134 + 70a: 51 f0 breq .+20 ; 0x720 <__LOCK_REGION_LENGTH__+0x320> + 70c: a1 fe sbrs r10, 1 + 70e: 02 c0 rjmp .+4 ; 0x714 <__LOCK_REGION_LENGTH__+0x314> + 710: 8b e2 ldi r24, 0x2B ; 43 + 712: 01 c0 rjmp .+2 ; 0x716 <__LOCK_REGION_LENGTH__+0x316> + 714: 80 e2 ldi r24, 0x20 ; 32 + 716: a7 fc sbrc r10, 7 + 718: 8d e2 ldi r24, 0x2D ; 45 + 71a: b6 01 movw r22, r12 + 71c: 90 e0 ldi r25, 0x00 ; 0 + 71e: 50 d0 rcall .+160 ; 0x7c0 + 720: 89 14 cp r8, r9 + 722: 30 f4 brcc .+12 ; 0x730 <__LOCK_REGION_LENGTH__+0x330> + 724: b6 01 movw r22, r12 + 726: 80 e3 ldi r24, 0x30 ; 48 + 728: 90 e0 ldi r25, 0x00 ; 0 + 72a: 4a d0 rcall .+148 ; 0x7c0 + 72c: 9a 94 dec r9 + 72e: f8 cf rjmp .-16 ; 0x720 <__LOCK_REGION_LENGTH__+0x320> + 730: 8a 94 dec r8 + 732: f3 01 movw r30, r6 + 734: e8 0d add r30, r8 + 736: f1 1d adc r31, r1 + 738: 80 81 ld r24, Z + 73a: b6 01 movw r22, r12 + 73c: 90 e0 ldi r25, 0x00 ; 0 + 73e: 40 d0 rcall .+128 ; 0x7c0 + 740: 81 10 cpse r8, r1 + 742: f6 cf rjmp .-20 ; 0x730 <__LOCK_REGION_LENGTH__+0x330> + 744: 22 20 and r2, r2 + 746: 09 f4 brne .+2 ; 0x74a <__LOCK_REGION_LENGTH__+0x34a> + 748: 4e ce rjmp .-868 ; 0x3e6 + 74a: b6 01 movw r22, r12 + 74c: 80 e2 ldi r24, 0x20 ; 32 + 74e: 90 e0 ldi r25, 0x00 ; 0 + 750: 37 d0 rcall .+110 ; 0x7c0 + 752: 2a 94 dec r2 + 754: f7 cf rjmp .-18 ; 0x744 <__LOCK_REGION_LENGTH__+0x344> + 756: f6 01 movw r30, r12 + 758: 86 81 ldd r24, Z+6 ; 0x06 + 75a: 97 81 ldd r25, Z+7 ; 0x07 + 75c: 02 c0 rjmp .+4 ; 0x762 <__LOCK_REGION_LENGTH__+0x362> + 75e: 8f ef ldi r24, 0xFF ; 255 + 760: 9f ef ldi r25, 0xFF ; 255 + 762: 2b 96 adiw r28, 0x0b ; 11 + 764: 0f b6 in r0, 0x3f ; 63 + 766: f8 94 cli + 768: de bf out 0x3e, r29 ; 62 + 76a: 0f be out 0x3f, r0 ; 63 + 76c: cd bf out 0x3d, r28 ; 61 + 76e: df 91 pop r29 + 770: cf 91 pop r28 + 772: 1f 91 pop r17 + 774: 0f 91 pop r16 + 776: ff 90 pop r15 + 778: ef 90 pop r14 + 77a: df 90 pop r13 + 77c: cf 90 pop r12 + 77e: bf 90 pop r11 + 780: af 90 pop r10 + 782: 9f 90 pop r9 + 784: 8f 90 pop r8 + 786: 7f 90 pop r7 + 788: 6f 90 pop r6 + 78a: 5f 90 pop r5 + 78c: 4f 90 pop r4 + 78e: 3f 90 pop r3 + 790: 2f 90 pop r2 + 792: 08 95 ret + +00000794 : + 794: fc 01 movw r30, r24 + 796: 05 90 lpm r0, Z+ + 798: 61 50 subi r22, 0x01 ; 1 + 79a: 70 40 sbci r23, 0x00 ; 0 + 79c: 01 10 cpse r0, r1 + 79e: d8 f7 brcc .-10 ; 0x796 + 7a0: 80 95 com r24 + 7a2: 90 95 com r25 + 7a4: 8e 0f add r24, r30 + 7a6: 9f 1f adc r25, r31 + 7a8: 08 95 ret + +000007aa : + 7aa: fc 01 movw r30, r24 + 7ac: 61 50 subi r22, 0x01 ; 1 + 7ae: 70 40 sbci r23, 0x00 ; 0 + 7b0: 01 90 ld r0, Z+ + 7b2: 01 10 cpse r0, r1 + 7b4: d8 f7 brcc .-10 ; 0x7ac + 7b6: 80 95 com r24 + 7b8: 90 95 com r25 + 7ba: 8e 0f add r24, r30 + 7bc: 9f 1f adc r25, r31 + 7be: 08 95 ret + +000007c0 : + 7c0: 0f 93 push r16 + 7c2: 1f 93 push r17 + 7c4: cf 93 push r28 + 7c6: df 93 push r29 + 7c8: fb 01 movw r30, r22 + 7ca: 23 81 ldd r18, Z+3 ; 0x03 + 7cc: 21 fd sbrc r18, 1 + 7ce: 03 c0 rjmp .+6 ; 0x7d6 + 7d0: 8f ef ldi r24, 0xFF ; 255 + 7d2: 9f ef ldi r25, 0xFF ; 255 + 7d4: 2c c0 rjmp .+88 ; 0x82e + 7d6: 22 ff sbrs r18, 2 + 7d8: 16 c0 rjmp .+44 ; 0x806 + 7da: 46 81 ldd r20, Z+6 ; 0x06 + 7dc: 57 81 ldd r21, Z+7 ; 0x07 + 7de: 24 81 ldd r18, Z+4 ; 0x04 + 7e0: 35 81 ldd r19, Z+5 ; 0x05 + 7e2: 42 17 cp r20, r18 + 7e4: 53 07 cpc r21, r19 + 7e6: 44 f4 brge .+16 ; 0x7f8 + 7e8: a0 81 ld r26, Z + 7ea: b1 81 ldd r27, Z+1 ; 0x01 + 7ec: 9d 01 movw r18, r26 + 7ee: 2f 5f subi r18, 0xFF ; 255 + 7f0: 3f 4f sbci r19, 0xFF ; 255 + 7f2: 31 83 std Z+1, r19 ; 0x01 + 7f4: 20 83 st Z, r18 + 7f6: 8c 93 st X, r24 + 7f8: 26 81 ldd r18, Z+6 ; 0x06 + 7fa: 37 81 ldd r19, Z+7 ; 0x07 + 7fc: 2f 5f subi r18, 0xFF ; 255 + 7fe: 3f 4f sbci r19, 0xFF ; 255 + 800: 37 83 std Z+7, r19 ; 0x07 + 802: 26 83 std Z+6, r18 ; 0x06 + 804: 14 c0 rjmp .+40 ; 0x82e + 806: 8b 01 movw r16, r22 + 808: ec 01 movw r28, r24 + 80a: fb 01 movw r30, r22 + 80c: 00 84 ldd r0, Z+8 ; 0x08 + 80e: f1 85 ldd r31, Z+9 ; 0x09 + 810: e0 2d mov r30, r0 + 812: 09 95 icall + 814: 89 2b or r24, r25 + 816: e1 f6 brne .-72 ; 0x7d0 + 818: d8 01 movw r26, r16 + 81a: 16 96 adiw r26, 0x06 ; 6 + 81c: 8d 91 ld r24, X+ + 81e: 9c 91 ld r25, X + 820: 17 97 sbiw r26, 0x07 ; 7 + 822: 01 96 adiw r24, 0x01 ; 1 + 824: 17 96 adiw r26, 0x07 ; 7 + 826: 9c 93 st X, r25 + 828: 8e 93 st -X, r24 + 82a: 16 97 sbiw r26, 0x06 ; 6 + 82c: ce 01 movw r24, r28 + 82e: df 91 pop r29 + 830: cf 91 pop r28 + 832: 1f 91 pop r17 + 834: 0f 91 pop r16 + 836: 08 95 ret + +00000838 <__ultoa_invert>: + 838: fa 01 movw r30, r20 + 83a: aa 27 eor r26, r26 + 83c: 28 30 cpi r18, 0x08 ; 8 + 83e: 51 f1 breq .+84 ; 0x894 <__ultoa_invert+0x5c> + 840: 20 31 cpi r18, 0x10 ; 16 + 842: 81 f1 breq .+96 ; 0x8a4 <__ultoa_invert+0x6c> + 844: e8 94 clt + 846: 6f 93 push r22 + 848: 6e 7f andi r22, 0xFE ; 254 + 84a: 6e 5f subi r22, 0xFE ; 254 + 84c: 7f 4f sbci r23, 0xFF ; 255 + 84e: 8f 4f sbci r24, 0xFF ; 255 + 850: 9f 4f sbci r25, 0xFF ; 255 + 852: af 4f sbci r26, 0xFF ; 255 + 854: b1 e0 ldi r27, 0x01 ; 1 + 856: 3e d0 rcall .+124 ; 0x8d4 <__ultoa_invert+0x9c> + 858: b4 e0 ldi r27, 0x04 ; 4 + 85a: 3c d0 rcall .+120 ; 0x8d4 <__ultoa_invert+0x9c> + 85c: 67 0f add r22, r23 + 85e: 78 1f adc r23, r24 + 860: 89 1f adc r24, r25 + 862: 9a 1f adc r25, r26 + 864: a1 1d adc r26, r1 + 866: 68 0f add r22, r24 + 868: 79 1f adc r23, r25 + 86a: 8a 1f adc r24, r26 + 86c: 91 1d adc r25, r1 + 86e: a1 1d adc r26, r1 + 870: 6a 0f add r22, r26 + 872: 71 1d adc r23, r1 + 874: 81 1d adc r24, r1 + 876: 91 1d adc r25, r1 + 878: a1 1d adc r26, r1 + 87a: 20 d0 rcall .+64 ; 0x8bc <__ultoa_invert+0x84> + 87c: 09 f4 brne .+2 ; 0x880 <__ultoa_invert+0x48> + 87e: 68 94 set + 880: 3f 91 pop r19 + 882: 2a e0 ldi r18, 0x0A ; 10 + 884: 26 9f mul r18, r22 + 886: 11 24 eor r1, r1 + 888: 30 19 sub r19, r0 + 88a: 30 5d subi r19, 0xD0 ; 208 + 88c: 31 93 st Z+, r19 + 88e: de f6 brtc .-74 ; 0x846 <__ultoa_invert+0xe> + 890: cf 01 movw r24, r30 + 892: 08 95 ret + 894: 46 2f mov r20, r22 + 896: 47 70 andi r20, 0x07 ; 7 + 898: 40 5d subi r20, 0xD0 ; 208 + 89a: 41 93 st Z+, r20 + 89c: b3 e0 ldi r27, 0x03 ; 3 + 89e: 0f d0 rcall .+30 ; 0x8be <__ultoa_invert+0x86> + 8a0: c9 f7 brne .-14 ; 0x894 <__ultoa_invert+0x5c> + 8a2: f6 cf rjmp .-20 ; 0x890 <__ultoa_invert+0x58> + 8a4: 46 2f mov r20, r22 + 8a6: 4f 70 andi r20, 0x0F ; 15 + 8a8: 40 5d subi r20, 0xD0 ; 208 + 8aa: 4a 33 cpi r20, 0x3A ; 58 + 8ac: 18 f0 brcs .+6 ; 0x8b4 <__ultoa_invert+0x7c> + 8ae: 49 5d subi r20, 0xD9 ; 217 + 8b0: 31 fd sbrc r19, 1 + 8b2: 40 52 subi r20, 0x20 ; 32 + 8b4: 41 93 st Z+, r20 + 8b6: 02 d0 rcall .+4 ; 0x8bc <__ultoa_invert+0x84> + 8b8: a9 f7 brne .-22 ; 0x8a4 <__ultoa_invert+0x6c> + 8ba: ea cf rjmp .-44 ; 0x890 <__ultoa_invert+0x58> + 8bc: b4 e0 ldi r27, 0x04 ; 4 + 8be: a6 95 lsr r26 + 8c0: 97 95 ror r25 + 8c2: 87 95 ror r24 + 8c4: 77 95 ror r23 + 8c6: 67 95 ror r22 + 8c8: ba 95 dec r27 + 8ca: c9 f7 brne .-14 ; 0x8be <__ultoa_invert+0x86> + 8cc: 00 97 sbiw r24, 0x00 ; 0 + 8ce: 61 05 cpc r22, r1 + 8d0: 71 05 cpc r23, r1 + 8d2: 08 95 ret + 8d4: 9b 01 movw r18, r22 + 8d6: ac 01 movw r20, r24 + 8d8: 0a 2e mov r0, r26 + 8da: 06 94 lsr r0 + 8dc: 57 95 ror r21 + 8de: 47 95 ror r20 + 8e0: 37 95 ror r19 + 8e2: 27 95 ror r18 + 8e4: ba 95 dec r27 + 8e6: c9 f7 brne .-14 ; 0x8da <__ultoa_invert+0xa2> + 8e8: 62 0f add r22, r18 + 8ea: 73 1f adc r23, r19 + 8ec: 84 1f adc r24, r20 + 8ee: 95 1f adc r25, r21 + 8f0: a0 1d adc r26, r0 + 8f2: 08 95 ret + +000008f4 <_exit>: + 8f4: f8 94 cli + +000008f6 <__stop_program>: + 8f6: ff cf rjmp .-2 ; 0x8f6 <__stop_program> diff --git a/Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.srec b/Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.srec new file mode 100644 index 0000000..f9f2767 --- /dev/null +++ b/Microcontrollers/opdracht 4.3/Debug/opdracht 4.3.srec @@ -0,0 +1,147 @@ +S01400006F7064726163687420342E332E7372656306 +S113000045C0000058C0000056C0000054C00000A5 +S113001052C0000050C000004EC000004CC00000A0 +S11300204AC000003BC1000046C0000044C00000BC +S113003042C0000040C000003EC000003CC00000C0 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+S11308803F912AE0269F11243019305D3193DEF622 +S1130890CF010895462F4770405D4193B3E00FD0D8 +S11308A0C9F7F6CF462F4F70405D4A3318F0495DC3 +S11308B031FD4052419302D0A9F7EACFB4E0A695A6 +S11308C09795879577956795BA95C9F700976105C8 +S11308D0710508959B01AC010A2E0694579547951E +S11308E037952795BA95C9F7620F731F841F951F13 +S10B08F0A01D0895F894FFCF48 +S10708F8256400006F +S9030000FC diff --git a/Microcontrollers/opdracht 4.3/lcd_control.c b/Microcontrollers/opdracht 4.3/lcd_control.c new file mode 100644 index 0000000..fd4bc24 --- /dev/null +++ b/Microcontrollers/opdracht 4.3/lcd_control.c @@ -0,0 +1,130 @@ +/* + * lcd_controlc.c + * + * Created: 24-2-2021 11:55:12 + * Author: Sem + */ + +#include +#include +#include +#include +#include "lcd_control.h" + +void _delay_ms(double __ms); + +void lcd_clear() { + lcd_write_command (0x01); //Leeg display + _delay_ms(2); + lcd_write_command (0x80); //Cursor terug naar start +} + +void lcd_strobe_lcd_e(void) { + + sbi_porta(LCD_E); // E high + _delay_ms(1); + cbi_porta(LCD_E); // E low + _delay_ms(1); + +} + +void sbi_portc(int index){ + PORTC |= (1< +#include +#include +#include +#include +#include "lcd_control.h" +#define BIT(x) (1 << (x)) + +void wait( int ms ) { + for (int tms=0; tms> 6); + return value; +} + + + +int main(void) +{ + int previousValue = 0; + /* Replace with your application code */ + DDRF = 0x00; // set port F input. + DDRE = 0xFF; // all port A output. + adcInit(); + + init_4bits_mode(); + _delay_ms(10); + lcd_clear(); + + timer2Init(); + while (1) + { + PORTD = ADCH; + PORTE = ADCL; + + int number = ADCH; + + if(previousValue != number){ + + lcd_clear(); + + wait(10); + + lcd_write_integer((getADCValue() >> 1)); + } + + previousValue = number; + + wait(100); + } +} + diff --git a/Microcontrollers/opdracht 4.3/opdracht 4.3.componentinfo.xml b/Microcontrollers/opdracht 4.3/opdracht 4.3.componentinfo.xml new file mode 100644 index 0000000..a769c6a --- /dev/null +++ b/Microcontrollers/opdracht 4.3/opdracht 4.3.componentinfo.xml @@ -0,0 +1,86 @@ + + + + + + + Device + Startup + + + Atmel + 1.6.0 + C:/Program Files (x86)\Atmel\Studio\7.0\Packs + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include\ + + include + C + + + include/ + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\include\avr\iom128.h + + header + C + JdJ7J9I/SJh965SEyyyVYw== + + include/avr/iom128.h + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\templates\main.c + template + source + C Exe + E3YF7GOdCa1nIeGlpTnlmw== + + templates/main.c + Main file (.c) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\templates\main.cpp + template + source + C Exe + mkKaE95TOoATsuBGv6jmxg== + + templates/main.cpp + Main file (.cpp) + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128 + + libraryPrefix + GCC + + + gcc/dev/atmega128 + + + + + ATmega_DFP + C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATmega_DFP/1.6.364/Atmel.ATmega_DFP.pdsc + 1.6.364 + true + ATmega128 + + + + Resolved + Fixed + true + + + \ No newline at end of file diff --git a/Microcontrollers/opdracht 4.3/opdracht 4.3.cproj b/Microcontrollers/opdracht 4.3/opdracht 4.3.cproj new file mode 100644 index 0000000..2f75916 --- /dev/null +++ b/Microcontrollers/opdracht 4.3/opdracht 4.3.cproj @@ -0,0 +1,136 @@ + + + + 2.0 + 7.0 + com.Atmel.AVRGCC8.C + {f7219797-d668-49e2-ac80-7eaf068ba957} + ATmega128 + none + Executable + C + $(MSBuildProjectName) + .elf + $(MSBuildProjectDirectory)\$(Configuration) + opdracht 4.3 + opdracht 4.3 + opdracht 4.3 + Native + true + false + true + true + + + true + + 2 + 0 + 0 + + + + + + + + + + + + + + + + + + -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + True + True + True + True + True + False + True + True + + + NDEBUG + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Optimize for size (-Os) + True + True + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + + + + + + + -mmcu=atmega128 -B "%24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\gcc\dev\atmega128" + True + True + True + True + True + False + True + True + + + DEBUG + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Optimize debugging experience (-Og) + True + True + Default (-g2) + True + + + libm + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.6.364\include\ + + + Default (-Wa,-g) + + + + + + compile + + + compile + + + compile + + + + \ No newline at end of file diff --git a/Microcontrollers/opdracht 4.b1/Debug/Makefile b/Microcontrollers/opdracht 4.b1/Debug/Makefile new file mode 100644 index 0000000..e7710f7 --- /dev/null +++ b/Microcontrollers/opdracht 4.b1/Debug/Makefile @@ -0,0 +1,115 @@ +################################################################################ +# Automatically-generated file. Do not edit! +################################################################################ + +SHELL := cmd.exe +RM := rm -rf + +USER_OBJS := + +LIBS := +PROJ := + +O_SRCS := +C_SRCS := +S_SRCS := +S_UPPER_SRCS := +OBJ_SRCS := +ASM_SRCS := +PREPROCESSING_SRCS := +OBJS := +OBJS_AS_ARGS := +C_DEPS := +C_DEPS_AS_ARGS := +EXECUTABLES := +OUTPUT_FILE_PATH := +OUTPUT_FILE_PATH_AS_ARGS := +AVR_APP_PATH :=$$$AVR_APP_PATH$$$ +QUOTE := " +ADDITIONAL_DEPENDENCIES:= +OUTPUT_FILE_DEP:= +LIB_DEP:= +LINKER_SCRIPT_DEP:= + +# Every subdirectory with source files must be described here +SUBDIRS := + + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += + + +PREPROCESSING_SRCS += + + +ASM_SRCS += + + +OBJS += + +OBJS_AS_ARGS += + +C_DEPS += + +C_DEPS_AS_ARGS += + +OUTPUT_FILE_PATH +=opdracht\ 4.b1.elf + +OUTPUT_FILE_PATH_AS_ARGS +="opdracht 4.b1.elf" + +ADDITIONAL_DEPENDENCIES:= + +OUTPUT_FILE_DEP:= ./makedep.mk + +LIB_DEP+= + +LINKER_SCRIPT_DEP+= + + +# AVR32/GNU C Compiler + + + +# AVR32/GNU Preprocessing Assembler + + + +# AVR32/GNU Assembler + + + + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +# Add inputs and outputs from these tool invocations to the build variables + +# All Target +all: $(OUTPUT_FILE_PATH) $(ADDITIONAL_DEPENDENCIES) + +$(OUTPUT_FILE_PATH): $(OBJS) $(USER_OBJS) $(OUTPUT_FILE_DEP) $(LIB_DEP) $(LINKER_SCRIPT_DEP) + @echo Building target: $@ + @echo Invoking: AVR/GNU Linker : 5.4.0 + $(QUOTE)C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-gcc.exe$(QUOTE) -o$(OUTPUT_FILE_PATH_AS_ARGS) $(OBJS_AS_ARGS) $(USER_OBJS) $(LIBS) -Wl,-Map="opdracht 4.b1.map" -Wl,--start-group -Wl,--end-group -Wl,--gc-sections + @echo Finished building target: $@ + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O ihex -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "opdracht 4.b1.elf" "opdracht 4.b1.hex" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma .eeprom=0 --no-change-warnings -O ihex "opdracht 4.b1.elf" "opdracht 4.b1.eep" || exit 0 + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objdump.exe" -h -S "opdracht 4.b1.elf" > "opdracht 4.b1.lss" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-objcopy.exe" -O srec -R .eeprom -R .fuse -R .lock -R .signature -R .user_signatures "opdracht 4.b1.elf" "opdracht 4.b1.srec" + "C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avr8-gnu-toolchain\bin\avr-size.exe" "opdracht 4.b1.elf" + + + + + + + +# Other Targets +clean: + -$(RM) $(OBJS_AS_ARGS) $(EXECUTABLES) + -$(RM) $(C_DEPS_AS_ARGS) + rm -rf "opdracht 4.b1.elf" "opdracht 4.b1.a" "opdracht 4.b1.hex" "opdracht 4.b1.lss" "opdracht 4.b1.eep" "opdracht 4.b1.map" "opdracht 4.b1.srec" "opdracht 4.b1.usersignatures" + \ No newline at end of file diff --git a/Microcontrollers/opdracht 4.b1/opdracht 4.b1.cproj b/Microcontrollers/opdracht 4.b1/opdracht 4.b1.cproj index 70a3a7b..6ba6977 100644 --- a/Microcontrollers/opdracht 4.b1/opdracht 4.b1.cproj +++ b/Microcontrollers/opdracht 4.b1/opdracht 4.b1.cproj @@ -4,7 +4,11 @@ 2.0 7.0 com.Atmel.AVRGCC8.C +<<<<<<< Updated upstream {314fe495-a311-499d-b63e-4b5e7b7f2054} +======= + {596b8ffa-0a57-48b9-ae5d-b29f78d46cf6} +>>>>>>> Stashed changes ATmega128 none Executable @@ -28,6 +32,21 @@ 0 0 +<<<<<<< Updated upstream +======= + + + + + + + + + + + + +>>>>>>> Stashed changes