From ab4bf87190c5ae3ba8739990ab110137834fd83e Mon Sep 17 00:00:00 2001 From: stijn Date: Wed, 10 Mar 2021 09:15:31 +0100 Subject: [PATCH] [add] opdracht 4.1 --- Microcontrollers/Microcontrollers.atsln | 32 +- .../opdracht 2.5/Debug/opdracht 2.5.lss | 16 +- .../opdracht 4.1/Debug/opdracht 4.1.lss | 1162 +++++++++++++++-- .../opdracht 4.1/Debug/opdracht 4.1.srec | 136 +- Microcontrollers/opdracht 4.1/lcd_control.c | 8 + Microcontrollers/opdracht 4.1/lcd_control.h | 1 + Microcontrollers/opdracht 4.1/main.c | 41 +- 7 files changed, 1237 insertions(+), 159 deletions(-) diff --git a/Microcontrollers/Microcontrollers.atsln b/Microcontrollers/Microcontrollers.atsln index 4f87f2e..54fcc36 100644 --- a/Microcontrollers/Microcontrollers.atsln +++ b/Microcontrollers/Microcontrollers.atsln @@ -21,17 +21,15 @@ Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 2.3", "opdracht 2. EndProject Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 2.5", "opdracht 2.5\opdracht 2.5.cproj", "{C81B68AA-F4BB-4A5D-81F8-2737DCD1D4A7}" EndProject -<<<<<<< Updated upstream Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "testlcd", "testlcd\testlcd.cproj", "{B964892D-A92F-44D4-AF99-3ADC61820917}" EndProject Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 3.2", "opdracht 3.2\opdracht 3.2.cproj", "{EB7415C6-2130-46AD-9842-612C67ADE6D4}" -======= +EndProject Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 2.4", "opdracht 2.4\opdracht 2.4.cproj", "{0FA0C637-5AC0-44F3-999B-49C114B97183}" EndProject Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 3.3", "opdracht 3.3\opdracht 3.3.cproj", "{985D5C75-F61E-49F1-A532-66A1E6141552}" EndProject -Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "testlcd", "testlcd\testlcd.cproj", "{B964892D-A92F-44D4-AF99-3ADC61820917}" ->>>>>>> Stashed changes +Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "opdracht 4.1", "opdracht 4.1\opdracht 4.1.cproj", "{2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}" EndProject Global GlobalSection(SolutionConfigurationPlatforms) = preSolution @@ -75,8 +73,14 @@ Global {C81B68AA-F4BB-4A5D-81F8-2737DCD1D4A7}.Debug|AVR.Build.0 = Debug|AVR {C81B68AA-F4BB-4A5D-81F8-2737DCD1D4A7}.Release|AVR.ActiveCfg = Release|AVR {C81B68AA-F4BB-4A5D-81F8-2737DCD1D4A7}.Release|AVR.Build.0 = Release|AVR -<<<<<<< Updated upstream -======= + {B964892D-A92F-44D4-AF99-3ADC61820917}.Debug|AVR.ActiveCfg = Debug|AVR + {B964892D-A92F-44D4-AF99-3ADC61820917}.Debug|AVR.Build.0 = Debug|AVR + {B964892D-A92F-44D4-AF99-3ADC61820917}.Release|AVR.ActiveCfg = Release|AVR + {B964892D-A92F-44D4-AF99-3ADC61820917}.Release|AVR.Build.0 = Release|AVR + {EB7415C6-2130-46AD-9842-612C67ADE6D4}.Debug|AVR.ActiveCfg = Debug|AVR + {EB7415C6-2130-46AD-9842-612C67ADE6D4}.Debug|AVR.Build.0 = Debug|AVR + {EB7415C6-2130-46AD-9842-612C67ADE6D4}.Release|AVR.ActiveCfg = Release|AVR + {EB7415C6-2130-46AD-9842-612C67ADE6D4}.Release|AVR.Build.0 = Release|AVR {0FA0C637-5AC0-44F3-999B-49C114B97183}.Debug|AVR.ActiveCfg = Debug|AVR {0FA0C637-5AC0-44F3-999B-49C114B97183}.Debug|AVR.Build.0 = Debug|AVR {0FA0C637-5AC0-44F3-999B-49C114B97183}.Release|AVR.ActiveCfg = Release|AVR @@ -85,18 +89,10 @@ Global {985D5C75-F61E-49F1-A532-66A1E6141552}.Debug|AVR.Build.0 = Debug|AVR {985D5C75-F61E-49F1-A532-66A1E6141552}.Release|AVR.ActiveCfg = Release|AVR {985D5C75-F61E-49F1-A532-66A1E6141552}.Release|AVR.Build.0 = Release|AVR ->>>>>>> Stashed changes - {B964892D-A92F-44D4-AF99-3ADC61820917}.Debug|AVR.ActiveCfg = Debug|AVR - {B964892D-A92F-44D4-AF99-3ADC61820917}.Debug|AVR.Build.0 = Debug|AVR - {B964892D-A92F-44D4-AF99-3ADC61820917}.Release|AVR.ActiveCfg = Release|AVR - {B964892D-A92F-44D4-AF99-3ADC61820917}.Release|AVR.Build.0 = Release|AVR -<<<<<<< Updated upstream - {EB7415C6-2130-46AD-9842-612C67ADE6D4}.Debug|AVR.ActiveCfg = Debug|AVR - {EB7415C6-2130-46AD-9842-612C67ADE6D4}.Debug|AVR.Build.0 = Debug|AVR - {EB7415C6-2130-46AD-9842-612C67ADE6D4}.Release|AVR.ActiveCfg = Release|AVR - {EB7415C6-2130-46AD-9842-612C67ADE6D4}.Release|AVR.Build.0 = Release|AVR -======= ->>>>>>> Stashed changes + {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Debug|AVR.ActiveCfg = Debug|AVR + {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Debug|AVR.Build.0 = Debug|AVR + {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Release|AVR.ActiveCfg = Release|AVR + {2432E6BF-DA1E-4668-99BB-59FEA1F5B8A2}.Release|AVR.Build.0 = Release|AVR EndGlobalSection GlobalSection(SolutionProperties) = preSolution HideSolutionNode = FALSE diff --git a/Microcontrollers/opdracht 2.5/Debug/opdracht 2.5.lss b/Microcontrollers/opdracht 2.5/Debug/opdracht 2.5.lss index 085b2e6..2e2a1e5 100644 --- a/Microcontrollers/opdracht 2.5/Debug/opdracht 2.5.lss +++ b/Microcontrollers/opdracht 2.5/Debug/opdracht 2.5.lss @@ -11,23 +11,23 @@ Idx Name Size VMA LMA File off Algn CONTENTS, READONLY 3 .debug_aranges 00000090 00000000 00000000 000002a3 2**0 CONTENTS, READONLY, DEBUGGING - 4 .debug_info 000011bb 00000000 00000000 00000333 2**0 + 4 .debug_info 00001209 00000000 00000000 00000333 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_abbrev 0000095a 00000000 00000000 000014ee 2**0 + 5 .debug_abbrev 0000095a 00000000 00000000 0000153c 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_line 00000526 00000000 00000000 00001e48 2**0 + 6 .debug_line 00000526 00000000 00000000 00001e96 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_frame 00000110 00000000 00000000 00002370 2**2 + 7 .debug_frame 00000110 00000000 00000000 000023bc 2**2 CONTENTS, READONLY, DEBUGGING - 8 .debug_str 000002ae 00000000 00000000 00002480 2**0 + 8 .debug_str 000002ae 00000000 00000000 000024cc 2**0 CONTENTS, READONLY, DEBUGGING - 9 .debug_loc 00000242 00000000 00000000 0000272e 2**0 + 9 .debug_loc 00000242 00000000 00000000 0000277a 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_ranges 00000070 00000000 00000000 00002970 2**0 + 10 .debug_ranges 00000070 00000000 00000000 000029bc 2**0 CONTENTS, READONLY, DEBUGGING 11 .text 00000004 0000021c 0000021c 00000270 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 12 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 000029e0 2**2 + 12 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00002a2c 2**2 CONTENTS, READONLY, DEBUGGING 13 .text.sbi_porta 00000016 000001f8 000001f8 0000024c 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE diff --git a/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.lss b/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.lss index 299d274..8c6342e 100644 --- a/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.lss +++ b/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.lss @@ -3,29 +3,29 @@ opdracht 4.1.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 0000000c 00800100 00000232 000002a6 2**0 + 0 .data 00000004 00800100 000008f4 00000968 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 00000232 00000000 00000000 00000074 2**1 + 1 .text 000008f4 00000000 00000000 00000074 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .comment 00000030 00000000 00000000 000002b2 2**0 + 2 .comment 0000005c 00000000 00000000 0000096c 2**0 CONTENTS, READONLY - 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 000002e4 2**2 + 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 000009c8 2**2 CONTENTS, READONLY - 4 .debug_aranges 000000b8 00000000 00000000 00000320 2**0 + 4 .debug_aranges 000000c0 00000000 00000000 00000a04 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_info 00000e60 00000000 00000000 000003d8 2**0 + 5 .debug_info 00000f30 00000000 00000000 00000ac4 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_abbrev 00000a5b 00000000 00000000 00001238 2**0 + 6 .debug_abbrev 00000a8d 00000000 00000000 000019f4 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_line 00000693 00000000 00000000 00001c93 2**0 + 7 .debug_line 000006f1 00000000 00000000 00002481 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_frame 00000168 00000000 00000000 00002328 2**2 + 8 .debug_frame 000001b4 00000000 00000000 00002b74 2**2 CONTENTS, READONLY, DEBUGGING - 9 .debug_str 0000052a 00000000 00000000 00002490 2**0 + 9 .debug_str 0000056a 00000000 00000000 00002d28 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_loc 000002c7 00000000 00000000 000029ba 2**0 + 10 .debug_loc 00000463 00000000 00000000 00003292 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_ranges 00000098 00000000 00000000 00002c81 2**0 + 11 .debug_ranges 000000a0 00000000 00000000 000036f5 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -49,7 +49,7 @@ Disassembly of section .text: 1e: 00 00 nop 20: 4a c0 rjmp .+148 ; 0xb6 <__bad_interrupt> 22: 00 00 nop - 24: df c0 rjmp .+446 ; 0x1e4 <__vector_9> + 24: 3b c1 rjmp .+630 ; 0x29c <__vector_9> 26: 00 00 nop 28: 46 c0 rjmp .+140 ; 0xb6 <__bad_interrupt> 2a: 00 00 nop @@ -114,18 +114,18 @@ Disassembly of section .text: 98: 11 e0 ldi r17, 0x01 ; 1 9a: a0 e0 ldi r26, 0x00 ; 0 9c: b1 e0 ldi r27, 0x01 ; 1 - 9e: e2 e3 ldi r30, 0x32 ; 50 - a0: f2 e0 ldi r31, 0x02 ; 2 + 9e: e4 ef ldi r30, 0xF4 ; 244 + a0: f8 e0 ldi r31, 0x08 ; 8 a2: 00 e0 ldi r16, 0x00 ; 0 a4: 0b bf out 0x3b, r16 ; 59 a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14> a8: 07 90 elpm r0, Z+ aa: 0d 92 st X+, r0 - ac: ac 30 cpi r26, 0x0C ; 12 + ac: a4 30 cpi r26, 0x04 ; 4 ae: b1 07 cpc r27, r17 b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> - b2: a2 d0 rcall .+324 ; 0x1f8
- b4: bc c0 rjmp .+376 ; 0x22e <_exit> + b2: 11 d1 rcall .+546 ; 0x2d6
+ b4: 1d c4 rjmp .+2106 ; 0x8f0 <_exit> 000000b6 <__bad_interrupt>: b6: a4 cf rjmp .-184 ; 0x0 <__vectors> @@ -204,9 +204,9 @@ void lcd_strobe_lcd_e(void) { 10a: 08 95 ret 0000010c : - // return home - lcd_write_command(0x02); - lcd_strobe_lcd_e(); + char str[length + 1]; + snprintf(str, length + 1, "%d", number); + lcd_write_string(str); } void lcd_write_character(unsigned char byte){ @@ -396,110 +396,1062 @@ void lcd_write_string(const char *str) { 1b2: cf 91 pop r28 1b4: 08 95 ret -000001b6 : +000001b6 : + // return home + lcd_write_command(0x02); + lcd_strobe_lcd_e(); +} -void lcd_move_right(void){ - - lcd_write_command(0x1E); - 1b6: 8e e1 ldi r24, 0x1E ; 30 - 1b8: b9 cf rjmp .-142 ; 0x12c - 1ba: 08 95 ret +void lcd_write_integer(int number){ + 1b6: af 92 push r10 + 1b8: bf 92 push r11 + 1ba: cf 92 push r12 + 1bc: df 92 push r13 + 1be: ef 92 push r14 + 1c0: ff 92 push r15 + 1c2: 0f 93 push r16 + 1c4: 1f 93 push r17 + 1c6: cf 93 push r28 + 1c8: df 93 push r29 + 1ca: cd b7 in r28, 0x3d ; 61 + 1cc: de b7 in r29, 0x3e ; 62 + 1ce: 6c 01 movw r12, r24 + int length = snprintf(NULL, 0, "%d", number + 1); + char str[length + 1]; + snprintf(str, length + 1, "%d", number); + lcd_write_string(str); +} + 1d0: ad b6 in r10, 0x3d ; 61 + 1d2: be b6 in r11, 0x3e ; 62 + lcd_write_command(0x02); + lcd_strobe_lcd_e(); +} -000001bc : +void lcd_write_integer(int number){ + int length = snprintf(NULL, 0, "%d", number + 1); + 1d4: 01 96 adiw r24, 0x01 ; 1 + 1d6: 9f 93 push r25 + 1d8: 8f 93 push r24 + 1da: 0f 2e mov r0, r31 + 1dc: f0 e0 ldi r31, 0x00 ; 0 + 1de: ef 2e mov r14, r31 + 1e0: f1 e0 ldi r31, 0x01 ; 1 + 1e2: ff 2e mov r15, r31 + 1e4: f0 2d mov r31, r0 + 1e6: ff 92 push r15 + 1e8: ef 92 push r14 + 1ea: 1f 92 push r1 + 1ec: 1f 92 push r1 + 1ee: 1f 92 push r1 + 1f0: 1f 92 push r1 + 1f2: 95 d0 rcall .+298 ; 0x31e + char str[length + 1]; + 1f4: 01 96 adiw r24, 0x01 ; 1 + 1f6: 2d b7 in r18, 0x3d ; 61 + 1f8: 3e b7 in r19, 0x3e ; 62 + 1fa: 28 5f subi r18, 0xF8 ; 248 + 1fc: 3f 4f sbci r19, 0xFF ; 255 + 1fe: 0f b6 in r0, 0x3f ; 63 + 200: f8 94 cli + 202: 3e bf out 0x3e, r19 ; 62 + 204: 0f be out 0x3f, r0 ; 63 + 206: 2d bf out 0x3d, r18 ; 61 + 208: 28 1b sub r18, r24 + 20a: 39 0b sbc r19, r25 + 20c: 0f b6 in r0, 0x3f ; 63 + 20e: f8 94 cli + 210: 3e bf out 0x3e, r19 ; 62 + 212: 0f be out 0x3f, r0 ; 63 + 214: 2d bf out 0x3d, r18 ; 61 + 216: 0d b7 in r16, 0x3d ; 61 + 218: 1e b7 in r17, 0x3e ; 62 + 21a: 0f 5f subi r16, 0xFF ; 255 + 21c: 1f 4f sbci r17, 0xFF ; 255 + snprintf(str, length + 1, "%d", number); + 21e: df 92 push r13 + 220: cf 92 push r12 + 222: ff 92 push r15 + 224: ef 92 push r14 + 226: 9f 93 push r25 + 228: 8f 93 push r24 + 22a: 1f 93 push r17 + 22c: 0f 93 push r16 + 22e: 77 d0 rcall .+238 ; 0x31e + lcd_write_string(str); + 230: 80 2f mov r24, r16 + 232: 91 2f mov r25, r17 + 234: b4 df rcall .-152 ; 0x19e +} + 236: 8d b7 in r24, 0x3d ; 61 + 238: 9e b7 in r25, 0x3e ; 62 + 23a: 08 96 adiw r24, 0x08 ; 8 + 23c: 0f b6 in r0, 0x3f ; 63 + 23e: f8 94 cli + 240: 9e bf out 0x3e, r25 ; 62 + 242: 0f be out 0x3f, r0 ; 63 + 244: 8d bf out 0x3d, r24 ; 61 + 246: 0f b6 in r0, 0x3f ; 63 + 248: f8 94 cli + 24a: be be out 0x3e, r11 ; 62 + 24c: 0f be out 0x3f, r0 ; 63 + 24e: ad be out 0x3d, r10 ; 61 + 250: df 91 pop r29 + 252: cf 91 pop r28 + 254: 1f 91 pop r17 + 256: 0f 91 pop r16 + 258: ff 90 pop r15 + 25a: ef 90 pop r14 + 25c: df 90 pop r13 + 25e: cf 90 pop r12 + 260: bf 90 pop r11 + 262: af 90 pop r10 + 264: 08 95 ret + +00000266 : +#include +#include "lcd_control.h" +#define BIT(x) (1 << (x)) + +void wait( int ms ) { + for (int tms=0; tms + 26c: ef ec ldi r30, 0xCF ; 207 + 26e: f7 e0 ldi r31, 0x07 ; 7 + 270: 31 97 sbiw r30, 0x01 ; 1 + 272: f1 f7 brne .-4 ; 0x270 + 274: 00 c0 rjmp .+0 ; 0x276 + 276: 00 00 nop + 278: 2f 5f subi r18, 0xFF ; 255 + 27a: 3f 4f sbci r19, 0xFF ; 255 + 27c: 28 17 cp r18, r24 + 27e: 39 07 cpc r19, r25 + 280: ac f3 brlt .-22 ; 0x26c + _delay_ms( 1 ); // library function (max 30 ms at 8MHz) + } +} + 282: 08 95 ret + +00000284 : + +void adcInit(){ + ADMUX = 0b11100000; // internal reference: 2.56V and SEI on ADC0 and left-adjusted. + 284: 80 ee ldi r24, 0xE0 ; 224 + 286: 87 b9 out 0x07, r24 ; 7 + ADCSRA = 0b10000110; // enable ADC. No free-run. Clock 64 D-factor. + 288: 86 e8 ldi r24, 0x86 ; 134 + 28a: 86 b9 out 0x06, r24 ; 6 + 28c: 08 95 ret + +0000028e : +} + +void timer2Init( void ) { + TIMSK |= BIT(7); // T2 compare match interrupt enable + 28e: 87 b7 in r24, 0x37 ; 55 + 290: 80 68 ori r24, 0x80 ; 128 + 292: 87 bf out 0x37, r24 ; 55 + sei(); // turn_on interrupt all + 294: 78 94 sei + TCCR2 = 0b00000011; // Initialize T2: timer, pre-scaler=64 + 296: 83 e0 ldi r24, 0x03 ; 3 + 298: 85 bd out 0x25, r24 ; 37 + 29a: 08 95 ret + +0000029c <__vector_9>: +} + +ISR( TIMER2_COMP_vect ) { + 29c: 1f 92 push r1 + 29e: 0f 92 push r0 + 2a0: 0f b6 in r0, 0x3f ; 63 + 2a2: 0f 92 push r0 + 2a4: 11 24 eor r1, r1 + 2a6: 8f 93 push r24 + ADCSRA |= BIT(6); + 2a8: 86 b1 in r24, 0x06 ; 6 + 2aa: 80 64 ori r24, 0x40 ; 64 + 2ac: 86 b9 out 0x06, r24 ; 6 +} + 2ae: 8f 91 pop r24 + 2b0: 0f 90 pop r0 + 2b2: 0f be out 0x3f, r0 ; 63 + 2b4: 0f 90 pop r0 + 2b6: 1f 90 pop r1 + 2b8: 18 95 reti + +000002ba : + +int getADCValue(){ int value = 0; value = ADCH; + 2ba: 85 b1 in r24, 0x05 ; 5 + 2bc: 90 e0 ldi r25, 0x00 ; 0 value <<= 2; - value += ADCL; + 2be: 88 0f add r24, r24 + 2c0: 99 1f adc r25, r25 + 2c2: 88 0f add r24, r24 + 2c4: 99 1f adc r25, r25 + value += (ADCL >> 6); + 2c6: 24 b1 in r18, 0x04 ; 4 + 2c8: 22 95 swap r18 + 2ca: 26 95 lsr r18 + 2cc: 26 95 lsr r18 + 2ce: 23 70 andi r18, 0x03 ; 3 return value; } - 1bc: 20 e0 ldi r18, 0x00 ; 0 - 1be: 30 e0 ldi r19, 0x00 ; 0 - 1c0: 08 c0 rjmp .+16 ; 0x1d2 - 1c2: e3 ec ldi r30, 0xC3 ; 195 - 1c4: f9 e0 ldi r31, 0x09 ; 9 - 1c6: 31 97 sbiw r30, 0x01 ; 1 - 1c8: f1 f7 brne .-4 ; 0x1c6 - 1ca: 00 c0 rjmp .+0 ; 0x1cc - 1cc: 00 00 nop - 1ce: 2f 5f subi r18, 0xFF ; 255 - 1d0: 3f 4f sbci r19, 0xFF ; 255 - 1d2: 28 17 cp r18, r24 - 1d4: 39 07 cpc r19, r25 - 1d6: ac f3 brlt .-22 ; 0x1c2 - 1d8: 08 95 ret + 2d0: 82 0f add r24, r18 + 2d2: 91 1d adc r25, r1 + 2d4: 08 95 ret -000001da : - 1da: 80 ee ldi r24, 0xE0 ; 224 - 1dc: 87 b9 out 0x07, r24 ; 7 - 1de: 86 e8 ldi r24, 0x86 ; 134 - 1e0: 86 b9 out 0x06, r24 ; 6 - 1e2: 08 95 ret - -000001e4 <__vector_9>: - 1e4: 1f 92 push r1 - 1e6: 0f 92 push r0 - 1e8: 0f b6 in r0, 0x3f ; 63 - 1ea: 0f 92 push r0 - 1ec: 11 24 eor r1, r1 - 1ee: 0f 90 pop r0 - 1f0: 0f be out 0x3f, r0 ; 63 - 1f2: 0f 90 pop r0 - 1f4: 1f 90 pop r1 - 1f6: 18 95 reti - -000001f8
: +000002d6
: int main(void) { + int previousValue = 0; /* Replace with your application code */ DDRF = 0x00; // set port F input. - 1f8: 10 92 61 00 sts 0x0061, r1 ; 0x800061 <__TEXT_REGION_LENGTH__+0x7e0061> + 2d6: 10 92 61 00 sts 0x0061, r1 ; 0x800061 <__TEXT_REGION_LENGTH__+0x7e0061> DDRE = 0xFF; // all port A output. - 1fc: 8f ef ldi r24, 0xFF ; 255 - 1fe: 82 b9 out 0x02, r24 ; 2 + 2da: 8f ef ldi r24, 0xFF ; 255 + 2dc: 82 b9 out 0x02, r24 ; 2 adcInit(); - 200: ec df rcall .-40 ; 0x1da + 2de: d2 df rcall .-92 ; 0x284 init_4bits_mode(); - 202: af df rcall .-162 ; 0x162 - lcd_clear(); - 204: a3 df rcall .-186 ; 0x14c - lcd_move_right(); - 206: d7 df rcall .-82 ; 0x1b6 - lcd_move_right(); - 208: d6 df rcall .-84 ; 0x1b6 - 20a: 80 e0 ldi r24, 0x00 ; 0 - lcd_write_string("MOOOOOOOOO"); - 20c: 91 e0 ldi r25, 0x01 ; 1 - 20e: c7 df rcall .-114 ; 0x19e - 210: 87 ea ldi r24, 0xA7 ; 167 - 212: 91 e6 ldi r25, 0x61 ; 97 - 214: 01 97 sbiw r24, 0x01 ; 1 - 216: f1 f7 brne .-4 ; 0x214 - 218: 00 c0 rjmp .+0 ; 0x21a - 21a: 00 00 nop - 21c: 86 b1 in r24, 0x06 ; 6 - 21e: 80 64 ori r24, 0x40 ; 64 + 2e0: 40 df rcall .-384 ; 0x162 + 2e2: 8f e1 ldi r24, 0x1F ; 31 + 2e4: 9e e4 ldi r25, 0x4E ; 78 + 2e6: 01 97 sbiw r24, 0x01 ; 1 + 2e8: f1 f7 brne .-4 ; 0x2e6 + 2ea: 00 c0 rjmp .+0 ; 0x2ec + 2ec: 00 00 nop _delay_ms(10); + lcd_clear(); + 2ee: 2e df rcall .-420 ; 0x14c + 2f0: ce df rcall .-100 ; 0x28e - //timer2Init(); + timer2Init(); + 2f2: 80 e0 ldi r24, 0x00 ; 0 + 2f4: 90 e0 ldi r25, 0x00 ; 0 + + + +int main(void) +{ + int previousValue = 0; + 2f6: 25 b1 in r18, 0x05 ; 5 + 2f8: 22 bb out 0x12, r18 ; 18 + lcd_clear(); + + timer2Init(); while (1) { - ADCSRA |= BIT(6); - 220: 86 b9 out 0x06, r24 ; 6 - 222: 85 b1 in r24, 0x05 ; 5 - PORTE = ADCH; - 224: 83 b9 out 0x03, r24 ; 3 - 226: 8a e0 ldi r24, 0x0A ; 10 - //lcd_clear(); - //lcd_write_character(getADCValue()); - wait(10); - 228: 90 e0 ldi r25, 0x00 ; 0 - 22a: c8 df rcall .-112 ; 0x1bc - 22c: f7 cf rjmp .-18 ; 0x21c + PORTD = ADCH; + 2fa: 24 b1 in r18, 0x04 ; 4 + 2fc: 23 b9 out 0x03, r18 ; 3 + PORTE = ADCL; + 2fe: c5 b1 in r28, 0x05 ; 5 + 300: d0 e0 ldi r29, 0x00 ; 0 + + int number = ADCH; + 302: 8c 17 cp r24, r28 -0000022e <_exit>: - 22e: f8 94 cli + if(previousValue != number){ + 304: 9d 07 cpc r25, r29 + 306: 31 f0 breq .+12 ; 0x314 + + lcd_clear(); + 308: 21 df rcall .-446 ; 0x14c + + wait(10); + 30a: 8a e0 ldi r24, 0x0A ; 10 + 30c: 90 e0 ldi r25, 0x00 ; 0 + 30e: ab df rcall .-170 ; 0x266 + + lcd_write_integer(getADCValue()); + 310: d4 df rcall .-88 ; 0x2ba + 312: 51 df rcall .-350 ; 0x1b6 + 314: 84 e6 ldi r24, 0x64 ; 100 + 316: 90 e0 ldi r25, 0x00 ; 0 + } + + previousValue = number; + + wait(100); + 318: a6 df rcall .-180 ; 0x266 + 31a: ce 01 movw r24, r28 + 31c: ec cf rjmp .-40 ; 0x2f6 -00000230 <__stop_program>: - 230: ff cf rjmp .-2 ; 0x230 <__stop_program> +0000031e : + 31e: 0f 93 push r16 + wait(10); + + lcd_write_integer(getADCValue()); + } + + previousValue = number; + 320: 1f 93 push r17 + + wait(100); + } + 322: cf 93 push r28 + 324: df 93 push r29 + 326: cd b7 in r28, 0x3d ; 61 + 328: de b7 in r29, 0x3e ; 62 + 32a: 2e 97 sbiw r28, 0x0e ; 14 + 32c: 0f b6 in r0, 0x3f ; 63 + 32e: f8 94 cli + 330: de bf out 0x3e, r29 ; 62 + 332: 0f be out 0x3f, r0 ; 63 + 334: cd bf out 0x3d, r28 ; 61 + 336: 0d 89 ldd r16, Y+21 ; 0x15 + 338: 1e 89 ldd r17, Y+22 ; 0x16 + 33a: 8f 89 ldd r24, Y+23 ; 0x17 + 33c: 98 8d ldd r25, Y+24 ; 0x18 + 33e: 26 e0 ldi r18, 0x06 ; 6 + 340: 2c 83 std Y+4, r18 ; 0x04 + 342: 1a 83 std Y+2, r17 ; 0x02 + 344: 09 83 std Y+1, r16 ; 0x01 + 346: 97 ff sbrs r25, 7 + 348: 02 c0 rjmp .+4 ; 0x34e + 34a: 80 e0 ldi r24, 0x00 ; 0 + 34c: 90 e8 ldi r25, 0x80 ; 128 + 34e: 01 97 sbiw r24, 0x01 ; 1 + 350: 9e 83 std Y+6, r25 ; 0x06 + 352: 8d 83 std Y+5, r24 ; 0x05 + 354: ae 01 movw r20, r28 + 356: 45 5e subi r20, 0xE5 ; 229 + 358: 5f 4f sbci r21, 0xFF ; 255 + 35a: 69 8d ldd r22, Y+25 ; 0x19 + 35c: 7a 8d ldd r23, Y+26 ; 0x1a + 35e: ce 01 movw r24, r28 + 360: 01 96 adiw r24, 0x01 ; 1 + 362: 19 d0 rcall .+50 ; 0x396 + 364: 4d 81 ldd r20, Y+5 ; 0x05 + 366: 5e 81 ldd r21, Y+6 ; 0x06 + 368: 57 fd sbrc r21, 7 + 36a: 0a c0 rjmp .+20 ; 0x380 + 36c: 2f 81 ldd r18, Y+7 ; 0x07 + 36e: 38 85 ldd r19, Y+8 ; 0x08 + 370: 42 17 cp r20, r18 + 372: 53 07 cpc r21, r19 + 374: 0c f4 brge .+2 ; 0x378 + 376: 9a 01 movw r18, r20 + 378: f8 01 movw r30, r16 + 37a: e2 0f add r30, r18 + 37c: f3 1f adc r31, r19 + 37e: 10 82 st Z, r1 + 380: 2e 96 adiw r28, 0x0e ; 14 + 382: 0f b6 in r0, 0x3f ; 63 + 384: f8 94 cli + 386: de bf out 0x3e, r29 ; 62 + 388: 0f be out 0x3f, r0 ; 63 + 38a: cd bf out 0x3d, r28 ; 61 + 38c: df 91 pop r29 + 38e: cf 91 pop r28 + 390: 1f 91 pop r17 + 392: 0f 91 pop r16 + 394: 08 95 ret + +00000396 : + 396: 2f 92 push r2 + 398: 3f 92 push r3 + 39a: 4f 92 push r4 + 39c: 5f 92 push r5 + 39e: 6f 92 push r6 + 3a0: 7f 92 push r7 + 3a2: 8f 92 push r8 + 3a4: 9f 92 push r9 + 3a6: af 92 push r10 + 3a8: bf 92 push r11 + 3aa: cf 92 push r12 + 3ac: df 92 push r13 + 3ae: ef 92 push r14 + 3b0: ff 92 push r15 + 3b2: 0f 93 push r16 + 3b4: 1f 93 push r17 + 3b6: cf 93 push r28 + 3b8: df 93 push r29 + 3ba: cd b7 in r28, 0x3d ; 61 + 3bc: de b7 in r29, 0x3e ; 62 + 3be: 2b 97 sbiw r28, 0x0b ; 11 + 3c0: 0f b6 in r0, 0x3f ; 63 + 3c2: f8 94 cli + 3c4: de bf out 0x3e, r29 ; 62 + 3c6: 0f be out 0x3f, r0 ; 63 + 3c8: cd bf out 0x3d, r28 ; 61 + 3ca: 6c 01 movw r12, r24 + 3cc: 7b 01 movw r14, r22 + 3ce: 8a 01 movw r16, r20 + 3d0: fc 01 movw r30, r24 + 3d2: 17 82 std Z+7, r1 ; 0x07 + 3d4: 16 82 std Z+6, r1 ; 0x06 + 3d6: 83 81 ldd r24, Z+3 ; 0x03 + 3d8: 81 ff sbrs r24, 1 + 3da: bf c1 rjmp .+894 ; 0x75a <__LOCK_REGION_LENGTH__+0x35a> + 3dc: ce 01 movw r24, r28 + 3de: 01 96 adiw r24, 0x01 ; 1 + 3e0: 3c 01 movw r6, r24 + 3e2: f6 01 movw r30, r12 + 3e4: 93 81 ldd r25, Z+3 ; 0x03 + 3e6: f7 01 movw r30, r14 + 3e8: 93 fd sbrc r25, 3 + 3ea: 85 91 lpm r24, Z+ + 3ec: 93 ff sbrs r25, 3 + 3ee: 81 91 ld r24, Z+ + 3f0: 7f 01 movw r14, r30 + 3f2: 88 23 and r24, r24 + 3f4: 09 f4 brne .+2 ; 0x3f8 + 3f6: ad c1 rjmp .+858 ; 0x752 <__LOCK_REGION_LENGTH__+0x352> + 3f8: 85 32 cpi r24, 0x25 ; 37 + 3fa: 39 f4 brne .+14 ; 0x40a <__LOCK_REGION_LENGTH__+0xa> + 3fc: 93 fd sbrc r25, 3 + 3fe: 85 91 lpm r24, Z+ + 400: 93 ff sbrs r25, 3 + 402: 81 91 ld r24, Z+ + 404: 7f 01 movw r14, r30 + 406: 85 32 cpi r24, 0x25 ; 37 + 408: 21 f4 brne .+8 ; 0x412 <__LOCK_REGION_LENGTH__+0x12> + 40a: b6 01 movw r22, r12 + 40c: 90 e0 ldi r25, 0x00 ; 0 + 40e: d6 d1 rcall .+940 ; 0x7bc + 410: e8 cf rjmp .-48 ; 0x3e2 + 412: 91 2c mov r9, r1 + 414: 21 2c mov r2, r1 + 416: 31 2c mov r3, r1 + 418: ff e1 ldi r31, 0x1F ; 31 + 41a: f3 15 cp r31, r3 + 41c: d8 f0 brcs .+54 ; 0x454 <__LOCK_REGION_LENGTH__+0x54> + 41e: 8b 32 cpi r24, 0x2B ; 43 + 420: 79 f0 breq .+30 ; 0x440 <__LOCK_REGION_LENGTH__+0x40> + 422: 38 f4 brcc .+14 ; 0x432 <__LOCK_REGION_LENGTH__+0x32> + 424: 80 32 cpi r24, 0x20 ; 32 + 426: 79 f0 breq .+30 ; 0x446 <__LOCK_REGION_LENGTH__+0x46> + 428: 83 32 cpi r24, 0x23 ; 35 + 42a: a1 f4 brne .+40 ; 0x454 <__LOCK_REGION_LENGTH__+0x54> + 42c: 23 2d mov r18, r3 + 42e: 20 61 ori r18, 0x10 ; 16 + 430: 1d c0 rjmp .+58 ; 0x46c <__LOCK_REGION_LENGTH__+0x6c> + 432: 8d 32 cpi r24, 0x2D ; 45 + 434: 61 f0 breq .+24 ; 0x44e <__LOCK_REGION_LENGTH__+0x4e> + 436: 80 33 cpi r24, 0x30 ; 48 + 438: 69 f4 brne .+26 ; 0x454 <__LOCK_REGION_LENGTH__+0x54> + 43a: 23 2d mov r18, r3 + 43c: 21 60 ori r18, 0x01 ; 1 + 43e: 16 c0 rjmp .+44 ; 0x46c <__LOCK_REGION_LENGTH__+0x6c> + 440: 83 2d mov r24, r3 + 442: 82 60 ori r24, 0x02 ; 2 + 444: 38 2e mov r3, r24 + 446: e3 2d mov r30, r3 + 448: e4 60 ori r30, 0x04 ; 4 + 44a: 3e 2e mov r3, r30 + 44c: 2a c0 rjmp .+84 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> + 44e: f3 2d mov r31, r3 + 450: f8 60 ori r31, 0x08 ; 8 + 452: 1d c0 rjmp .+58 ; 0x48e <__LOCK_REGION_LENGTH__+0x8e> + 454: 37 fc sbrc r3, 7 + 456: 2d c0 rjmp .+90 ; 0x4b2 <__LOCK_REGION_LENGTH__+0xb2> + 458: 20 ed ldi r18, 0xD0 ; 208 + 45a: 28 0f add r18, r24 + 45c: 2a 30 cpi r18, 0x0A ; 10 + 45e: 40 f0 brcs .+16 ; 0x470 <__LOCK_REGION_LENGTH__+0x70> + 460: 8e 32 cpi r24, 0x2E ; 46 + 462: b9 f4 brne .+46 ; 0x492 <__LOCK_REGION_LENGTH__+0x92> + 464: 36 fc sbrc r3, 6 + 466: 75 c1 rjmp .+746 ; 0x752 <__LOCK_REGION_LENGTH__+0x352> + 468: 23 2d mov r18, r3 + 46a: 20 64 ori r18, 0x40 ; 64 + 46c: 32 2e mov r3, r18 + 46e: 19 c0 rjmp .+50 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> + 470: 36 fe sbrs r3, 6 + 472: 06 c0 rjmp .+12 ; 0x480 <__LOCK_REGION_LENGTH__+0x80> + 474: 8a e0 ldi r24, 0x0A ; 10 + 476: 98 9e mul r9, r24 + 478: 20 0d add r18, r0 + 47a: 11 24 eor r1, r1 + 47c: 92 2e mov r9, r18 + 47e: 11 c0 rjmp .+34 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> + 480: ea e0 ldi r30, 0x0A ; 10 + 482: 2e 9e mul r2, r30 + 484: 20 0d add r18, r0 + 486: 11 24 eor r1, r1 + 488: 22 2e mov r2, r18 + 48a: f3 2d mov r31, r3 + 48c: f0 62 ori r31, 0x20 ; 32 + 48e: 3f 2e mov r3, r31 + 490: 08 c0 rjmp .+16 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> + 492: 8c 36 cpi r24, 0x6C ; 108 + 494: 21 f4 brne .+8 ; 0x49e <__LOCK_REGION_LENGTH__+0x9e> + 496: 83 2d mov r24, r3 + 498: 80 68 ori r24, 0x80 ; 128 + 49a: 38 2e mov r3, r24 + 49c: 02 c0 rjmp .+4 ; 0x4a2 <__LOCK_REGION_LENGTH__+0xa2> + 49e: 88 36 cpi r24, 0x68 ; 104 + 4a0: 41 f4 brne .+16 ; 0x4b2 <__LOCK_REGION_LENGTH__+0xb2> + 4a2: f7 01 movw r30, r14 + 4a4: 93 fd sbrc r25, 3 + 4a6: 85 91 lpm r24, Z+ + 4a8: 93 ff sbrs r25, 3 + 4aa: 81 91 ld r24, Z+ + 4ac: 7f 01 movw r14, r30 + 4ae: 81 11 cpse r24, r1 + 4b0: b3 cf rjmp .-154 ; 0x418 <__LOCK_REGION_LENGTH__+0x18> + 4b2: 98 2f mov r25, r24 + 4b4: 9f 7d andi r25, 0xDF ; 223 + 4b6: 95 54 subi r25, 0x45 ; 69 + 4b8: 93 30 cpi r25, 0x03 ; 3 + 4ba: 28 f4 brcc .+10 ; 0x4c6 <__LOCK_REGION_LENGTH__+0xc6> + 4bc: 0c 5f subi r16, 0xFC ; 252 + 4be: 1f 4f sbci r17, 0xFF ; 255 + 4c0: 9f e3 ldi r25, 0x3F ; 63 + 4c2: 99 83 std Y+1, r25 ; 0x01 + 4c4: 0d c0 rjmp .+26 ; 0x4e0 <__LOCK_REGION_LENGTH__+0xe0> + 4c6: 83 36 cpi r24, 0x63 ; 99 + 4c8: 31 f0 breq .+12 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> + 4ca: 83 37 cpi r24, 0x73 ; 115 + 4cc: 71 f0 breq .+28 ; 0x4ea <__LOCK_REGION_LENGTH__+0xea> + 4ce: 83 35 cpi r24, 0x53 ; 83 + 4d0: 09 f0 breq .+2 ; 0x4d4 <__LOCK_REGION_LENGTH__+0xd4> + 4d2: 55 c0 rjmp .+170 ; 0x57e <__LOCK_REGION_LENGTH__+0x17e> + 4d4: 20 c0 rjmp .+64 ; 0x516 <__LOCK_REGION_LENGTH__+0x116> + 4d6: f8 01 movw r30, r16 + 4d8: 80 81 ld r24, Z + 4da: 89 83 std Y+1, r24 ; 0x01 + 4dc: 0e 5f subi r16, 0xFE ; 254 + 4de: 1f 4f sbci r17, 0xFF ; 255 + 4e0: 88 24 eor r8, r8 + 4e2: 83 94 inc r8 + 4e4: 91 2c mov r9, r1 + 4e6: 53 01 movw r10, r6 + 4e8: 12 c0 rjmp .+36 ; 0x50e <__LOCK_REGION_LENGTH__+0x10e> + 4ea: 28 01 movw r4, r16 + 4ec: f2 e0 ldi r31, 0x02 ; 2 + 4ee: 4f 0e add r4, r31 + 4f0: 51 1c adc r5, r1 + 4f2: f8 01 movw r30, r16 + 4f4: a0 80 ld r10, Z + 4f6: b1 80 ldd r11, Z+1 ; 0x01 + 4f8: 36 fe sbrs r3, 6 + 4fa: 03 c0 rjmp .+6 ; 0x502 <__LOCK_REGION_LENGTH__+0x102> + 4fc: 69 2d mov r22, r9 + 4fe: 70 e0 ldi r23, 0x00 ; 0 + 500: 02 c0 rjmp .+4 ; 0x506 <__LOCK_REGION_LENGTH__+0x106> + 502: 6f ef ldi r22, 0xFF ; 255 + 504: 7f ef ldi r23, 0xFF ; 255 + 506: c5 01 movw r24, r10 + 508: 4e d1 rcall .+668 ; 0x7a6 + 50a: 4c 01 movw r8, r24 + 50c: 82 01 movw r16, r4 + 50e: f3 2d mov r31, r3 + 510: ff 77 andi r31, 0x7F ; 127 + 512: 3f 2e mov r3, r31 + 514: 15 c0 rjmp .+42 ; 0x540 <__LOCK_REGION_LENGTH__+0x140> + 516: 28 01 movw r4, r16 + 518: 22 e0 ldi r18, 0x02 ; 2 + 51a: 42 0e add r4, r18 + 51c: 51 1c adc r5, r1 + 51e: f8 01 movw r30, r16 + 520: a0 80 ld r10, Z + 522: b1 80 ldd r11, Z+1 ; 0x01 + 524: 36 fe sbrs r3, 6 + 526: 03 c0 rjmp .+6 ; 0x52e <__LOCK_REGION_LENGTH__+0x12e> + 528: 69 2d mov r22, r9 + 52a: 70 e0 ldi r23, 0x00 ; 0 + 52c: 02 c0 rjmp .+4 ; 0x532 <__LOCK_REGION_LENGTH__+0x132> + 52e: 6f ef ldi r22, 0xFF ; 255 + 530: 7f ef ldi r23, 0xFF ; 255 + 532: c5 01 movw r24, r10 + 534: 2d d1 rcall .+602 ; 0x790 + 536: 4c 01 movw r8, r24 + 538: f3 2d mov r31, r3 + 53a: f0 68 ori r31, 0x80 ; 128 + 53c: 3f 2e mov r3, r31 + 53e: 82 01 movw r16, r4 + 540: 33 fc sbrc r3, 3 + 542: 19 c0 rjmp .+50 ; 0x576 <__LOCK_REGION_LENGTH__+0x176> + 544: 82 2d mov r24, r2 + 546: 90 e0 ldi r25, 0x00 ; 0 + 548: 88 16 cp r8, r24 + 54a: 99 06 cpc r9, r25 + 54c: a0 f4 brcc .+40 ; 0x576 <__LOCK_REGION_LENGTH__+0x176> + 54e: b6 01 movw r22, r12 + 550: 80 e2 ldi r24, 0x20 ; 32 + 552: 90 e0 ldi r25, 0x00 ; 0 + 554: 33 d1 rcall .+614 ; 0x7bc + 556: 2a 94 dec r2 + 558: f5 cf rjmp .-22 ; 0x544 <__LOCK_REGION_LENGTH__+0x144> + 55a: f5 01 movw r30, r10 + 55c: 37 fc sbrc r3, 7 + 55e: 85 91 lpm r24, Z+ + 560: 37 fe sbrs r3, 7 + 562: 81 91 ld r24, Z+ + 564: 5f 01 movw r10, r30 + 566: b6 01 movw r22, r12 + 568: 90 e0 ldi r25, 0x00 ; 0 + 56a: 28 d1 rcall .+592 ; 0x7bc + 56c: 21 10 cpse r2, r1 + 56e: 2a 94 dec r2 + 570: 21 e0 ldi r18, 0x01 ; 1 + 572: 82 1a sub r8, r18 + 574: 91 08 sbc r9, r1 + 576: 81 14 cp r8, r1 + 578: 91 04 cpc r9, r1 + 57a: 79 f7 brne .-34 ; 0x55a <__LOCK_REGION_LENGTH__+0x15a> + 57c: e1 c0 rjmp .+450 ; 0x740 <__LOCK_REGION_LENGTH__+0x340> + 57e: 84 36 cpi r24, 0x64 ; 100 + 580: 11 f0 breq .+4 ; 0x586 <__LOCK_REGION_LENGTH__+0x186> + 582: 89 36 cpi r24, 0x69 ; 105 + 584: 39 f5 brne .+78 ; 0x5d4 <__LOCK_REGION_LENGTH__+0x1d4> + 586: f8 01 movw r30, r16 + 588: 37 fe sbrs r3, 7 + 58a: 07 c0 rjmp .+14 ; 0x59a <__LOCK_REGION_LENGTH__+0x19a> + 58c: 60 81 ld r22, Z + 58e: 71 81 ldd r23, Z+1 ; 0x01 + 590: 82 81 ldd r24, Z+2 ; 0x02 + 592: 93 81 ldd r25, Z+3 ; 0x03 + 594: 0c 5f subi r16, 0xFC ; 252 + 596: 1f 4f sbci r17, 0xFF ; 255 + 598: 08 c0 rjmp .+16 ; 0x5aa <__LOCK_REGION_LENGTH__+0x1aa> + 59a: 60 81 ld r22, Z + 59c: 71 81 ldd r23, Z+1 ; 0x01 + 59e: 07 2e mov r0, r23 + 5a0: 00 0c add r0, r0 + 5a2: 88 0b sbc r24, r24 + 5a4: 99 0b sbc r25, r25 + 5a6: 0e 5f subi r16, 0xFE ; 254 + 5a8: 1f 4f sbci r17, 0xFF ; 255 + 5aa: f3 2d mov r31, r3 + 5ac: ff 76 andi r31, 0x6F ; 111 + 5ae: 3f 2e mov r3, r31 + 5b0: 97 ff sbrs r25, 7 + 5b2: 09 c0 rjmp .+18 ; 0x5c6 <__LOCK_REGION_LENGTH__+0x1c6> + 5b4: 90 95 com r25 + 5b6: 80 95 com r24 + 5b8: 70 95 com r23 + 5ba: 61 95 neg r22 + 5bc: 7f 4f sbci r23, 0xFF ; 255 + 5be: 8f 4f sbci r24, 0xFF ; 255 + 5c0: 9f 4f sbci r25, 0xFF ; 255 + 5c2: f0 68 ori r31, 0x80 ; 128 + 5c4: 3f 2e mov r3, r31 + 5c6: 2a e0 ldi r18, 0x0A ; 10 + 5c8: 30 e0 ldi r19, 0x00 ; 0 + 5ca: a3 01 movw r20, r6 + 5cc: 33 d1 rcall .+614 ; 0x834 <__ultoa_invert> + 5ce: 88 2e mov r8, r24 + 5d0: 86 18 sub r8, r6 + 5d2: 44 c0 rjmp .+136 ; 0x65c <__LOCK_REGION_LENGTH__+0x25c> + 5d4: 85 37 cpi r24, 0x75 ; 117 + 5d6: 31 f4 brne .+12 ; 0x5e4 <__LOCK_REGION_LENGTH__+0x1e4> + 5d8: 23 2d mov r18, r3 + 5da: 2f 7e andi r18, 0xEF ; 239 + 5dc: b2 2e mov r11, r18 + 5de: 2a e0 ldi r18, 0x0A ; 10 + 5e0: 30 e0 ldi r19, 0x00 ; 0 + 5e2: 25 c0 rjmp .+74 ; 0x62e <__LOCK_REGION_LENGTH__+0x22e> + 5e4: 93 2d mov r25, r3 + 5e6: 99 7f andi r25, 0xF9 ; 249 + 5e8: b9 2e mov r11, r25 + 5ea: 8f 36 cpi r24, 0x6F ; 111 + 5ec: c1 f0 breq .+48 ; 0x61e <__LOCK_REGION_LENGTH__+0x21e> + 5ee: 18 f4 brcc .+6 ; 0x5f6 <__LOCK_REGION_LENGTH__+0x1f6> + 5f0: 88 35 cpi r24, 0x58 ; 88 + 5f2: 79 f0 breq .+30 ; 0x612 <__LOCK_REGION_LENGTH__+0x212> + 5f4: ae c0 rjmp .+348 ; 0x752 <__LOCK_REGION_LENGTH__+0x352> + 5f6: 80 37 cpi r24, 0x70 ; 112 + 5f8: 19 f0 breq .+6 ; 0x600 <__LOCK_REGION_LENGTH__+0x200> + 5fa: 88 37 cpi r24, 0x78 ; 120 + 5fc: 21 f0 breq .+8 ; 0x606 <__LOCK_REGION_LENGTH__+0x206> + 5fe: a9 c0 rjmp .+338 ; 0x752 <__LOCK_REGION_LENGTH__+0x352> + 600: e9 2f mov r30, r25 + 602: e0 61 ori r30, 0x10 ; 16 + 604: be 2e mov r11, r30 + 606: b4 fe sbrs r11, 4 + 608: 0d c0 rjmp .+26 ; 0x624 <__LOCK_REGION_LENGTH__+0x224> + 60a: fb 2d mov r31, r11 + 60c: f4 60 ori r31, 0x04 ; 4 + 60e: bf 2e mov r11, r31 + 610: 09 c0 rjmp .+18 ; 0x624 <__LOCK_REGION_LENGTH__+0x224> + 612: 34 fe sbrs r3, 4 + 614: 0a c0 rjmp .+20 ; 0x62a <__LOCK_REGION_LENGTH__+0x22a> + 616: 29 2f mov r18, r25 + 618: 26 60 ori r18, 0x06 ; 6 + 61a: b2 2e mov r11, r18 + 61c: 06 c0 rjmp .+12 ; 0x62a <__LOCK_REGION_LENGTH__+0x22a> + 61e: 28 e0 ldi r18, 0x08 ; 8 + 620: 30 e0 ldi r19, 0x00 ; 0 + 622: 05 c0 rjmp .+10 ; 0x62e <__LOCK_REGION_LENGTH__+0x22e> + 624: 20 e1 ldi r18, 0x10 ; 16 + 626: 30 e0 ldi r19, 0x00 ; 0 + 628: 02 c0 rjmp .+4 ; 0x62e <__LOCK_REGION_LENGTH__+0x22e> + 62a: 20 e1 ldi r18, 0x10 ; 16 + 62c: 32 e0 ldi r19, 0x02 ; 2 + 62e: f8 01 movw r30, r16 + 630: b7 fe sbrs r11, 7 + 632: 07 c0 rjmp .+14 ; 0x642 <__LOCK_REGION_LENGTH__+0x242> + 634: 60 81 ld r22, Z + 636: 71 81 ldd r23, Z+1 ; 0x01 + 638: 82 81 ldd r24, Z+2 ; 0x02 + 63a: 93 81 ldd r25, Z+3 ; 0x03 + 63c: 0c 5f subi r16, 0xFC ; 252 + 63e: 1f 4f sbci r17, 0xFF ; 255 + 640: 06 c0 rjmp .+12 ; 0x64e <__LOCK_REGION_LENGTH__+0x24e> + 642: 60 81 ld r22, Z + 644: 71 81 ldd r23, Z+1 ; 0x01 + 646: 80 e0 ldi r24, 0x00 ; 0 + 648: 90 e0 ldi r25, 0x00 ; 0 + 64a: 0e 5f subi r16, 0xFE ; 254 + 64c: 1f 4f sbci r17, 0xFF ; 255 + 64e: a3 01 movw r20, r6 + 650: f1 d0 rcall .+482 ; 0x834 <__ultoa_invert> + 652: 88 2e mov r8, r24 + 654: 86 18 sub r8, r6 + 656: fb 2d mov r31, r11 + 658: ff 77 andi r31, 0x7F ; 127 + 65a: 3f 2e mov r3, r31 + 65c: 36 fe sbrs r3, 6 + 65e: 0d c0 rjmp .+26 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> + 660: 23 2d mov r18, r3 + 662: 2e 7f andi r18, 0xFE ; 254 + 664: a2 2e mov r10, r18 + 666: 89 14 cp r8, r9 + 668: 58 f4 brcc .+22 ; 0x680 <__LOCK_REGION_LENGTH__+0x280> + 66a: 34 fe sbrs r3, 4 + 66c: 0b c0 rjmp .+22 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 66e: 32 fc sbrc r3, 2 + 670: 09 c0 rjmp .+18 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 672: 83 2d mov r24, r3 + 674: 8e 7e andi r24, 0xEE ; 238 + 676: a8 2e mov r10, r24 + 678: 05 c0 rjmp .+10 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 67a: b8 2c mov r11, r8 + 67c: a3 2c mov r10, r3 + 67e: 03 c0 rjmp .+6 ; 0x686 <__LOCK_REGION_LENGTH__+0x286> + 680: b8 2c mov r11, r8 + 682: 01 c0 rjmp .+2 ; 0x686 <__LOCK_REGION_LENGTH__+0x286> + 684: b9 2c mov r11, r9 + 686: a4 fe sbrs r10, 4 + 688: 0f c0 rjmp .+30 ; 0x6a8 <__LOCK_REGION_LENGTH__+0x2a8> + 68a: fe 01 movw r30, r28 + 68c: e8 0d add r30, r8 + 68e: f1 1d adc r31, r1 + 690: 80 81 ld r24, Z + 692: 80 33 cpi r24, 0x30 ; 48 + 694: 21 f4 brne .+8 ; 0x69e <__LOCK_REGION_LENGTH__+0x29e> + 696: 9a 2d mov r25, r10 + 698: 99 7e andi r25, 0xE9 ; 233 + 69a: a9 2e mov r10, r25 + 69c: 09 c0 rjmp .+18 ; 0x6b0 <__LOCK_REGION_LENGTH__+0x2b0> + 69e: a2 fe sbrs r10, 2 + 6a0: 06 c0 rjmp .+12 ; 0x6ae <__LOCK_REGION_LENGTH__+0x2ae> + 6a2: b3 94 inc r11 + 6a4: b3 94 inc r11 + 6a6: 04 c0 rjmp .+8 ; 0x6b0 <__LOCK_REGION_LENGTH__+0x2b0> + 6a8: 8a 2d mov r24, r10 + 6aa: 86 78 andi r24, 0x86 ; 134 + 6ac: 09 f0 breq .+2 ; 0x6b0 <__LOCK_REGION_LENGTH__+0x2b0> + 6ae: b3 94 inc r11 + 6b0: a3 fc sbrc r10, 3 + 6b2: 10 c0 rjmp .+32 ; 0x6d4 <__LOCK_REGION_LENGTH__+0x2d4> + 6b4: a0 fe sbrs r10, 0 + 6b6: 06 c0 rjmp .+12 ; 0x6c4 <__LOCK_REGION_LENGTH__+0x2c4> + 6b8: b2 14 cp r11, r2 + 6ba: 80 f4 brcc .+32 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> + 6bc: 28 0c add r2, r8 + 6be: 92 2c mov r9, r2 + 6c0: 9b 18 sub r9, r11 + 6c2: 0d c0 rjmp .+26 ; 0x6de <__LOCK_REGION_LENGTH__+0x2de> + 6c4: b2 14 cp r11, r2 + 6c6: 58 f4 brcc .+22 ; 0x6de <__LOCK_REGION_LENGTH__+0x2de> + 6c8: b6 01 movw r22, r12 + 6ca: 80 e2 ldi r24, 0x20 ; 32 + 6cc: 90 e0 ldi r25, 0x00 ; 0 + 6ce: 76 d0 rcall .+236 ; 0x7bc + 6d0: b3 94 inc r11 + 6d2: f8 cf rjmp .-16 ; 0x6c4 <__LOCK_REGION_LENGTH__+0x2c4> + 6d4: b2 14 cp r11, r2 + 6d6: 18 f4 brcc .+6 ; 0x6de <__LOCK_REGION_LENGTH__+0x2de> + 6d8: 2b 18 sub r2, r11 + 6da: 02 c0 rjmp .+4 ; 0x6e0 <__LOCK_REGION_LENGTH__+0x2e0> + 6dc: 98 2c mov r9, r8 + 6de: 21 2c mov r2, r1 + 6e0: a4 fe sbrs r10, 4 + 6e2: 0f c0 rjmp .+30 ; 0x702 <__LOCK_REGION_LENGTH__+0x302> + 6e4: b6 01 movw r22, r12 + 6e6: 80 e3 ldi r24, 0x30 ; 48 + 6e8: 90 e0 ldi r25, 0x00 ; 0 + 6ea: 68 d0 rcall .+208 ; 0x7bc + 6ec: a2 fe sbrs r10, 2 + 6ee: 16 c0 rjmp .+44 ; 0x71c <__LOCK_REGION_LENGTH__+0x31c> + 6f0: a1 fc sbrc r10, 1 + 6f2: 03 c0 rjmp .+6 ; 0x6fa <__LOCK_REGION_LENGTH__+0x2fa> + 6f4: 88 e7 ldi r24, 0x78 ; 120 + 6f6: 90 e0 ldi r25, 0x00 ; 0 + 6f8: 02 c0 rjmp .+4 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> + 6fa: 88 e5 ldi r24, 0x58 ; 88 + 6fc: 90 e0 ldi r25, 0x00 ; 0 + 6fe: b6 01 movw r22, r12 + 700: 0c c0 rjmp .+24 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> + 702: 8a 2d mov r24, r10 + 704: 86 78 andi r24, 0x86 ; 134 + 706: 51 f0 breq .+20 ; 0x71c <__LOCK_REGION_LENGTH__+0x31c> + 708: a1 fe sbrs r10, 1 + 70a: 02 c0 rjmp .+4 ; 0x710 <__LOCK_REGION_LENGTH__+0x310> + 70c: 8b e2 ldi r24, 0x2B ; 43 + 70e: 01 c0 rjmp .+2 ; 0x712 <__LOCK_REGION_LENGTH__+0x312> + 710: 80 e2 ldi r24, 0x20 ; 32 + 712: a7 fc sbrc r10, 7 + 714: 8d e2 ldi r24, 0x2D ; 45 + 716: b6 01 movw r22, r12 + 718: 90 e0 ldi r25, 0x00 ; 0 + 71a: 50 d0 rcall .+160 ; 0x7bc + 71c: 89 14 cp r8, r9 + 71e: 30 f4 brcc .+12 ; 0x72c <__LOCK_REGION_LENGTH__+0x32c> + 720: b6 01 movw r22, r12 + 722: 80 e3 ldi r24, 0x30 ; 48 + 724: 90 e0 ldi r25, 0x00 ; 0 + 726: 4a d0 rcall .+148 ; 0x7bc + 728: 9a 94 dec r9 + 72a: f8 cf rjmp .-16 ; 0x71c <__LOCK_REGION_LENGTH__+0x31c> + 72c: 8a 94 dec r8 + 72e: f3 01 movw r30, r6 + 730: e8 0d add r30, r8 + 732: f1 1d adc r31, r1 + 734: 80 81 ld r24, Z + 736: b6 01 movw r22, r12 + 738: 90 e0 ldi r25, 0x00 ; 0 + 73a: 40 d0 rcall .+128 ; 0x7bc + 73c: 81 10 cpse r8, r1 + 73e: f6 cf rjmp .-20 ; 0x72c <__LOCK_REGION_LENGTH__+0x32c> + 740: 22 20 and r2, r2 + 742: 09 f4 brne .+2 ; 0x746 <__LOCK_REGION_LENGTH__+0x346> + 744: 4e ce rjmp .-868 ; 0x3e2 + 746: b6 01 movw r22, r12 + 748: 80 e2 ldi r24, 0x20 ; 32 + 74a: 90 e0 ldi r25, 0x00 ; 0 + 74c: 37 d0 rcall .+110 ; 0x7bc + 74e: 2a 94 dec r2 + 750: f7 cf rjmp .-18 ; 0x740 <__LOCK_REGION_LENGTH__+0x340> + 752: f6 01 movw r30, r12 + 754: 86 81 ldd r24, Z+6 ; 0x06 + 756: 97 81 ldd r25, Z+7 ; 0x07 + 758: 02 c0 rjmp .+4 ; 0x75e <__LOCK_REGION_LENGTH__+0x35e> + 75a: 8f ef ldi r24, 0xFF ; 255 + 75c: 9f ef ldi r25, 0xFF ; 255 + 75e: 2b 96 adiw r28, 0x0b ; 11 + 760: 0f b6 in r0, 0x3f ; 63 + 762: f8 94 cli + 764: de bf out 0x3e, r29 ; 62 + 766: 0f be out 0x3f, r0 ; 63 + 768: cd bf out 0x3d, r28 ; 61 + 76a: df 91 pop r29 + 76c: cf 91 pop r28 + 76e: 1f 91 pop r17 + 770: 0f 91 pop r16 + 772: ff 90 pop r15 + 774: ef 90 pop r14 + 776: df 90 pop r13 + 778: cf 90 pop r12 + 77a: bf 90 pop r11 + 77c: af 90 pop r10 + 77e: 9f 90 pop r9 + 780: 8f 90 pop r8 + 782: 7f 90 pop r7 + 784: 6f 90 pop r6 + 786: 5f 90 pop r5 + 788: 4f 90 pop r4 + 78a: 3f 90 pop r3 + 78c: 2f 90 pop r2 + 78e: 08 95 ret + +00000790 : + 790: fc 01 movw r30, r24 + 792: 05 90 lpm r0, Z+ + 794: 61 50 subi r22, 0x01 ; 1 + 796: 70 40 sbci r23, 0x00 ; 0 + 798: 01 10 cpse r0, r1 + 79a: d8 f7 brcc .-10 ; 0x792 + 79c: 80 95 com r24 + 79e: 90 95 com r25 + 7a0: 8e 0f add r24, r30 + 7a2: 9f 1f adc r25, r31 + 7a4: 08 95 ret + +000007a6 : + 7a6: fc 01 movw r30, r24 + 7a8: 61 50 subi r22, 0x01 ; 1 + 7aa: 70 40 sbci r23, 0x00 ; 0 + 7ac: 01 90 ld r0, Z+ + 7ae: 01 10 cpse r0, r1 + 7b0: d8 f7 brcc .-10 ; 0x7a8 + 7b2: 80 95 com r24 + 7b4: 90 95 com r25 + 7b6: 8e 0f add r24, r30 + 7b8: 9f 1f adc r25, r31 + 7ba: 08 95 ret + +000007bc : + 7bc: 0f 93 push r16 + 7be: 1f 93 push r17 + 7c0: cf 93 push r28 + 7c2: df 93 push r29 + 7c4: fb 01 movw r30, r22 + 7c6: 23 81 ldd r18, Z+3 ; 0x03 + 7c8: 21 fd sbrc r18, 1 + 7ca: 03 c0 rjmp .+6 ; 0x7d2 + 7cc: 8f ef ldi r24, 0xFF ; 255 + 7ce: 9f ef ldi r25, 0xFF ; 255 + 7d0: 2c c0 rjmp .+88 ; 0x82a + 7d2: 22 ff sbrs r18, 2 + 7d4: 16 c0 rjmp .+44 ; 0x802 + 7d6: 46 81 ldd r20, Z+6 ; 0x06 + 7d8: 57 81 ldd r21, Z+7 ; 0x07 + 7da: 24 81 ldd r18, Z+4 ; 0x04 + 7dc: 35 81 ldd r19, Z+5 ; 0x05 + 7de: 42 17 cp r20, r18 + 7e0: 53 07 cpc r21, r19 + 7e2: 44 f4 brge .+16 ; 0x7f4 + 7e4: a0 81 ld r26, Z + 7e6: b1 81 ldd r27, Z+1 ; 0x01 + 7e8: 9d 01 movw r18, r26 + 7ea: 2f 5f subi r18, 0xFF ; 255 + 7ec: 3f 4f sbci r19, 0xFF ; 255 + 7ee: 31 83 std Z+1, r19 ; 0x01 + 7f0: 20 83 st Z, r18 + 7f2: 8c 93 st X, r24 + 7f4: 26 81 ldd r18, Z+6 ; 0x06 + 7f6: 37 81 ldd r19, Z+7 ; 0x07 + 7f8: 2f 5f subi r18, 0xFF ; 255 + 7fa: 3f 4f sbci r19, 0xFF ; 255 + 7fc: 37 83 std Z+7, r19 ; 0x07 + 7fe: 26 83 std Z+6, r18 ; 0x06 + 800: 14 c0 rjmp .+40 ; 0x82a + 802: 8b 01 movw r16, r22 + 804: ec 01 movw r28, r24 + 806: fb 01 movw r30, r22 + 808: 00 84 ldd r0, Z+8 ; 0x08 + 80a: f1 85 ldd r31, Z+9 ; 0x09 + 80c: e0 2d mov r30, r0 + 80e: 09 95 icall + 810: 89 2b or r24, r25 + 812: e1 f6 brne .-72 ; 0x7cc + 814: d8 01 movw r26, r16 + 816: 16 96 adiw r26, 0x06 ; 6 + 818: 8d 91 ld r24, X+ + 81a: 9c 91 ld r25, X + 81c: 17 97 sbiw r26, 0x07 ; 7 + 81e: 01 96 adiw r24, 0x01 ; 1 + 820: 17 96 adiw r26, 0x07 ; 7 + 822: 9c 93 st X, r25 + 824: 8e 93 st -X, r24 + 826: 16 97 sbiw r26, 0x06 ; 6 + 828: ce 01 movw r24, r28 + 82a: df 91 pop r29 + 82c: cf 91 pop r28 + 82e: 1f 91 pop r17 + 830: 0f 91 pop r16 + 832: 08 95 ret + +00000834 <__ultoa_invert>: + 834: fa 01 movw r30, r20 + 836: aa 27 eor r26, r26 + 838: 28 30 cpi r18, 0x08 ; 8 + 83a: 51 f1 breq .+84 ; 0x890 <__ultoa_invert+0x5c> + 83c: 20 31 cpi r18, 0x10 ; 16 + 83e: 81 f1 breq .+96 ; 0x8a0 <__ultoa_invert+0x6c> + 840: e8 94 clt + 842: 6f 93 push r22 + 844: 6e 7f andi r22, 0xFE ; 254 + 846: 6e 5f subi r22, 0xFE ; 254 + 848: 7f 4f sbci r23, 0xFF ; 255 + 84a: 8f 4f sbci r24, 0xFF ; 255 + 84c: 9f 4f sbci r25, 0xFF ; 255 + 84e: af 4f sbci r26, 0xFF ; 255 + 850: b1 e0 ldi r27, 0x01 ; 1 + 852: 3e d0 rcall .+124 ; 0x8d0 <__ultoa_invert+0x9c> + 854: b4 e0 ldi r27, 0x04 ; 4 + 856: 3c d0 rcall .+120 ; 0x8d0 <__ultoa_invert+0x9c> + 858: 67 0f add r22, r23 + 85a: 78 1f adc r23, r24 + 85c: 89 1f adc r24, r25 + 85e: 9a 1f adc r25, r26 + 860: a1 1d adc r26, r1 + 862: 68 0f add r22, r24 + 864: 79 1f adc r23, r25 + 866: 8a 1f adc r24, r26 + 868: 91 1d adc r25, r1 + 86a: a1 1d adc r26, r1 + 86c: 6a 0f add r22, r26 + 86e: 71 1d adc r23, r1 + 870: 81 1d adc r24, r1 + 872: 91 1d adc r25, r1 + 874: a1 1d adc r26, r1 + 876: 20 d0 rcall .+64 ; 0x8b8 <__ultoa_invert+0x84> + 878: 09 f4 brne .+2 ; 0x87c <__ultoa_invert+0x48> + 87a: 68 94 set + 87c: 3f 91 pop r19 + 87e: 2a e0 ldi r18, 0x0A ; 10 + 880: 26 9f mul r18, r22 + 882: 11 24 eor r1, r1 + 884: 30 19 sub r19, r0 + 886: 30 5d subi r19, 0xD0 ; 208 + 888: 31 93 st Z+, r19 + 88a: de f6 brtc .-74 ; 0x842 <__ultoa_invert+0xe> + 88c: cf 01 movw r24, r30 + 88e: 08 95 ret + 890: 46 2f mov r20, r22 + 892: 47 70 andi r20, 0x07 ; 7 + 894: 40 5d subi r20, 0xD0 ; 208 + 896: 41 93 st Z+, r20 + 898: b3 e0 ldi r27, 0x03 ; 3 + 89a: 0f d0 rcall .+30 ; 0x8ba <__ultoa_invert+0x86> + 89c: c9 f7 brne .-14 ; 0x890 <__ultoa_invert+0x5c> + 89e: f6 cf rjmp .-20 ; 0x88c <__ultoa_invert+0x58> + 8a0: 46 2f mov r20, r22 + 8a2: 4f 70 andi r20, 0x0F ; 15 + 8a4: 40 5d subi r20, 0xD0 ; 208 + 8a6: 4a 33 cpi r20, 0x3A ; 58 + 8a8: 18 f0 brcs .+6 ; 0x8b0 <__ultoa_invert+0x7c> + 8aa: 49 5d subi r20, 0xD9 ; 217 + 8ac: 31 fd sbrc r19, 1 + 8ae: 40 52 subi r20, 0x20 ; 32 + 8b0: 41 93 st Z+, r20 + 8b2: 02 d0 rcall .+4 ; 0x8b8 <__ultoa_invert+0x84> + 8b4: a9 f7 brne .-22 ; 0x8a0 <__ultoa_invert+0x6c> + 8b6: ea cf rjmp .-44 ; 0x88c <__ultoa_invert+0x58> + 8b8: b4 e0 ldi r27, 0x04 ; 4 + 8ba: a6 95 lsr r26 + 8bc: 97 95 ror r25 + 8be: 87 95 ror r24 + 8c0: 77 95 ror r23 + 8c2: 67 95 ror r22 + 8c4: ba 95 dec r27 + 8c6: c9 f7 brne .-14 ; 0x8ba <__ultoa_invert+0x86> + 8c8: 00 97 sbiw r24, 0x00 ; 0 + 8ca: 61 05 cpc r22, r1 + 8cc: 71 05 cpc r23, r1 + 8ce: 08 95 ret + 8d0: 9b 01 movw r18, r22 + 8d2: ac 01 movw r20, r24 + 8d4: 0a 2e mov r0, r26 + 8d6: 06 94 lsr r0 + 8d8: 57 95 ror r21 + 8da: 47 95 ror r20 + 8dc: 37 95 ror r19 + 8de: 27 95 ror r18 + 8e0: ba 95 dec r27 + 8e2: c9 f7 brne .-14 ; 0x8d6 <__ultoa_invert+0xa2> + 8e4: 62 0f add r22, r18 + 8e6: 73 1f adc r23, r19 + 8e8: 84 1f adc r24, r20 + 8ea: 95 1f adc r25, r21 + 8ec: a0 1d adc r26, r0 + 8ee: 08 95 ret + +000008f0 <_exit>: + 8f0: f8 94 cli + +000008f2 <__stop_program>: + 8f2: ff cf rjmp .-2 ; 0x8f2 <__stop_program> diff --git a/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.srec b/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.srec index cfb5d3c..45e9be2 100644 --- a/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.srec +++ b/Microcontrollers/opdracht 4.1/Debug/opdracht 4.1.srec @@ -1,16 +1,16 @@ S01400006F7064726163687420342E312E7372656308 S113000045C0000058C0000056C0000054C00000A5 S113001052C0000050C000004EC000004CC00000A0 -S11300204AC00000DFC0000046C0000044C0000019 +S11300204AC000003BC1000046C0000044C00000BC S113003042C0000040C000003EC000003CC00000C0 S11300403AC0000038C0000036C0000034C00000D0 S113005032C0000030C000002EC000002CC00000E0 S11300602AC0000028C0000026C0000024C00000F0 S113007022C0000020C000001EC000001CC0000000 S11300801AC0000018C0000016C0000011241FBED2 -S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E2E3FD -S11300A0F2E000E00BBF02C007900D92AC30B10744 -S11300B0D9F7A2D0BCC0A4CF9BB321E030E002C0EA +S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E4EFEF +S11300A0F8E000E00BBF02C007900D92A430B10746 +S11300B0D9F711D11DC4A4CF9BB321E030E002C015 S11300C0220F331F8A95E2F7292B2BBB08959BB38C S11300D021E030E002C0220F331F8A95E2F7209519 S11300E029232BBB089586E090E0E6DF89EF90E0BA @@ -26,14 +26,122 @@ S1130170C0E2C5BBB8DFC5BBB6DF80E885BBB3DF73 S113018015BAB1DF80EF85BBAEDF15BAACDF80E610 S113019085BBA9DF82E0CADFA6DFCF910895CF93A4 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@@ * Author: Sem */ +#include #include #include #include @@ -80,6 +81,13 @@ void init_4bits_mode(void) { lcd_strobe_lcd_e(); } +void lcd_write_integer(int number){ + int length = snprintf(NULL, 0, "%d", number + 1); + char str[length + 1]; + snprintf(str, length + 1, "%d", number); + lcd_write_string(str); +} + void lcd_write_character(unsigned char byte){ diff --git a/Microcontrollers/opdracht 4.1/lcd_control.h b/Microcontrollers/opdracht 4.1/lcd_control.h index bd67e0c..e1ad343 100644 --- a/Microcontrollers/opdracht 4.1/lcd_control.h +++ b/Microcontrollers/opdracht 4.1/lcd_control.h @@ -22,6 +22,7 @@ void init_4bits_mode(void); void lcd_write_string(const char *str); void lcd_write_character(unsigned char byte); void lcd_write_command(unsigned char byte); +void lcd_write_integer(int number); void lcd_move_right(void); void lcd_clear(); diff --git a/Microcontrollers/opdracht 4.1/main.c b/Microcontrollers/opdracht 4.1/main.c index 5faaad6..ef221b3 100644 --- a/Microcontrollers/opdracht 4.1/main.c +++ b/Microcontrollers/opdracht 4.1/main.c @@ -6,7 +6,9 @@ */ -#define F_CPU 10e6 +#define F_CPU 8e6 +#include +#include #include #include #include @@ -31,40 +33,51 @@ void timer2Init( void ) { } ISR( TIMER2_COMP_vect ) { - + ADCSRA |= BIT(6); } int getADCValue(){ int value = 0; value = ADCH; value <<= 2; - value += ADCL; + value += (ADCL >> 6); return value; } + + int main(void) { + int previousValue = 0; /* Replace with your application code */ DDRF = 0x00; // set port F input. DDRE = 0xFF; // all port A output. adcInit(); init_4bits_mode(); - lcd_clear(); - lcd_move_right(); - lcd_move_right(); - lcd_write_string("MOOOOOOOOO"); - _delay_ms(10); + lcd_clear(); - //timer2Init(); + timer2Init(); while (1) { - ADCSRA |= BIT(6); - PORTE = ADCH; - //lcd_clear(); - //lcd_write_character(getADCValue()); - wait(10); + PORTD = ADCH; + PORTE = ADCL; + + int number = ADCH; + + if(previousValue != number){ + + lcd_clear(); + + wait(10); + + lcd_write_integer(getADCValue()); + } + + previousValue = number; + + wait(100); } }