From 9f96c762fce330125c661b7f6d336d80a7d523c4 Mon Sep 17 00:00:00 2001 From: Sem van der Hoeven Date: Thu, 18 Mar 2021 20:11:44 +0100 Subject: [PATCH] [ADD] timer, but I don't think it works yet --- .../Debug/ultrasonicSensor.lss | 1394 +++++++++++++++-- .../Debug/ultrasonicSensor.srec | 175 ++- .../ultrasonicSensor/lcd_control.c | 4 +- Microcontrollers/ultrasonicSensor/main.c | 34 +- 4 files changed, 1410 insertions(+), 197 deletions(-) diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss index afcd37b..da8af0d 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.lss @@ -3,29 +3,31 @@ ultrasonicSensor.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 00000002 00800100 0000017c 000001f0 2**0 + 0 .data 00000004 00800100 0000094a 000009de 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 0000017c 00000000 00000000 00000074 2**1 + 1 .text 0000094a 00000000 00000000 00000094 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .comment 00000030 00000000 00000000 000001f2 2**0 + 2 .bss 00000002 00800104 00800104 000009e2 2**0 + ALLOC + 3 .comment 0000005c 00000000 00000000 000009e2 2**0 CONTENTS, READONLY - 3 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000224 2**2 + 4 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000a40 2**2 CONTENTS, READONLY - 4 .debug_aranges 00000040 00000000 00000000 00000260 2**0 + 5 .debug_aranges 000000b8 00000000 00000000 00000a7c 2**0 CONTENTS, READONLY, DEBUGGING - 5 .debug_info 00000a15 00000000 00000000 000002a0 2**0 + 6 .debug_info 00000fd4 00000000 00000000 00000b34 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_abbrev 000008a7 00000000 00000000 00000cb5 2**0 + 7 .debug_abbrev 00000a97 00000000 00000000 00001b08 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_line 00000384 00000000 00000000 0000155c 2**0 + 8 .debug_line 0000071a 00000000 00000000 0000259f 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_frame 00000080 00000000 00000000 000018e0 2**2 + 9 .debug_frame 000001b4 00000000 00000000 00002cbc 2**2 CONTENTS, READONLY, DEBUGGING - 9 .debug_str 00000498 00000000 00000000 00001960 2**0 + 10 .debug_str 0000059a 00000000 00000000 00002e70 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_loc 0000013d 00000000 00000000 00001df8 2**0 + 11 .debug_loc 0000047c 00000000 00000000 0000340a 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_ranges 00000030 00000000 00000000 00001f35 2**0 + 12 .debug_ranges 00000098 00000000 00000000 00003886 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -33,73 +35,73 @@ Disassembly of section .text: 00000000 <__vectors>: 0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end> 2: 00 00 nop - 4: 82 c0 rjmp .+260 ; 0x10a <__vector_1> + 4: 62 c1 rjmp .+708 ; 0x2ca <__vector_1> 6: 00 00 nop - 8: 56 c0 rjmp .+172 ; 0xb6 <__bad_interrupt> + 8: 5e c0 rjmp .+188 ; 0xc6 <__bad_interrupt> a: 00 00 nop - c: 54 c0 rjmp .+168 ; 0xb6 <__bad_interrupt> + c: 5c c0 rjmp .+184 ; 0xc6 <__bad_interrupt> e: 00 00 nop - 10: 52 c0 rjmp .+164 ; 0xb6 <__bad_interrupt> + 10: 5a c0 rjmp .+180 ; 0xc6 <__bad_interrupt> 12: 00 00 nop - 14: 50 c0 rjmp .+160 ; 0xb6 <__bad_interrupt> + 14: 58 c0 rjmp .+176 ; 0xc6 <__bad_interrupt> 16: 00 00 nop - 18: 4e c0 rjmp .+156 ; 0xb6 <__bad_interrupt> + 18: 56 c0 rjmp .+172 ; 0xc6 <__bad_interrupt> 1a: 00 00 nop - 1c: 4c c0 rjmp .+152 ; 0xb6 <__bad_interrupt> + 1c: 54 c0 rjmp .+168 ; 0xc6 <__bad_interrupt> 1e: 00 00 nop - 20: 4a c0 rjmp .+148 ; 0xb6 <__bad_interrupt> + 20: 52 c0 rjmp .+164 ; 0xc6 <__bad_interrupt> 22: 00 00 nop - 24: 48 c0 rjmp .+144 ; 0xb6 <__bad_interrupt> + 24: 50 c0 rjmp .+160 ; 0xc6 <__bad_interrupt> 26: 00 00 nop - 28: 46 c0 rjmp .+140 ; 0xb6 <__bad_interrupt> + 28: 4e c0 rjmp .+156 ; 0xc6 <__bad_interrupt> 2a: 00 00 nop - 2c: 44 c0 rjmp .+136 ; 0xb6 <__bad_interrupt> + 2c: 4c c0 rjmp .+152 ; 0xc6 <__bad_interrupt> 2e: 00 00 nop - 30: 42 c0 rjmp .+132 ; 0xb6 <__bad_interrupt> + 30: 4a c0 rjmp .+148 ; 0xc6 <__bad_interrupt> 32: 00 00 nop - 34: 40 c0 rjmp .+128 ; 0xb6 <__bad_interrupt> + 34: 48 c0 rjmp .+144 ; 0xc6 <__bad_interrupt> 36: 00 00 nop - 38: 3e c0 rjmp .+124 ; 0xb6 <__bad_interrupt> + 38: 46 c0 rjmp .+140 ; 0xc6 <__bad_interrupt> 3a: 00 00 nop - 3c: 3c c0 rjmp .+120 ; 0xb6 <__bad_interrupt> + 3c: 44 c0 rjmp .+136 ; 0xc6 <__bad_interrupt> 3e: 00 00 nop - 40: 3a c0 rjmp .+116 ; 0xb6 <__bad_interrupt> + 40: 42 c0 rjmp .+132 ; 0xc6 <__bad_interrupt> 42: 00 00 nop - 44: 38 c0 rjmp .+112 ; 0xb6 <__bad_interrupt> + 44: 40 c0 rjmp .+128 ; 0xc6 <__bad_interrupt> 46: 00 00 nop - 48: 36 c0 rjmp .+108 ; 0xb6 <__bad_interrupt> + 48: 3e c0 rjmp .+124 ; 0xc6 <__bad_interrupt> 4a: 00 00 nop - 4c: 34 c0 rjmp .+104 ; 0xb6 <__bad_interrupt> + 4c: 3c c0 rjmp .+120 ; 0xc6 <__bad_interrupt> 4e: 00 00 nop - 50: 32 c0 rjmp .+100 ; 0xb6 <__bad_interrupt> + 50: 3a c0 rjmp .+116 ; 0xc6 <__bad_interrupt> 52: 00 00 nop - 54: 30 c0 rjmp .+96 ; 0xb6 <__bad_interrupt> + 54: 38 c0 rjmp .+112 ; 0xc6 <__bad_interrupt> 56: 00 00 nop - 58: 2e c0 rjmp .+92 ; 0xb6 <__bad_interrupt> + 58: 36 c0 rjmp .+108 ; 0xc6 <__bad_interrupt> 5a: 00 00 nop - 5c: 2c c0 rjmp .+88 ; 0xb6 <__bad_interrupt> + 5c: 34 c0 rjmp .+104 ; 0xc6 <__bad_interrupt> 5e: 00 00 nop - 60: 2a c0 rjmp .+84 ; 0xb6 <__bad_interrupt> + 60: 32 c0 rjmp .+100 ; 0xc6 <__bad_interrupt> 62: 00 00 nop - 64: 28 c0 rjmp .+80 ; 0xb6 <__bad_interrupt> + 64: 30 c0 rjmp .+96 ; 0xc6 <__bad_interrupt> 66: 00 00 nop - 68: 26 c0 rjmp .+76 ; 0xb6 <__bad_interrupt> + 68: 2e c0 rjmp .+92 ; 0xc6 <__bad_interrupt> 6a: 00 00 nop - 6c: 24 c0 rjmp .+72 ; 0xb6 <__bad_interrupt> + 6c: 2c c0 rjmp .+88 ; 0xc6 <__bad_interrupt> 6e: 00 00 nop - 70: 22 c0 rjmp .+68 ; 0xb6 <__bad_interrupt> + 70: 2a c0 rjmp .+84 ; 0xc6 <__bad_interrupt> 72: 00 00 nop - 74: 20 c0 rjmp .+64 ; 0xb6 <__bad_interrupt> + 74: 28 c0 rjmp .+80 ; 0xc6 <__bad_interrupt> 76: 00 00 nop - 78: 1e c0 rjmp .+60 ; 0xb6 <__bad_interrupt> + 78: 26 c0 rjmp .+76 ; 0xc6 <__bad_interrupt> 7a: 00 00 nop - 7c: 1c c0 rjmp .+56 ; 0xb6 <__bad_interrupt> + 7c: 24 c0 rjmp .+72 ; 0xc6 <__bad_interrupt> 7e: 00 00 nop - 80: 1a c0 rjmp .+52 ; 0xb6 <__bad_interrupt> + 80: 22 c0 rjmp .+68 ; 0xc6 <__bad_interrupt> 82: 00 00 nop - 84: 18 c0 rjmp .+48 ; 0xb6 <__bad_interrupt> + 84: 20 c0 rjmp .+64 ; 0xc6 <__bad_interrupt> 86: 00 00 nop - 88: 16 c0 rjmp .+44 ; 0xb6 <__bad_interrupt> + 88: 1e c0 rjmp .+60 ; 0xc6 <__bad_interrupt> ... 0000008c <__ctors_end>: @@ -114,212 +116,1282 @@ Disassembly of section .text: 98: 11 e0 ldi r17, 0x01 ; 1 9a: a0 e0 ldi r26, 0x00 ; 0 9c: b1 e0 ldi r27, 0x01 ; 1 - 9e: ec e7 ldi r30, 0x7C ; 124 - a0: f1 e0 ldi r31, 0x01 ; 1 + 9e: ea e4 ldi r30, 0x4A ; 74 + a0: f9 e0 ldi r31, 0x09 ; 9 a2: 00 e0 ldi r16, 0x00 ; 0 a4: 0b bf out 0x3b, r16 ; 59 a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14> a8: 07 90 elpm r0, Z+ aa: 0d 92 st X+, r0 - ac: a2 30 cpi r26, 0x02 ; 2 + ac: a4 30 cpi r26, 0x04 ; 4 ae: b1 07 cpc r27, r17 b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10> - b2: 47 d0 rcall .+142 ; 0x142
- b4: 61 c0 rjmp .+194 ; 0x178 <_exit> -000000b6 <__bad_interrupt>: - b6: a4 cf rjmp .-184 ; 0x0 <__vectors> +000000b2 <__do_clear_bss>: + b2: 21 e0 ldi r18, 0x01 ; 1 + b4: a4 e0 ldi r26, 0x04 ; 4 + b6: b1 e0 ldi r27, 0x01 ; 1 + b8: 01 c0 rjmp .+2 ; 0xbc <.do_clear_bss_start> -000000b8 : +000000ba <.do_clear_bss_loop>: + ba: 1d 92 st X+, r1 + +000000bc <.do_clear_bss_start>: + bc: a6 30 cpi r26, 0x06 ; 6 + be: b2 07 cpc r27, r18 + c0: e1 f7 brne .-8 ; 0xba <.do_clear_bss_loop> + c2: 29 d1 rcall .+594 ; 0x316
+ c4: 40 c4 rjmp .+2176 ; 0x946 <_exit> + +000000c6 <__bad_interrupt>: + c6: 9c cf rjmp .-200 ; 0x0 <__vectors> + +000000c8 : + } +} + +void lcd_move_right(void){ -static enum interrupt_status int_stat = INTERRUPT_RISING; + lcd_write_command(0x1E); + c8: 9b b3 in r25, 0x1b ; 27 + ca: 21 e0 ldi r18, 0x01 ; 1 + cc: 30 e0 ldi r19, 0x00 ; 0 + ce: 02 c0 rjmp .+4 ; 0xd4 + d0: 22 0f add r18, r18 + d2: 33 1f adc r19, r19 + d4: 8a 95 dec r24 + d6: e2 f7 brpl .-8 ; 0xd0 + d8: 29 2b or r18, r25 + da: 2b bb out 0x1b, r18 ; 27 + dc: 08 95 ret + +000000de : + de: 9b b3 in r25, 0x1b ; 27 + e0: 21 e0 ldi r18, 0x01 ; 1 + e2: 30 e0 ldi r19, 0x00 ; 0 + e4: 02 c0 rjmp .+4 ; 0xea + e6: 22 0f add r18, r18 + e8: 33 1f adc r19, r19 + ea: 8a 95 dec r24 + ec: e2 f7 brpl .-8 ; 0xe6 + ee: 20 95 com r18 + f0: 29 23 and r18, r25 + f2: 2b bb out 0x1b, r18 ; 27 + f4: 08 95 ret + +000000f6 : + f6: 86 e0 ldi r24, 0x06 ; 6 + f8: 90 e0 ldi r25, 0x00 ; 0 + fa: e6 df rcall .-52 ; 0xc8 + fc: 83 ec ldi r24, 0xC3 ; 195 + fe: 99 e0 ldi r25, 0x09 ; 9 + 100: 01 97 sbiw r24, 0x01 ; 1 + 102: f1 f7 brne .-4 ; 0x100 + 104: 00 c0 rjmp .+0 ; 0x106 + 106: 00 00 nop + 108: 86 e0 ldi r24, 0x06 ; 6 + 10a: 90 e0 ldi r25, 0x00 ; 0 + 10c: e8 df rcall .-48 ; 0xde + 10e: 83 ec ldi r24, 0xC3 ; 195 + 110: 99 e0 ldi r25, 0x09 ; 9 + 112: 01 97 sbiw r24, 0x01 ; 1 + 114: f1 f7 brne .-4 ; 0x112 + 116: 00 c0 rjmp .+0 ; 0x118 + 118: 00 00 nop + 11a: 08 95 ret + +0000011c : + 11c: cf 93 push r28 + 11e: c8 2f mov r28, r24 + 120: 85 bb out 0x15, r24 ; 21 + 122: 84 e0 ldi r24, 0x04 ; 4 + 124: 90 e0 ldi r25, 0x00 ; 0 + 126: d0 df rcall .-96 ; 0xc8 + 128: e6 df rcall .-52 ; 0xf6 + 12a: c2 95 swap r28 + 12c: c0 7f andi r28, 0xF0 ; 240 + 12e: c5 bb out 0x15, r28 ; 21 + 130: 84 e0 ldi r24, 0x04 ; 4 + 132: 90 e0 ldi r25, 0x00 ; 0 + 134: c9 df rcall .-110 ; 0xc8 + 136: df df rcall .-66 ; 0xf6 + 138: cf 91 pop r28 + 13a: 08 95 ret + +0000013c : + 13c: cf 93 push r28 + 13e: c8 2f mov r28, r24 + 140: 85 bb out 0x15, r24 ; 21 + 142: 84 e0 ldi r24, 0x04 ; 4 + 144: 90 e0 ldi r25, 0x00 ; 0 + 146: cb df rcall .-106 ; 0xde + 148: d6 df rcall .-84 ; 0xf6 + 14a: c2 95 swap r28 + 14c: c0 7f andi r28, 0xF0 ; 240 + 14e: c5 bb out 0x15, r28 ; 21 + 150: 84 e0 ldi r24, 0x04 ; 4 + 152: 90 e0 ldi r25, 0x00 ; 0 + 154: c4 df rcall .-120 ; 0xde + 156: cf df rcall .-98 ; 0xf6 + 158: cf 91 pop r28 + 15a: 08 95 ret + +0000015c : + 15c: 81 e0 ldi r24, 0x01 ; 1 + 15e: ee df rcall .-36 ; 0x13c + 160: 87 e8 ldi r24, 0x87 ; 135 + 162: 93 e1 ldi r25, 0x13 ; 19 + 164: 01 97 sbiw r24, 0x01 ; 1 + 166: f1 f7 brne .-4 ; 0x164 + 168: 00 c0 rjmp .+0 ; 0x16a + 16a: 00 00 nop + 16c: 80 e8 ldi r24, 0x80 ; 128 + 16e: e6 cf rjmp .-52 ; 0x13c + 170: 08 95 ret + +00000172 : + 172: cf 93 push r28 + 174: 8f ef ldi r24, 0xFF ; 255 + 176: 84 bb out 0x14, r24 ; 20 + 178: 85 bb out 0x15, r24 ; 21 + 17a: 81 bb out 0x11, r24 ; 17 + 17c: 8a bb out 0x1a, r24 ; 26 + 17e: 15 ba out 0x15, r1 ; 21 + 180: 1b ba out 0x1b, r1 ; 27 + 182: c0 e2 ldi r28, 0x20 ; 32 + 184: c5 bb out 0x15, r28 ; 21 + 186: b7 df rcall .-146 ; 0xf6 + 188: c5 bb out 0x15, r28 ; 21 + 18a: b5 df rcall .-150 ; 0xf6 + 18c: 80 e8 ldi r24, 0x80 ; 128 + 18e: 85 bb out 0x15, r24 ; 21 + 190: b2 df rcall .-156 ; 0xf6 + 192: 15 ba out 0x15, r1 ; 21 + 194: b0 df rcall .-160 ; 0xf6 + 196: 80 ef ldi r24, 0xF0 ; 240 + 198: 85 bb out 0x15, r24 ; 21 + 19a: ad df rcall .-166 ; 0xf6 + 19c: 15 ba out 0x15, r1 ; 21 + 19e: ab df rcall .-170 ; 0xf6 + 1a0: 80 e6 ldi r24, 0x60 ; 96 + 1a2: 85 bb out 0x15, r24 ; 21 + 1a4: a8 df rcall .-176 ; 0xf6 + 1a6: 82 e0 ldi r24, 0x02 ; 2 + 1a8: c9 df rcall .-110 ; 0x13c + 1aa: a5 df rcall .-182 ; 0xf6 + 1ac: cf 91 pop r28 + 1ae: 08 95 ret + +000001b0 : + 1b0: cf 93 push r28 + 1b2: df 93 push r29 + 1b4: ec 01 movw r28, r24 + 1b6: 02 c0 rjmp .+4 ; 0x1bc + 1b8: b1 df rcall .-158 ; 0x11c + 1ba: 21 96 adiw r28, 0x01 ; 1 + 1bc: 88 81 ld r24, Y + 1be: 81 11 cpse r24, r1 + 1c0: fb cf rjmp .-10 ; 0x1b8 + 1c2: df 91 pop r29 + 1c4: cf 91 pop r28 + 1c6: 08 95 ret + +000001c8 : +} + +void lcd_write_int(int number) +{ + 1c8: af 92 push r10 + 1ca: bf 92 push r11 + 1cc: cf 92 push r12 + 1ce: df 92 push r13 + 1d0: ef 92 push r14 + 1d2: ff 92 push r15 + 1d4: 0f 93 push r16 + 1d6: 1f 93 push r17 + 1d8: cf 93 push r28 + 1da: df 93 push r29 + 1dc: cd b7 in r28, 0x3d ; 61 + 1de: de b7 in r29, 0x3e ; 62 + 1e0: d8 2e mov r13, r24 + 1e2: c9 2e mov r12, r25 + int length = snprintf(NULL, 0, "%d", number); + char str[length + 1]; + snprintf(str, length + 1, "%d", number); + lcd_write_string(str); +} + 1e4: ad b6 in r10, 0x3d ; 61 + 1e6: be b6 in r11, 0x3e ; 62 + lcd_write_command(0x1E); +} + +void lcd_write_int(int number) +{ + int length = snprintf(NULL, 0, "%d", number); + 1e8: 9f 93 push r25 + 1ea: 8f 93 push r24 + 1ec: 0f 2e mov r0, r31 + 1ee: f1 e0 ldi r31, 0x01 ; 1 + 1f0: ef 2e mov r14, r31 + 1f2: f1 e0 ldi r31, 0x01 ; 1 + 1f4: ff 2e mov r15, r31 + 1f6: f0 2d mov r31, r0 + 1f8: ff 92 push r15 + 1fa: ef 92 push r14 + 1fc: 1f 92 push r1 + 1fe: 1f 92 push r1 + 200: 1f 92 push r1 + 202: 1f 92 push r1 + 204: b7 d0 rcall .+366 ; 0x374 + char str[length + 1]; + 206: 01 96 adiw r24, 0x01 ; 1 + 208: 2d b7 in r18, 0x3d ; 61 + 20a: 3e b7 in r19, 0x3e ; 62 + 20c: 28 5f subi r18, 0xF8 ; 248 + 20e: 3f 4f sbci r19, 0xFF ; 255 + 210: 0f b6 in r0, 0x3f ; 63 + 212: f8 94 cli + 214: 3e bf out 0x3e, r19 ; 62 + 216: 0f be out 0x3f, r0 ; 63 + 218: 2d bf out 0x3d, r18 ; 61 + 21a: 28 1b sub r18, r24 + 21c: 39 0b sbc r19, r25 + 21e: 0f b6 in r0, 0x3f ; 63 + 220: f8 94 cli + 222: 3e bf out 0x3e, r19 ; 62 + 224: 0f be out 0x3f, r0 ; 63 + 226: 2d bf out 0x3d, r18 ; 61 + 228: 0d b7 in r16, 0x3d ; 61 + 22a: 1e b7 in r17, 0x3e ; 62 + 22c: 0f 5f subi r16, 0xFF ; 255 + 22e: 1f 4f sbci r17, 0xFF ; 255 + snprintf(str, length + 1, "%d", number); + 230: cf 92 push r12 + 232: df 92 push r13 + 234: ff 92 push r15 + 236: ef 92 push r14 + 238: 9f 93 push r25 + 23a: 8f 93 push r24 + 23c: 1f 93 push r17 + 23e: 0f 93 push r16 + 240: 99 d0 rcall .+306 ; 0x374 + lcd_write_string(str); + 242: 80 2f mov r24, r16 + 244: 91 2f mov r25, r17 + 246: b4 df rcall .-152 ; 0x1b0 +} + 248: 8d b7 in r24, 0x3d ; 61 + 24a: 9e b7 in r25, 0x3e ; 62 + 24c: 08 96 adiw r24, 0x08 ; 8 + 24e: 0f b6 in r0, 0x3f ; 63 + 250: f8 94 cli + 252: 9e bf out 0x3e, r25 ; 62 + 254: 0f be out 0x3f, r0 ; 63 + 256: 8d bf out 0x3d, r24 ; 61 + 258: 0f b6 in r0, 0x3f ; 63 + 25a: f8 94 cli + 25c: be be out 0x3e, r11 ; 62 + 25e: 0f be out 0x3f, r0 ; 63 + 260: ad be out 0x3d, r10 ; 61 + 262: df 91 pop r29 + 264: cf 91 pop r28 + 266: 1f 91 pop r17 + 268: 0f 91 pop r16 + 26a: ff 90 pop r15 + 26c: ef 90 pop r14 + 26e: df 90 pop r13 + 270: cf 90 pop r12 + 272: bf 90 pop r11 + 274: af 90 pop r10 + 276: 08 95 ret + +00000278 : + +uint16_t timer_dist = 0; // time measured by timer; void wait_us(unsigned int us) { for(int i = 0; i < us; i++) - b8: 20 e0 ldi r18, 0x00 ; 0 - ba: 30 e0 ldi r19, 0x00 ; 0 - bc: 06 c0 rjmp .+12 ; 0xca + 278: 20 e0 ldi r18, 0x00 ; 0 + 27a: 30 e0 ldi r19, 0x00 ; 0 + 27c: 06 c0 rjmp .+12 ; 0x28a #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); - be: 46 e0 ldi r20, 0x06 ; 6 - c0: 4a 95 dec r20 - c2: f1 f7 brne .-4 ; 0xc0 - c4: 00 c0 rjmp .+0 ; 0xc6 - c6: 2f 5f subi r18, 0xFF ; 255 - c8: 3f 4f sbci r19, 0xFF ; 255 - ca: 28 17 cp r18, r24 - cc: 39 07 cpc r19, r25 - ce: b8 f3 brcs .-18 ; 0xbe + 27e: 46 e0 ldi r20, 0x06 ; 6 + 280: 4a 95 dec r20 + 282: f1 f7 brne .-4 ; 0x280 + 284: 00 c0 rjmp .+0 ; 0x286 + 286: 2f 5f subi r18, 0xFF ; 255 + 288: 3f 4f sbci r19, 0xFF ; 255 + 28a: 28 17 cp r18, r24 + 28c: 39 07 cpc r19, r25 + 28e: b8 f3 brcs .-18 ; 0x27e { _delay_us(1); } } - d0: 08 95 ret + 290: 08 95 ret -000000d2 : +00000292 : void wait_ms(unsigned int ms) { for(int i = 0; i < ms; i++) - d2: 20 e0 ldi r18, 0x00 ; 0 - d4: 30 e0 ldi r19, 0x00 ; 0 - d6: 08 c0 rjmp .+16 ; 0xe8 + 292: 20 e0 ldi r18, 0x00 ; 0 + 294: 30 e0 ldi r19, 0x00 ; 0 + 296: 08 c0 rjmp .+16 ; 0x2a8 #else //round up by default __ticks_dc = (uint32_t)(ceil(fabs(__tmp))); #endif __builtin_avr_delay_cycles(__ticks_dc); - d8: e7 e8 ldi r30, 0x87 ; 135 - da: f3 e1 ldi r31, 0x13 ; 19 - dc: 31 97 sbiw r30, 0x01 ; 1 - de: f1 f7 brne .-4 ; 0xdc - e0: 00 c0 rjmp .+0 ; 0xe2 - e2: 00 00 nop - e4: 2f 5f subi r18, 0xFF ; 255 - e6: 3f 4f sbci r19, 0xFF ; 255 - e8: 28 17 cp r18, r24 - ea: 39 07 cpc r19, r25 - ec: a8 f3 brcs .-22 ; 0xd8 + 298: e7 e8 ldi r30, 0x87 ; 135 + 29a: f3 e1 ldi r31, 0x13 ; 19 + 29c: 31 97 sbiw r30, 0x01 ; 1 + 29e: f1 f7 brne .-4 ; 0x29c + 2a0: 00 c0 rjmp .+0 ; 0x2a2 + 2a2: 00 00 nop + 2a4: 2f 5f subi r18, 0xFF ; 255 + 2a6: 3f 4f sbci r19, 0xFF ; 255 + 2a8: 28 17 cp r18, r24 + 2aa: 39 07 cpc r19, r25 + 2ac: a8 f3 brcs .-22 ; 0x298 { _delay_ms(1); } } - ee: 08 95 ret + 2ae: 08 95 ret -000000f0 : +000002b0 : void ultrasonic_send_pulse() { - f0: cf 93 push r28 - f2: df 93 push r29 + 2b0: cf 93 push r28 + 2b2: df 93 push r29 PORTG = 0x00; // 10 us low pulse - f4: c5 e6 ldi r28, 0x65 ; 101 - f6: d0 e0 ldi r29, 0x00 ; 0 - f8: 18 82 st Y, r1 + 2b4: c5 e6 ldi r28, 0x65 ; 101 + 2b6: d0 e0 ldi r29, 0x00 ; 0 + 2b8: 18 82 st Y, r1 wait_us(10); - fa: 8a e0 ldi r24, 0x0A ; 10 - fc: 90 e0 ldi r25, 0x00 ; 0 - fe: dc df rcall .-72 ; 0xb8 + 2ba: 8a e0 ldi r24, 0x0A ; 10 + 2bc: 90 e0 ldi r25, 0x00 ; 0 + 2be: dc df rcall .-72 ; 0x278 PORTG = 0x01; - 100: 81 e0 ldi r24, 0x01 ; 1 - 102: 88 83 st Y, r24 + 2c0: 81 e0 ldi r24, 0x01 ; 1 + 2c2: 88 83 st Y, r24 } - 104: df 91 pop r29 - 106: cf 91 pop r28 - 108: 08 95 ret + 2c4: df 91 pop r29 + 2c6: cf 91 pop r28 + 2c8: 08 95 ret -0000010a <__vector_1>: +000002ca <__vector_1>: ISR(INT0_vect) { - 10a: 1f 92 push r1 - 10c: 0f 92 push r0 - 10e: 0f b6 in r0, 0x3f ; 63 - 110: 0f 92 push r0 - 112: 11 24 eor r1, r1 - 114: 8f 93 push r24 + 2ca: 1f 92 push r1 + 2cc: 0f 92 push r0 + 2ce: 0f b6 in r0, 0x3f ; 63 + 2d0: 0f 92 push r0 + 2d2: 11 24 eor r1, r1 + 2d4: 8f 93 push r24 + 2d6: 9f 93 push r25 // if the interrupt was generated on a rising edge (start sending echo) if (int_stat == INTERRUPT_RISING) - 116: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> - 11a: 81 30 cpi r24, 0x01 ; 1 - 11c: 31 f4 brne .+12 ; 0x12a <__vector_1+0x20> + 2d8: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> + 2dc: 81 30 cpi r24, 0x01 ; 1 + 2de: 41 f4 brne .+16 ; 0x2f0 <__vector_1+0x26> { // set interrupt pin 0 on PORTD to falling edge EICRA = 0x02; - 11e: 82 e0 ldi r24, 0x02 ; 2 - 120: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + 2e0: 82 e0 ldi r24, 0x02 ; 2 + 2e2: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + + // reset the time in timer1 + TCNT1 = 0x00; + 2e6: 1d bc out 0x2d, r1 ; 45 + 2e8: 1c bc out 0x2c, r1 ; 44 // set interrupt status int_stat = INTERRUPT_FALLING; - 124: 10 92 00 01 sts 0x0100, r1 ; 0x800100 <__DATA_REGION_ORIGIN__> - 128: 06 c0 rjmp .+12 ; 0x136 <__vector_1+0x2c> + 2ea: 10 92 00 01 sts 0x0100, r1 ; 0x800100 <__DATA_REGION_ORIGIN__> + 2ee: 0c c0 rjmp .+24 ; 0x308 <__vector_1+0x3e> } else // else if it was generated on a falling edge (end sending echo) { // set interrupt pin 0 on PORTD to rising edge EICRA = 0x03; - 12a: 83 e0 ldi r24, 0x03 ; 3 - 12c: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + 2f0: 83 e0 ldi r24, 0x03 ; 3 + 2f2: 80 93 6a 00 sts 0x006A, r24 ; 0x80006a <__TEXT_REGION_LENGTH__+0x7e006a> + + // read timer1 into time_dist + timer_dist = TCNT1; + 2f6: 8c b5 in r24, 0x2c ; 44 + 2f8: 9d b5 in r25, 0x2d ; 45 + 2fa: 90 93 05 01 sts 0x0105, r25 ; 0x800105 <__data_end+0x1> + 2fe: 80 93 04 01 sts 0x0104, r24 ; 0x800104 <__data_end> // set interrupt status int_stat = INTERRUPT_RISING; - 130: 81 e0 ldi r24, 0x01 ; 1 - 132: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> + 302: 81 e0 ldi r24, 0x01 ; 1 + 304: 80 93 00 01 sts 0x0100, r24 ; 0x800100 <__DATA_REGION_ORIGIN__> } } - 136: 8f 91 pop r24 - 138: 0f 90 pop r0 - 13a: 0f be out 0x3f, r0 ; 63 - 13c: 0f 90 pop r0 - 13e: 1f 90 pop r1 - 140: 18 95 reti + 308: 9f 91 pop r25 + 30a: 8f 91 pop r24 + 30c: 0f 90 pop r0 + 30e: 0f be out 0x3f, r0 ; 63 + 310: 0f 90 pop r0 + 312: 1f 90 pop r1 + 314: 18 95 reti -00000142
: +00000316
: int main(void) { DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug - 142: 8f ef ldi r24, 0xFF ; 255 - 144: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> + 316: 8f ef ldi r24, 0xFF ; 255 + 318: 80 93 64 00 sts 0x0064, r24 ; 0x800064 <__TEXT_REGION_LENGTH__+0x7e0064> DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt - 148: 11 ba out 0x11, r1 ; 17 - - DDRA = 0xFF; - 14a: 8a bb out 0x1a, r24 ; 26 + 31c: 11 ba out 0x11, r1 ; 17 EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge - 14c: ea e6 ldi r30, 0x6A ; 106 - 14e: f0 e0 ldi r31, 0x00 ; 0 - 150: 80 81 ld r24, Z - 152: 83 60 ori r24, 0x03 ; 3 - 154: 80 83 st Z, r24 + 31e: ea e6 ldi r30, 0x6A ; 106 + 320: f0 e0 ldi r31, 0x00 ; 0 + 322: 80 81 ld r24, Z + 324: 83 60 ori r24, 0x03 ; 3 + 326: 80 83 st Z, r24 EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) - 156: 89 b7 in r24, 0x39 ; 57 - 158: 81 60 ori r24, 0x01 ; 1 - 15a: 89 bf out 0x39, r24 ; 57 + 328: 89 b7 in r24, 0x39 ; 57 + 32a: 81 60 ori r24, 0x01 ; 1 + 32c: 89 bf out 0x39, r24 ; 57 + + TCCR1A = 0b00000000; // initialize timer1, prescaler=256 + 32e: 1f bc out 0x2f, r1 ; 47 + TCCR1B = 0b00001100; // CTC compare A, RUN + 330: 8c e0 ldi r24, 0x0C ; 12 + 332: 8e bd out 0x2e, r24 ; 46 + sei(); // turn on interrupt system - 15c: 78 94 sei + 334: 78 94 sei + init_4bits_mode(); + 336: 1d df rcall .-454 ; 0x172 + 338: 8f e4 ldi r24, 0x4F ; 79 + 33a: 93 ec ldi r25, 0xC3 ; 195 + 33c: 01 97 sbiw r24, 0x01 ; 1 + 33e: f1 f7 brne .-4 ; 0x33c + 340: 00 c0 rjmp .+0 ; 0x342 + + _delay_ms(10); + + lcd_clear(); + 342: 00 00 nop + + /* Replace with your application code */ while (1) { ultrasonic_send_pulse(); - 15e: c8 df rcall .-112 ; 0xf0 - if (int_stat == INTERRUPT_FALLING) - 160: 80 91 00 01 lds r24, 0x0100 ; 0x800100 <__DATA_REGION_ORIGIN__> - 164: 81 11 cpse r24, r1 - 166: 03 c0 rjmp .+6 ; 0x16e - { - PORTA = 0xFF; - 168: 8f ef ldi r24, 0xFF ; 255 - 16a: 8b bb out 0x1b, r24 ; 27 - 16c: 01 c0 rjmp .+2 ; 0x170 - } else { - PORTA = 0x00; - 16e: 1b ba out 0x1b, r1 ; 27 - } + 344: 0b df rcall .-490 ; 0x15c + 346: b4 df rcall .-152 ; 0x2b0 + + int distance = timer_dist * 340 / 2; + 348: 20 91 04 01 lds r18, 0x0104 ; 0x800104 <__data_end> + 34c: 30 91 05 01 lds r19, 0x0105 ; 0x800105 <__data_end+0x1> + 350: 84 e5 ldi r24, 0x54 ; 84 + 352: 91 e0 ldi r25, 0x01 ; 1 + 354: 28 9f mul r18, r24 + 356: e0 01 movw r28, r0 + 358: 29 9f mul r18, r25 + 35a: d0 0d add r29, r0 + 35c: 38 9f mul r19, r24 + 35e: d0 0d add r29, r0 + 360: 11 24 eor r1, r1 + 362: d6 95 lsr r29 + lcd_clear(); + 364: c7 95 ror r28 + 366: fa de rcall .-524 ; 0x15c + lcd_write_int(distance); + 368: ce 01 movw r24, r28 + 36a: 2e df rcall .-420 ; 0x1c8 + wait_ms(1000); - 170: 88 ee ldi r24, 0xE8 ; 232 - 172: 93 e0 ldi r25, 0x03 ; 3 - 174: ae df rcall .-164 ; 0xd2 - } - 176: f3 cf rjmp .-26 ; 0x15e + 36c: 88 ee ldi r24, 0xE8 ; 232 + 36e: 93 e0 ldi r25, 0x03 ; 3 + 370: 90 df rcall .-224 ; 0x292 + 372: e9 cf rjmp .-46 ; 0x346 -00000178 <_exit>: - 178: f8 94 cli +00000374 : + 374: 0f 93 push r16 + 376: 1f 93 push r17 + 378: cf 93 push r28 + 37a: df 93 push r29 + 37c: cd b7 in r28, 0x3d ; 61 + 37e: de b7 in r29, 0x3e ; 62 + 380: 2e 97 sbiw r28, 0x0e ; 14 + 382: 0f b6 in r0, 0x3f ; 63 + 384: f8 94 cli + 386: de bf out 0x3e, r29 ; 62 + 388: 0f be out 0x3f, r0 ; 63 + 38a: cd bf out 0x3d, r28 ; 61 + 38c: 0d 89 ldd r16, Y+21 ; 0x15 + 38e: 1e 89 ldd r17, Y+22 ; 0x16 + 390: 8f 89 ldd r24, Y+23 ; 0x17 + 392: 98 8d ldd r25, Y+24 ; 0x18 + 394: 26 e0 ldi r18, 0x06 ; 6 + 396: 2c 83 std Y+4, r18 ; 0x04 + 398: 1a 83 std Y+2, r17 ; 0x02 + 39a: 09 83 std Y+1, r16 ; 0x01 + 39c: 97 ff sbrs r25, 7 + 39e: 02 c0 rjmp .+4 ; 0x3a4 + 3a0: 80 e0 ldi r24, 0x00 ; 0 + 3a2: 90 e8 ldi r25, 0x80 ; 128 + 3a4: 01 97 sbiw r24, 0x01 ; 1 + 3a6: 9e 83 std Y+6, r25 ; 0x06 + 3a8: 8d 83 std Y+5, r24 ; 0x05 + 3aa: ae 01 movw r20, r28 + 3ac: 45 5e subi r20, 0xE5 ; 229 + 3ae: 5f 4f sbci r21, 0xFF ; 255 + 3b0: 69 8d ldd r22, Y+25 ; 0x19 + 3b2: 7a 8d ldd r23, Y+26 ; 0x1a + 3b4: ce 01 movw r24, r28 + 3b6: 01 96 adiw r24, 0x01 ; 1 + 3b8: 19 d0 rcall .+50 ; 0x3ec + 3ba: 4d 81 ldd r20, Y+5 ; 0x05 + 3bc: 5e 81 ldd r21, Y+6 ; 0x06 + 3be: 57 fd sbrc r21, 7 + 3c0: 0a c0 rjmp .+20 ; 0x3d6 + 3c2: 2f 81 ldd r18, Y+7 ; 0x07 + 3c4: 38 85 ldd r19, Y+8 ; 0x08 + 3c6: 42 17 cp r20, r18 + 3c8: 53 07 cpc r21, r19 + 3ca: 0c f4 brge .+2 ; 0x3ce + 3cc: 9a 01 movw r18, r20 + 3ce: f8 01 movw r30, r16 + 3d0: e2 0f add r30, r18 + 3d2: f3 1f adc r31, r19 + 3d4: 10 82 st Z, r1 + 3d6: 2e 96 adiw r28, 0x0e ; 14 + 3d8: 0f b6 in r0, 0x3f ; 63 + 3da: f8 94 cli + 3dc: de bf out 0x3e, r29 ; 62 + 3de: 0f be out 0x3f, r0 ; 63 + 3e0: cd bf out 0x3d, r28 ; 61 + 3e2: df 91 pop r29 + 3e4: cf 91 pop r28 + 3e6: 1f 91 pop r17 + 3e8: 0f 91 pop r16 + 3ea: 08 95 ret -0000017a <__stop_program>: - 17a: ff cf rjmp .-2 ; 0x17a <__stop_program> +000003ec : + 3ec: 2f 92 push r2 + 3ee: 3f 92 push r3 + 3f0: 4f 92 push r4 + 3f2: 5f 92 push r5 + 3f4: 6f 92 push r6 + 3f6: 7f 92 push r7 + 3f8: 8f 92 push r8 + 3fa: 9f 92 push r9 + 3fc: af 92 push r10 + 3fe: bf 92 push r11 + 400: cf 92 push r12 + 402: df 92 push r13 + 404: ef 92 push r14 + 406: ff 92 push r15 + 408: 0f 93 push r16 + 40a: 1f 93 push r17 + 40c: cf 93 push r28 + 40e: df 93 push r29 + 410: cd b7 in r28, 0x3d ; 61 + 412: de b7 in r29, 0x3e ; 62 + 414: 2b 97 sbiw r28, 0x0b ; 11 + 416: 0f b6 in r0, 0x3f ; 63 + 418: f8 94 cli + 41a: de bf out 0x3e, r29 ; 62 + 41c: 0f be out 0x3f, r0 ; 63 + 41e: cd bf out 0x3d, r28 ; 61 + 420: 6c 01 movw r12, r24 + 422: 7b 01 movw r14, r22 + 424: 8a 01 movw r16, r20 + 426: fc 01 movw r30, r24 + 428: 17 82 std Z+7, r1 ; 0x07 + 42a: 16 82 std Z+6, r1 ; 0x06 + 42c: 83 81 ldd r24, Z+3 ; 0x03 + 42e: 81 ff sbrs r24, 1 + 430: bf c1 rjmp .+894 ; 0x7b0 <__LOCK_REGION_LENGTH__+0x3b0> + 432: ce 01 movw r24, r28 + 434: 01 96 adiw r24, 0x01 ; 1 + 436: 3c 01 movw r6, r24 + 438: f6 01 movw r30, r12 + 43a: 93 81 ldd r25, Z+3 ; 0x03 + 43c: f7 01 movw r30, r14 + 43e: 93 fd sbrc r25, 3 + 440: 85 91 lpm r24, Z+ + 442: 93 ff sbrs r25, 3 + 444: 81 91 ld r24, Z+ + 446: 7f 01 movw r14, r30 + 448: 88 23 and r24, r24 + 44a: 09 f4 brne .+2 ; 0x44e <__LOCK_REGION_LENGTH__+0x4e> + 44c: ad c1 rjmp .+858 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> + 44e: 85 32 cpi r24, 0x25 ; 37 + 450: 39 f4 brne .+14 ; 0x460 <__LOCK_REGION_LENGTH__+0x60> + 452: 93 fd sbrc r25, 3 + 454: 85 91 lpm r24, Z+ + 456: 93 ff sbrs r25, 3 + 458: 81 91 ld r24, Z+ + 45a: 7f 01 movw r14, r30 + 45c: 85 32 cpi r24, 0x25 ; 37 + 45e: 21 f4 brne .+8 ; 0x468 <__LOCK_REGION_LENGTH__+0x68> + 460: b6 01 movw r22, r12 + 462: 90 e0 ldi r25, 0x00 ; 0 + 464: d6 d1 rcall .+940 ; 0x812 + 466: e8 cf rjmp .-48 ; 0x438 <__LOCK_REGION_LENGTH__+0x38> + 468: 91 2c mov r9, r1 + 46a: 21 2c mov r2, r1 + 46c: 31 2c mov r3, r1 + 46e: ff e1 ldi r31, 0x1F ; 31 + 470: f3 15 cp r31, r3 + 472: d8 f0 brcs .+54 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> + 474: 8b 32 cpi r24, 0x2B ; 43 + 476: 79 f0 breq .+30 ; 0x496 <__LOCK_REGION_LENGTH__+0x96> + 478: 38 f4 brcc .+14 ; 0x488 <__LOCK_REGION_LENGTH__+0x88> + 47a: 80 32 cpi r24, 0x20 ; 32 + 47c: 79 f0 breq .+30 ; 0x49c <__LOCK_REGION_LENGTH__+0x9c> + 47e: 83 32 cpi r24, 0x23 ; 35 + 480: a1 f4 brne .+40 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> + 482: 23 2d mov r18, r3 + 484: 20 61 ori r18, 0x10 ; 16 + 486: 1d c0 rjmp .+58 ; 0x4c2 <__LOCK_REGION_LENGTH__+0xc2> + 488: 8d 32 cpi r24, 0x2D ; 45 + 48a: 61 f0 breq .+24 ; 0x4a4 <__LOCK_REGION_LENGTH__+0xa4> + 48c: 80 33 cpi r24, 0x30 ; 48 + 48e: 69 f4 brne .+26 ; 0x4aa <__LOCK_REGION_LENGTH__+0xaa> + 490: 23 2d mov r18, r3 + 492: 21 60 ori r18, 0x01 ; 1 + 494: 16 c0 rjmp .+44 ; 0x4c2 <__LOCK_REGION_LENGTH__+0xc2> + 496: 83 2d mov r24, r3 + 498: 82 60 ori r24, 0x02 ; 2 + 49a: 38 2e mov r3, r24 + 49c: e3 2d mov r30, r3 + 49e: e4 60 ori r30, 0x04 ; 4 + 4a0: 3e 2e mov r3, r30 + 4a2: 2a c0 rjmp .+84 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4a4: f3 2d mov r31, r3 + 4a6: f8 60 ori r31, 0x08 ; 8 + 4a8: 1d c0 rjmp .+58 ; 0x4e4 <__LOCK_REGION_LENGTH__+0xe4> + 4aa: 37 fc sbrc r3, 7 + 4ac: 2d c0 rjmp .+90 ; 0x508 <__LOCK_REGION_LENGTH__+0x108> + 4ae: 20 ed ldi r18, 0xD0 ; 208 + 4b0: 28 0f add r18, r24 + 4b2: 2a 30 cpi r18, 0x0A ; 10 + 4b4: 40 f0 brcs .+16 ; 0x4c6 <__LOCK_REGION_LENGTH__+0xc6> + 4b6: 8e 32 cpi r24, 0x2E ; 46 + 4b8: b9 f4 brne .+46 ; 0x4e8 <__LOCK_REGION_LENGTH__+0xe8> + 4ba: 36 fc sbrc r3, 6 + 4bc: 75 c1 rjmp .+746 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> + 4be: 23 2d mov r18, r3 + 4c0: 20 64 ori r18, 0x40 ; 64 + 4c2: 32 2e mov r3, r18 + 4c4: 19 c0 rjmp .+50 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4c6: 36 fe sbrs r3, 6 + 4c8: 06 c0 rjmp .+12 ; 0x4d6 <__LOCK_REGION_LENGTH__+0xd6> + 4ca: 8a e0 ldi r24, 0x0A ; 10 + 4cc: 98 9e mul r9, r24 + 4ce: 20 0d add r18, r0 + 4d0: 11 24 eor r1, r1 + 4d2: 92 2e mov r9, r18 + 4d4: 11 c0 rjmp .+34 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4d6: ea e0 ldi r30, 0x0A ; 10 + 4d8: 2e 9e mul r2, r30 + 4da: 20 0d add r18, r0 + 4dc: 11 24 eor r1, r1 + 4de: 22 2e mov r2, r18 + 4e0: f3 2d mov r31, r3 + 4e2: f0 62 ori r31, 0x20 ; 32 + 4e4: 3f 2e mov r3, r31 + 4e6: 08 c0 rjmp .+16 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4e8: 8c 36 cpi r24, 0x6C ; 108 + 4ea: 21 f4 brne .+8 ; 0x4f4 <__LOCK_REGION_LENGTH__+0xf4> + 4ec: 83 2d mov r24, r3 + 4ee: 80 68 ori r24, 0x80 ; 128 + 4f0: 38 2e mov r3, r24 + 4f2: 02 c0 rjmp .+4 ; 0x4f8 <__LOCK_REGION_LENGTH__+0xf8> + 4f4: 88 36 cpi r24, 0x68 ; 104 + 4f6: 41 f4 brne .+16 ; 0x508 <__LOCK_REGION_LENGTH__+0x108> + 4f8: f7 01 movw r30, r14 + 4fa: 93 fd sbrc r25, 3 + 4fc: 85 91 lpm r24, Z+ + 4fe: 93 ff sbrs r25, 3 + 500: 81 91 ld r24, Z+ + 502: 7f 01 movw r14, r30 + 504: 81 11 cpse r24, r1 + 506: b3 cf rjmp .-154 ; 0x46e <__LOCK_REGION_LENGTH__+0x6e> + 508: 98 2f mov r25, r24 + 50a: 9f 7d andi r25, 0xDF ; 223 + 50c: 95 54 subi r25, 0x45 ; 69 + 50e: 93 30 cpi r25, 0x03 ; 3 + 510: 28 f4 brcc .+10 ; 0x51c <__LOCK_REGION_LENGTH__+0x11c> + 512: 0c 5f subi r16, 0xFC ; 252 + 514: 1f 4f sbci r17, 0xFF ; 255 + 516: 9f e3 ldi r25, 0x3F ; 63 + 518: 99 83 std Y+1, r25 ; 0x01 + 51a: 0d c0 rjmp .+26 ; 0x536 <__LOCK_REGION_LENGTH__+0x136> + 51c: 83 36 cpi r24, 0x63 ; 99 + 51e: 31 f0 breq .+12 ; 0x52c <__LOCK_REGION_LENGTH__+0x12c> + 520: 83 37 cpi r24, 0x73 ; 115 + 522: 71 f0 breq .+28 ; 0x540 <__LOCK_REGION_LENGTH__+0x140> + 524: 83 35 cpi r24, 0x53 ; 83 + 526: 09 f0 breq .+2 ; 0x52a <__LOCK_REGION_LENGTH__+0x12a> + 528: 55 c0 rjmp .+170 ; 0x5d4 <__LOCK_REGION_LENGTH__+0x1d4> + 52a: 20 c0 rjmp .+64 ; 0x56c <__LOCK_REGION_LENGTH__+0x16c> + 52c: f8 01 movw r30, r16 + 52e: 80 81 ld r24, Z + 530: 89 83 std Y+1, r24 ; 0x01 + 532: 0e 5f subi r16, 0xFE ; 254 + 534: 1f 4f sbci r17, 0xFF ; 255 + 536: 88 24 eor r8, r8 + 538: 83 94 inc r8 + 53a: 91 2c mov r9, r1 + 53c: 53 01 movw r10, r6 + 53e: 12 c0 rjmp .+36 ; 0x564 <__LOCK_REGION_LENGTH__+0x164> + 540: 28 01 movw r4, r16 + 542: f2 e0 ldi r31, 0x02 ; 2 + 544: 4f 0e add r4, r31 + 546: 51 1c adc r5, r1 + 548: f8 01 movw r30, r16 + 54a: a0 80 ld r10, Z + 54c: b1 80 ldd r11, Z+1 ; 0x01 + 54e: 36 fe sbrs r3, 6 + 550: 03 c0 rjmp .+6 ; 0x558 <__LOCK_REGION_LENGTH__+0x158> + 552: 69 2d mov r22, r9 + 554: 70 e0 ldi r23, 0x00 ; 0 + 556: 02 c0 rjmp .+4 ; 0x55c <__LOCK_REGION_LENGTH__+0x15c> + 558: 6f ef ldi r22, 0xFF ; 255 + 55a: 7f ef ldi r23, 0xFF ; 255 + 55c: c5 01 movw r24, r10 + 55e: 4e d1 rcall .+668 ; 0x7fc + 560: 4c 01 movw r8, r24 + 562: 82 01 movw r16, r4 + 564: f3 2d mov r31, r3 + 566: ff 77 andi r31, 0x7F ; 127 + 568: 3f 2e mov r3, r31 + 56a: 15 c0 rjmp .+42 ; 0x596 <__LOCK_REGION_LENGTH__+0x196> + 56c: 28 01 movw r4, r16 + 56e: 22 e0 ldi r18, 0x02 ; 2 + 570: 42 0e add r4, r18 + 572: 51 1c adc r5, r1 + 574: f8 01 movw r30, r16 + 576: a0 80 ld r10, Z + 578: b1 80 ldd r11, Z+1 ; 0x01 + 57a: 36 fe sbrs r3, 6 + 57c: 03 c0 rjmp .+6 ; 0x584 <__LOCK_REGION_LENGTH__+0x184> + 57e: 69 2d mov r22, r9 + 580: 70 e0 ldi r23, 0x00 ; 0 + 582: 02 c0 rjmp .+4 ; 0x588 <__LOCK_REGION_LENGTH__+0x188> + 584: 6f ef ldi r22, 0xFF ; 255 + 586: 7f ef ldi r23, 0xFF ; 255 + 588: c5 01 movw r24, r10 + 58a: 2d d1 rcall .+602 ; 0x7e6 + 58c: 4c 01 movw r8, r24 + 58e: f3 2d mov r31, r3 + 590: f0 68 ori r31, 0x80 ; 128 + 592: 3f 2e mov r3, r31 + 594: 82 01 movw r16, r4 + 596: 33 fc sbrc r3, 3 + 598: 19 c0 rjmp .+50 ; 0x5cc <__LOCK_REGION_LENGTH__+0x1cc> + 59a: 82 2d mov r24, r2 + 59c: 90 e0 ldi r25, 0x00 ; 0 + 59e: 88 16 cp r8, r24 + 5a0: 99 06 cpc r9, r25 + 5a2: a0 f4 brcc .+40 ; 0x5cc <__LOCK_REGION_LENGTH__+0x1cc> + 5a4: b6 01 movw r22, r12 + 5a6: 80 e2 ldi r24, 0x20 ; 32 + 5a8: 90 e0 ldi r25, 0x00 ; 0 + 5aa: 33 d1 rcall .+614 ; 0x812 + 5ac: 2a 94 dec r2 + 5ae: f5 cf rjmp .-22 ; 0x59a <__LOCK_REGION_LENGTH__+0x19a> + 5b0: f5 01 movw r30, r10 + 5b2: 37 fc sbrc r3, 7 + 5b4: 85 91 lpm r24, Z+ + 5b6: 37 fe sbrs r3, 7 + 5b8: 81 91 ld r24, Z+ + 5ba: 5f 01 movw r10, r30 + 5bc: b6 01 movw r22, r12 + 5be: 90 e0 ldi r25, 0x00 ; 0 + 5c0: 28 d1 rcall .+592 ; 0x812 + 5c2: 21 10 cpse r2, r1 + 5c4: 2a 94 dec r2 + 5c6: 21 e0 ldi r18, 0x01 ; 1 + 5c8: 82 1a sub r8, r18 + 5ca: 91 08 sbc r9, r1 + 5cc: 81 14 cp r8, r1 + 5ce: 91 04 cpc r9, r1 + 5d0: 79 f7 brne .-34 ; 0x5b0 <__LOCK_REGION_LENGTH__+0x1b0> + 5d2: e1 c0 rjmp .+450 ; 0x796 <__LOCK_REGION_LENGTH__+0x396> + 5d4: 84 36 cpi r24, 0x64 ; 100 + 5d6: 11 f0 breq .+4 ; 0x5dc <__LOCK_REGION_LENGTH__+0x1dc> + 5d8: 89 36 cpi r24, 0x69 ; 105 + 5da: 39 f5 brne .+78 ; 0x62a <__LOCK_REGION_LENGTH__+0x22a> + 5dc: f8 01 movw r30, r16 + 5de: 37 fe sbrs r3, 7 + 5e0: 07 c0 rjmp .+14 ; 0x5f0 <__LOCK_REGION_LENGTH__+0x1f0> + 5e2: 60 81 ld r22, Z + 5e4: 71 81 ldd r23, Z+1 ; 0x01 + 5e6: 82 81 ldd r24, Z+2 ; 0x02 + 5e8: 93 81 ldd r25, Z+3 ; 0x03 + 5ea: 0c 5f subi r16, 0xFC ; 252 + 5ec: 1f 4f sbci r17, 0xFF ; 255 + 5ee: 08 c0 rjmp .+16 ; 0x600 <__LOCK_REGION_LENGTH__+0x200> + 5f0: 60 81 ld r22, Z + 5f2: 71 81 ldd r23, Z+1 ; 0x01 + 5f4: 07 2e mov r0, r23 + 5f6: 00 0c add r0, r0 + 5f8: 88 0b sbc r24, r24 + 5fa: 99 0b sbc r25, r25 + 5fc: 0e 5f subi r16, 0xFE ; 254 + 5fe: 1f 4f sbci r17, 0xFF ; 255 + 600: f3 2d mov r31, r3 + 602: ff 76 andi r31, 0x6F ; 111 + 604: 3f 2e mov r3, r31 + 606: 97 ff sbrs r25, 7 + 608: 09 c0 rjmp .+18 ; 0x61c <__LOCK_REGION_LENGTH__+0x21c> + 60a: 90 95 com r25 + 60c: 80 95 com r24 + 60e: 70 95 com r23 + 610: 61 95 neg r22 + 612: 7f 4f sbci r23, 0xFF ; 255 + 614: 8f 4f sbci r24, 0xFF ; 255 + 616: 9f 4f sbci r25, 0xFF ; 255 + 618: f0 68 ori r31, 0x80 ; 128 + 61a: 3f 2e mov r3, r31 + 61c: 2a e0 ldi r18, 0x0A ; 10 + 61e: 30 e0 ldi r19, 0x00 ; 0 + 620: a3 01 movw r20, r6 + 622: 33 d1 rcall .+614 ; 0x88a <__ultoa_invert> + 624: 88 2e mov r8, r24 + 626: 86 18 sub r8, r6 + 628: 44 c0 rjmp .+136 ; 0x6b2 <__LOCK_REGION_LENGTH__+0x2b2> + 62a: 85 37 cpi r24, 0x75 ; 117 + 62c: 31 f4 brne .+12 ; 0x63a <__LOCK_REGION_LENGTH__+0x23a> + 62e: 23 2d mov r18, r3 + 630: 2f 7e andi r18, 0xEF ; 239 + 632: b2 2e mov r11, r18 + 634: 2a e0 ldi r18, 0x0A ; 10 + 636: 30 e0 ldi r19, 0x00 ; 0 + 638: 25 c0 rjmp .+74 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 63a: 93 2d mov r25, r3 + 63c: 99 7f andi r25, 0xF9 ; 249 + 63e: b9 2e mov r11, r25 + 640: 8f 36 cpi r24, 0x6F ; 111 + 642: c1 f0 breq .+48 ; 0x674 <__LOCK_REGION_LENGTH__+0x274> + 644: 18 f4 brcc .+6 ; 0x64c <__LOCK_REGION_LENGTH__+0x24c> + 646: 88 35 cpi r24, 0x58 ; 88 + 648: 79 f0 breq .+30 ; 0x668 <__LOCK_REGION_LENGTH__+0x268> + 64a: ae c0 rjmp .+348 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> + 64c: 80 37 cpi r24, 0x70 ; 112 + 64e: 19 f0 breq .+6 ; 0x656 <__LOCK_REGION_LENGTH__+0x256> + 650: 88 37 cpi r24, 0x78 ; 120 + 652: 21 f0 breq .+8 ; 0x65c <__LOCK_REGION_LENGTH__+0x25c> + 654: a9 c0 rjmp .+338 ; 0x7a8 <__LOCK_REGION_LENGTH__+0x3a8> + 656: e9 2f mov r30, r25 + 658: e0 61 ori r30, 0x10 ; 16 + 65a: be 2e mov r11, r30 + 65c: b4 fe sbrs r11, 4 + 65e: 0d c0 rjmp .+26 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> + 660: fb 2d mov r31, r11 + 662: f4 60 ori r31, 0x04 ; 4 + 664: bf 2e mov r11, r31 + 666: 09 c0 rjmp .+18 ; 0x67a <__LOCK_REGION_LENGTH__+0x27a> + 668: 34 fe sbrs r3, 4 + 66a: 0a c0 rjmp .+20 ; 0x680 <__LOCK_REGION_LENGTH__+0x280> + 66c: 29 2f mov r18, r25 + 66e: 26 60 ori r18, 0x06 ; 6 + 670: b2 2e mov r11, r18 + 672: 06 c0 rjmp .+12 ; 0x680 <__LOCK_REGION_LENGTH__+0x280> + 674: 28 e0 ldi r18, 0x08 ; 8 + 676: 30 e0 ldi r19, 0x00 ; 0 + 678: 05 c0 rjmp .+10 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 67a: 20 e1 ldi r18, 0x10 ; 16 + 67c: 30 e0 ldi r19, 0x00 ; 0 + 67e: 02 c0 rjmp .+4 ; 0x684 <__LOCK_REGION_LENGTH__+0x284> + 680: 20 e1 ldi r18, 0x10 ; 16 + 682: 32 e0 ldi r19, 0x02 ; 2 + 684: f8 01 movw r30, r16 + 686: b7 fe sbrs r11, 7 + 688: 07 c0 rjmp .+14 ; 0x698 <__LOCK_REGION_LENGTH__+0x298> + 68a: 60 81 ld r22, Z + 68c: 71 81 ldd r23, Z+1 ; 0x01 + 68e: 82 81 ldd r24, Z+2 ; 0x02 + 690: 93 81 ldd r25, Z+3 ; 0x03 + 692: 0c 5f subi r16, 0xFC ; 252 + 694: 1f 4f sbci r17, 0xFF ; 255 + 696: 06 c0 rjmp .+12 ; 0x6a4 <__LOCK_REGION_LENGTH__+0x2a4> + 698: 60 81 ld r22, Z + 69a: 71 81 ldd r23, Z+1 ; 0x01 + 69c: 80 e0 ldi r24, 0x00 ; 0 + 69e: 90 e0 ldi r25, 0x00 ; 0 + 6a0: 0e 5f subi r16, 0xFE ; 254 + 6a2: 1f 4f sbci r17, 0xFF ; 255 + 6a4: a3 01 movw r20, r6 + 6a6: f1 d0 rcall .+482 ; 0x88a <__ultoa_invert> + 6a8: 88 2e mov r8, r24 + 6aa: 86 18 sub r8, r6 + 6ac: fb 2d mov r31, r11 + 6ae: ff 77 andi r31, 0x7F ; 127 + 6b0: 3f 2e mov r3, r31 + 6b2: 36 fe sbrs r3, 6 + 6b4: 0d c0 rjmp .+26 ; 0x6d0 <__LOCK_REGION_LENGTH__+0x2d0> + 6b6: 23 2d mov r18, r3 + 6b8: 2e 7f andi r18, 0xFE ; 254 + 6ba: a2 2e mov r10, r18 + 6bc: 89 14 cp r8, r9 + 6be: 58 f4 brcc .+22 ; 0x6d6 <__LOCK_REGION_LENGTH__+0x2d6> + 6c0: 34 fe sbrs r3, 4 + 6c2: 0b c0 rjmp .+22 ; 0x6da <__LOCK_REGION_LENGTH__+0x2da> + 6c4: 32 fc sbrc r3, 2 + 6c6: 09 c0 rjmp .+18 ; 0x6da <__LOCK_REGION_LENGTH__+0x2da> + 6c8: 83 2d mov r24, r3 + 6ca: 8e 7e andi r24, 0xEE ; 238 + 6cc: a8 2e mov r10, r24 + 6ce: 05 c0 rjmp .+10 ; 0x6da <__LOCK_REGION_LENGTH__+0x2da> + 6d0: b8 2c mov r11, r8 + 6d2: a3 2c mov r10, r3 + 6d4: 03 c0 rjmp .+6 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> + 6d6: b8 2c mov r11, r8 + 6d8: 01 c0 rjmp .+2 ; 0x6dc <__LOCK_REGION_LENGTH__+0x2dc> + 6da: b9 2c mov r11, r9 + 6dc: a4 fe sbrs r10, 4 + 6de: 0f c0 rjmp .+30 ; 0x6fe <__LOCK_REGION_LENGTH__+0x2fe> + 6e0: fe 01 movw r30, r28 + 6e2: e8 0d add r30, r8 + 6e4: f1 1d adc r31, r1 + 6e6: 80 81 ld r24, Z + 6e8: 80 33 cpi r24, 0x30 ; 48 + 6ea: 21 f4 brne .+8 ; 0x6f4 <__LOCK_REGION_LENGTH__+0x2f4> + 6ec: 9a 2d mov r25, r10 + 6ee: 99 7e andi r25, 0xE9 ; 233 + 6f0: a9 2e mov r10, r25 + 6f2: 09 c0 rjmp .+18 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> + 6f4: a2 fe sbrs r10, 2 + 6f6: 06 c0 rjmp .+12 ; 0x704 <__LOCK_REGION_LENGTH__+0x304> + 6f8: b3 94 inc r11 + 6fa: b3 94 inc r11 + 6fc: 04 c0 rjmp .+8 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> + 6fe: 8a 2d mov r24, r10 + 700: 86 78 andi r24, 0x86 ; 134 + 702: 09 f0 breq .+2 ; 0x706 <__LOCK_REGION_LENGTH__+0x306> + 704: b3 94 inc r11 + 706: a3 fc sbrc r10, 3 + 708: 10 c0 rjmp .+32 ; 0x72a <__LOCK_REGION_LENGTH__+0x32a> + 70a: a0 fe sbrs r10, 0 + 70c: 06 c0 rjmp .+12 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> + 70e: b2 14 cp r11, r2 + 710: 80 f4 brcc .+32 ; 0x732 <__LOCK_REGION_LENGTH__+0x332> + 712: 28 0c add r2, r8 + 714: 92 2c mov r9, r2 + 716: 9b 18 sub r9, r11 + 718: 0d c0 rjmp .+26 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 71a: b2 14 cp r11, r2 + 71c: 58 f4 brcc .+22 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 71e: b6 01 movw r22, r12 + 720: 80 e2 ldi r24, 0x20 ; 32 + 722: 90 e0 ldi r25, 0x00 ; 0 + 724: 76 d0 rcall .+236 ; 0x812 + 726: b3 94 inc r11 + 728: f8 cf rjmp .-16 ; 0x71a <__LOCK_REGION_LENGTH__+0x31a> + 72a: b2 14 cp r11, r2 + 72c: 18 f4 brcc .+6 ; 0x734 <__LOCK_REGION_LENGTH__+0x334> + 72e: 2b 18 sub r2, r11 + 730: 02 c0 rjmp .+4 ; 0x736 <__LOCK_REGION_LENGTH__+0x336> + 732: 98 2c mov r9, r8 + 734: 21 2c mov r2, r1 + 736: a4 fe sbrs r10, 4 + 738: 0f c0 rjmp .+30 ; 0x758 <__LOCK_REGION_LENGTH__+0x358> + 73a: b6 01 movw r22, r12 + 73c: 80 e3 ldi r24, 0x30 ; 48 + 73e: 90 e0 ldi r25, 0x00 ; 0 + 740: 68 d0 rcall .+208 ; 0x812 + 742: a2 fe sbrs r10, 2 + 744: 16 c0 rjmp .+44 ; 0x772 <__LOCK_REGION_LENGTH__+0x372> + 746: a1 fc sbrc r10, 1 + 748: 03 c0 rjmp .+6 ; 0x750 <__LOCK_REGION_LENGTH__+0x350> + 74a: 88 e7 ldi r24, 0x78 ; 120 + 74c: 90 e0 ldi r25, 0x00 ; 0 + 74e: 02 c0 rjmp .+4 ; 0x754 <__LOCK_REGION_LENGTH__+0x354> + 750: 88 e5 ldi r24, 0x58 ; 88 + 752: 90 e0 ldi r25, 0x00 ; 0 + 754: b6 01 movw r22, r12 + 756: 0c c0 rjmp .+24 ; 0x770 <__LOCK_REGION_LENGTH__+0x370> + 758: 8a 2d mov r24, r10 + 75a: 86 78 andi r24, 0x86 ; 134 + 75c: 51 f0 breq .+20 ; 0x772 <__LOCK_REGION_LENGTH__+0x372> + 75e: a1 fe sbrs r10, 1 + 760: 02 c0 rjmp .+4 ; 0x766 <__LOCK_REGION_LENGTH__+0x366> + 762: 8b e2 ldi r24, 0x2B ; 43 + 764: 01 c0 rjmp .+2 ; 0x768 <__LOCK_REGION_LENGTH__+0x368> + 766: 80 e2 ldi r24, 0x20 ; 32 + 768: a7 fc sbrc r10, 7 + 76a: 8d e2 ldi r24, 0x2D ; 45 + 76c: b6 01 movw r22, r12 + 76e: 90 e0 ldi r25, 0x00 ; 0 + 770: 50 d0 rcall .+160 ; 0x812 + 772: 89 14 cp r8, r9 + 774: 30 f4 brcc .+12 ; 0x782 <__LOCK_REGION_LENGTH__+0x382> + 776: b6 01 movw r22, r12 + 778: 80 e3 ldi r24, 0x30 ; 48 + 77a: 90 e0 ldi r25, 0x00 ; 0 + 77c: 4a d0 rcall .+148 ; 0x812 + 77e: 9a 94 dec r9 + 780: f8 cf rjmp .-16 ; 0x772 <__LOCK_REGION_LENGTH__+0x372> + 782: 8a 94 dec r8 + 784: f3 01 movw r30, r6 + 786: e8 0d add r30, r8 + 788: f1 1d adc r31, r1 + 78a: 80 81 ld r24, Z + 78c: b6 01 movw r22, r12 + 78e: 90 e0 ldi r25, 0x00 ; 0 + 790: 40 d0 rcall .+128 ; 0x812 + 792: 81 10 cpse r8, r1 + 794: f6 cf rjmp .-20 ; 0x782 <__LOCK_REGION_LENGTH__+0x382> + 796: 22 20 and r2, r2 + 798: 09 f4 brne .+2 ; 0x79c <__LOCK_REGION_LENGTH__+0x39c> + 79a: 4e ce rjmp .-868 ; 0x438 <__LOCK_REGION_LENGTH__+0x38> + 79c: b6 01 movw r22, r12 + 79e: 80 e2 ldi r24, 0x20 ; 32 + 7a0: 90 e0 ldi r25, 0x00 ; 0 + 7a2: 37 d0 rcall .+110 ; 0x812 + 7a4: 2a 94 dec r2 + 7a6: f7 cf rjmp .-18 ; 0x796 <__LOCK_REGION_LENGTH__+0x396> + 7a8: f6 01 movw r30, r12 + 7aa: 86 81 ldd r24, Z+6 ; 0x06 + 7ac: 97 81 ldd r25, Z+7 ; 0x07 + 7ae: 02 c0 rjmp .+4 ; 0x7b4 <__LOCK_REGION_LENGTH__+0x3b4> + 7b0: 8f ef ldi r24, 0xFF ; 255 + 7b2: 9f ef ldi r25, 0xFF ; 255 + 7b4: 2b 96 adiw r28, 0x0b ; 11 + 7b6: 0f b6 in r0, 0x3f ; 63 + 7b8: f8 94 cli + 7ba: de bf out 0x3e, r29 ; 62 + 7bc: 0f be out 0x3f, r0 ; 63 + 7be: cd bf out 0x3d, r28 ; 61 + 7c0: df 91 pop r29 + 7c2: cf 91 pop r28 + 7c4: 1f 91 pop r17 + 7c6: 0f 91 pop r16 + 7c8: ff 90 pop r15 + 7ca: ef 90 pop r14 + 7cc: df 90 pop r13 + 7ce: cf 90 pop r12 + 7d0: bf 90 pop r11 + 7d2: af 90 pop r10 + 7d4: 9f 90 pop r9 + 7d6: 8f 90 pop r8 + 7d8: 7f 90 pop r7 + 7da: 6f 90 pop r6 + 7dc: 5f 90 pop r5 + 7de: 4f 90 pop r4 + 7e0: 3f 90 pop r3 + 7e2: 2f 90 pop r2 + 7e4: 08 95 ret + +000007e6 : + 7e6: fc 01 movw r30, r24 + 7e8: 05 90 lpm r0, Z+ + 7ea: 61 50 subi r22, 0x01 ; 1 + 7ec: 70 40 sbci r23, 0x00 ; 0 + 7ee: 01 10 cpse r0, r1 + 7f0: d8 f7 brcc .-10 ; 0x7e8 + 7f2: 80 95 com r24 + 7f4: 90 95 com r25 + 7f6: 8e 0f add r24, r30 + 7f8: 9f 1f adc r25, r31 + 7fa: 08 95 ret + +000007fc : + 7fc: fc 01 movw r30, r24 + 7fe: 61 50 subi r22, 0x01 ; 1 + 800: 70 40 sbci r23, 0x00 ; 0 + 802: 01 90 ld r0, Z+ + 804: 01 10 cpse r0, r1 + 806: d8 f7 brcc .-10 ; 0x7fe + 808: 80 95 com r24 + 80a: 90 95 com r25 + 80c: 8e 0f add r24, r30 + 80e: 9f 1f adc r25, r31 + 810: 08 95 ret + +00000812 : + 812: 0f 93 push r16 + 814: 1f 93 push r17 + 816: cf 93 push r28 + 818: df 93 push r29 + 81a: fb 01 movw r30, r22 + 81c: 23 81 ldd r18, Z+3 ; 0x03 + 81e: 21 fd sbrc r18, 1 + 820: 03 c0 rjmp .+6 ; 0x828 + 822: 8f ef ldi r24, 0xFF ; 255 + 824: 9f ef ldi r25, 0xFF ; 255 + 826: 2c c0 rjmp .+88 ; 0x880 + 828: 22 ff sbrs r18, 2 + 82a: 16 c0 rjmp .+44 ; 0x858 + 82c: 46 81 ldd r20, Z+6 ; 0x06 + 82e: 57 81 ldd r21, Z+7 ; 0x07 + 830: 24 81 ldd r18, Z+4 ; 0x04 + 832: 35 81 ldd r19, Z+5 ; 0x05 + 834: 42 17 cp r20, r18 + 836: 53 07 cpc r21, r19 + 838: 44 f4 brge .+16 ; 0x84a + 83a: a0 81 ld r26, Z + 83c: b1 81 ldd r27, Z+1 ; 0x01 + 83e: 9d 01 movw r18, r26 + 840: 2f 5f subi r18, 0xFF ; 255 + 842: 3f 4f sbci r19, 0xFF ; 255 + 844: 31 83 std Z+1, r19 ; 0x01 + 846: 20 83 st Z, r18 + 848: 8c 93 st X, r24 + 84a: 26 81 ldd r18, Z+6 ; 0x06 + 84c: 37 81 ldd r19, Z+7 ; 0x07 + 84e: 2f 5f subi r18, 0xFF ; 255 + 850: 3f 4f sbci r19, 0xFF ; 255 + 852: 37 83 std Z+7, r19 ; 0x07 + 854: 26 83 std Z+6, r18 ; 0x06 + 856: 14 c0 rjmp .+40 ; 0x880 + 858: 8b 01 movw r16, r22 + 85a: ec 01 movw r28, r24 + 85c: fb 01 movw r30, r22 + 85e: 00 84 ldd r0, Z+8 ; 0x08 + 860: f1 85 ldd r31, Z+9 ; 0x09 + 862: e0 2d mov r30, r0 + 864: 09 95 icall + 866: 89 2b or r24, r25 + 868: e1 f6 brne .-72 ; 0x822 + 86a: d8 01 movw r26, r16 + 86c: 16 96 adiw r26, 0x06 ; 6 + 86e: 8d 91 ld r24, X+ + 870: 9c 91 ld r25, X + 872: 17 97 sbiw r26, 0x07 ; 7 + 874: 01 96 adiw r24, 0x01 ; 1 + 876: 17 96 adiw r26, 0x07 ; 7 + 878: 9c 93 st X, r25 + 87a: 8e 93 st -X, r24 + 87c: 16 97 sbiw r26, 0x06 ; 6 + 87e: ce 01 movw r24, r28 + 880: df 91 pop r29 + 882: cf 91 pop r28 + 884: 1f 91 pop r17 + 886: 0f 91 pop r16 + 888: 08 95 ret + +0000088a <__ultoa_invert>: + 88a: fa 01 movw r30, r20 + 88c: aa 27 eor r26, r26 + 88e: 28 30 cpi r18, 0x08 ; 8 + 890: 51 f1 breq .+84 ; 0x8e6 <__ultoa_invert+0x5c> + 892: 20 31 cpi r18, 0x10 ; 16 + 894: 81 f1 breq .+96 ; 0x8f6 <__ultoa_invert+0x6c> + 896: e8 94 clt + 898: 6f 93 push r22 + 89a: 6e 7f andi r22, 0xFE ; 254 + 89c: 6e 5f subi r22, 0xFE ; 254 + 89e: 7f 4f sbci r23, 0xFF ; 255 + 8a0: 8f 4f sbci r24, 0xFF ; 255 + 8a2: 9f 4f sbci r25, 0xFF ; 255 + 8a4: af 4f sbci r26, 0xFF ; 255 + 8a6: b1 e0 ldi r27, 0x01 ; 1 + 8a8: 3e d0 rcall .+124 ; 0x926 <__ultoa_invert+0x9c> + 8aa: b4 e0 ldi r27, 0x04 ; 4 + 8ac: 3c d0 rcall .+120 ; 0x926 <__ultoa_invert+0x9c> + 8ae: 67 0f add r22, r23 + 8b0: 78 1f adc r23, r24 + 8b2: 89 1f adc r24, r25 + 8b4: 9a 1f adc r25, r26 + 8b6: a1 1d adc r26, r1 + 8b8: 68 0f add r22, r24 + 8ba: 79 1f adc r23, r25 + 8bc: 8a 1f adc r24, r26 + 8be: 91 1d adc r25, r1 + 8c0: a1 1d adc r26, r1 + 8c2: 6a 0f add r22, r26 + 8c4: 71 1d adc r23, r1 + 8c6: 81 1d adc r24, r1 + 8c8: 91 1d adc r25, r1 + 8ca: a1 1d adc r26, r1 + 8cc: 20 d0 rcall .+64 ; 0x90e <__ultoa_invert+0x84> + 8ce: 09 f4 brne .+2 ; 0x8d2 <__ultoa_invert+0x48> + 8d0: 68 94 set + 8d2: 3f 91 pop r19 + 8d4: 2a e0 ldi r18, 0x0A ; 10 + 8d6: 26 9f mul r18, r22 + 8d8: 11 24 eor r1, r1 + 8da: 30 19 sub r19, r0 + 8dc: 30 5d subi r19, 0xD0 ; 208 + 8de: 31 93 st Z+, r19 + 8e0: de f6 brtc .-74 ; 0x898 <__ultoa_invert+0xe> + 8e2: cf 01 movw r24, r30 + 8e4: 08 95 ret + 8e6: 46 2f mov r20, r22 + 8e8: 47 70 andi r20, 0x07 ; 7 + 8ea: 40 5d subi r20, 0xD0 ; 208 + 8ec: 41 93 st Z+, r20 + 8ee: b3 e0 ldi r27, 0x03 ; 3 + 8f0: 0f d0 rcall .+30 ; 0x910 <__ultoa_invert+0x86> + 8f2: c9 f7 brne .-14 ; 0x8e6 <__ultoa_invert+0x5c> + 8f4: f6 cf rjmp .-20 ; 0x8e2 <__ultoa_invert+0x58> + 8f6: 46 2f mov r20, r22 + 8f8: 4f 70 andi r20, 0x0F ; 15 + 8fa: 40 5d subi r20, 0xD0 ; 208 + 8fc: 4a 33 cpi r20, 0x3A ; 58 + 8fe: 18 f0 brcs .+6 ; 0x906 <__ultoa_invert+0x7c> + 900: 49 5d subi r20, 0xD9 ; 217 + 902: 31 fd sbrc r19, 1 + 904: 40 52 subi r20, 0x20 ; 32 + 906: 41 93 st Z+, r20 + 908: 02 d0 rcall .+4 ; 0x90e <__ultoa_invert+0x84> + 90a: a9 f7 brne .-22 ; 0x8f6 <__ultoa_invert+0x6c> + 90c: ea cf rjmp .-44 ; 0x8e2 <__ultoa_invert+0x58> + 90e: b4 e0 ldi r27, 0x04 ; 4 + 910: a6 95 lsr r26 + 912: 97 95 ror r25 + 914: 87 95 ror r24 + 916: 77 95 ror r23 + 918: 67 95 ror r22 + 91a: ba 95 dec r27 + 91c: c9 f7 brne .-14 ; 0x910 <__ultoa_invert+0x86> + 91e: 00 97 sbiw r24, 0x00 ; 0 + 920: 61 05 cpc r22, r1 + 922: 71 05 cpc r23, r1 + 924: 08 95 ret + 926: 9b 01 movw r18, r22 + 928: ac 01 movw r20, r24 + 92a: 0a 2e mov r0, r26 + 92c: 06 94 lsr r0 + 92e: 57 95 ror r21 + 930: 47 95 ror r20 + 932: 37 95 ror r19 + 934: 27 95 ror r18 + 936: ba 95 dec r27 + 938: c9 f7 brne .-14 ; 0x92c <__ultoa_invert+0xa2> + 93a: 62 0f add r22, r18 + 93c: 73 1f adc r23, r19 + 93e: 84 1f adc r24, r20 + 940: 95 1f adc r25, r21 + 942: a0 1d adc r26, r0 + 944: 08 95 ret + +00000946 <_exit>: + 946: f8 94 cli + +00000948 <__stop_program>: + 948: ff cf rjmp .-2 ; 0x948 <__stop_program> diff --git a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec index 6f6627c..49463ab 100644 --- a/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec +++ b/Microcontrollers/ultrasonicSensor/Debug/ultrasonicSensor.srec @@ -1,27 +1,152 @@ S0180000756C747261736F6E696353656E736F722E737265634E -S113000045C0000082C0000056C0000054C000007B -S113001052C0000050C000004EC000004CC00000A0 -S11300204AC0000048C0000046C0000044C00000B0 -S113003042C0000040C000003EC000003CC00000C0 -S11300403AC0000038C0000036C0000034C00000D0 -S113005032C0000030C000002EC000002CC00000E0 -S11300602AC0000028C0000026C0000024C00000F0 -S113007022C0000020C000001EC000001CC0000000 -S11300801AC0000018C0000016C0000011241FBED2 -S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0ECE7EF -S11300A0F1E000E00BBF02C007900D92A230B1074F -S11300B0D9F747D061C0A4CF20E030E006C046E0C5 -S11300C04A95F1F700C02F5F3F4F28173907B8F35F -S11300D0089520E030E008C0E7E8F3E13197F1F754 -S11300E000C000002F5F3F4F28173907A8F3089579 -S11300F0CF93DF93C5E6D0E018828AE090E0DCDF9E -S113010081E08883DF91CF9108951F920F920FB6FB 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+S1130930479537952795BA95C9F7620F731F841F9A +S10D0940951FA01D0895F894FFCF41 +S107094A012564001B S9030000FC diff --git a/Microcontrollers/ultrasonicSensor/lcd_control.c b/Microcontrollers/ultrasonicSensor/lcd_control.c index 17487c7..07fc59c 100644 --- a/Microcontrollers/ultrasonicSensor/lcd_control.c +++ b/Microcontrollers/ultrasonicSensor/lcd_control.c @@ -126,8 +126,8 @@ void lcd_move_right(void){ void lcd_write_int(int number) { - int length = snprintf(NULL, 0, "%d", number + 1); + int length = snprintf(NULL, 0, "%d", number); char str[length + 1]; - snprintf(str, length + 1, "%d", number + 1); + snprintf(str, length + 1, "%d", number); lcd_write_string(str); } diff --git a/Microcontrollers/ultrasonicSensor/main.c b/Microcontrollers/ultrasonicSensor/main.c index 4108632..3b4c977 100644 --- a/Microcontrollers/ultrasonicSensor/main.c +++ b/Microcontrollers/ultrasonicSensor/main.c @@ -28,6 +28,8 @@ enum interrupt_status {INTERRUPT_FALLING, INTERRUPT_RISING}; static enum interrupt_status int_stat = INTERRUPT_RISING; +uint16_t timer_dist = 0; // time measured by timer; + void wait_us(unsigned int us) { for(int i = 0; i < us; i++) @@ -61,6 +63,9 @@ ISR(INT0_vect) // set interrupt pin 0 on PORTD to falling edge EICRA = 0x02; + // reset the time in timer1 + TCNT1 = 0x00; + // set interrupt status int_stat = INTERRUPT_FALLING; } else @@ -69,6 +74,9 @@ ISR(INT0_vect) // set interrupt pin 0 on PORTD to rising edge EICRA = 0x03; + // read timer1 into time_dist + timer_dist = TCNT1; + // set interrupt status int_stat = INTERRUPT_RISING; } @@ -81,26 +89,34 @@ int main(void) DDRG = 0xFF; // port g all output. pin 0 is trig, the rest is for debug DDRD = 0x00; // port D pin 0 on input. 0 is echo and also interrupt - DDRA = 0xFF; - EICRA |= 0x03; // interrupt PORTD on pin 0, rising edge EIMSK |= 0x01; // enable interrupt on pin 0 (INT0) + TCCR1A = 0b00000000; // initialize timer1, prescaler=256 + TCCR1B = 0b00001100; // CTC compare A, RUN + + sei(); // turn on interrupt system + init_4bits_mode(); + + _delay_ms(10); + + lcd_clear(); + + /* Replace with your application code */ while (1) { ultrasonic_send_pulse(); - if (int_stat == INTERRUPT_FALLING) - { - PORTA = 0xFF; - } else { - PORTA = 0x00; - } - wait_ms(100); + int distance = timer_dist * 340 / 2; + lcd_clear(); + lcd_write_int(distance); + + + wait_ms(1000); } }