This commit is contained in:
Sem van der Hoeven
2023-11-12 23:41:03 +01:00
parent c4e590fea2
commit 4b93ace461
4 changed files with 88 additions and 27 deletions

View File

@@ -1,4 +1,4 @@
#include "sam3xa/include/component/component_tc.h"
// #include "sam3xa/include/component/component_tc.h"
#include "obd2_timer.h"
void obd2_RTT_init(void)
@@ -50,14 +50,48 @@ void obd2_TC_init()
pmc_set_writeprotect(false);
// /* set clock source to main clock */
// pmc_mck_set_source(PMC_MCKR_CSS_MAIN_CLK);
/* set the clock to MCK/2, enable the timer/counter 0, enable RC compare trigger and capture mode */
TC0->TC_CHANNEL[0].TC_CCR |= TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CCR_CLKEN | TC_CMR_CPCTRG & ~(TC_CMR_WAVE);
/* Enable peripheral clock */
pmc_enable_periph_clk(TC0_IRQn);
/* Disable clock (from arduino15/packages/arduino/hardware/sam/1.6.12/system/libsam/source/tc.c))*/
TC0->TC_CHANNEL[0].TC_CCR = TC_CCR_CLKDIS;
/* Disable interrupts*/
TC0->TC_CHANNEL[0].TC_IDR = 0xFFFFFFFF;
/* Clear status register by reading it*/
TC0->TC_CHANNEL[0].TC_SR;
/* disable the quadrature decoder, to route the IO pins of TIOA and TIOB directly to the timer counter function (36.6.14.1) */
TC0->TC_BMR &= ~(TC_BMR_QDEN);
// TC0->TC_BMR &= ~(TC_BMR_QDEN);
/* Set wave mode to UP mode with automatic trigger, select wave mode, set the clock to MCK / 2*/
TC0->TC_CHANNEL[0].TC_CMR = TC_CMR_WAVSEL_UP_RC | TC_CMR_WAVE | TC_CMR_TCCLKS_TIMER_CLOCK1;
/* Enable the RC Compare interrupt*/
TC0->TC_CHANNEL[0].TC_IER = TC_IER_CPCS;
/* Disable all other interrupts */
TC0->TC_CHANNEL[0].TC_IDR = ~TC_IER_CPCS;
}
void obd2_TC_set_RC_value(__UINT32_TYPE__ value)
{
TC0->TC_CHANNEL[0].TC_RC = TC_RC_RC(value);
}
void obd2_TC_start()
{
/* software trigger the timer reset it and start the clock */
TC0->TC_CHANNEL[0].TC_CCR |= TC_CCR_SWTRG;
/* Clear any still pending IRQs */
NVIC_ClearPendingIRQ(TC0_IRQn);
/* Enable the IRQ */
NVIC_EnableIRQ(TC0_IRQn);
/* software trigger the timer resets it and start the clock, also enable the clock */
TC0->TC_CHANNEL[0].TC_CCR = TC_CCR_SWTRG | TC_CCR_CLKEN;
}
void obd2_TC_stop()
{
/* stop the clock using an RB load event in capture mode e (LDBSTOP = 1 in TC_CMR (datasheet 36.6.4) */
// TC0->TC_CHANNEL[0].TC_CMR |= TC_CMR_CPCSTOP;
/* Disable the clock*/
TC0->TC_CHANNEL[0].TC_CCR = TC_CCR_CLKDIS;
}